公开(公告)号：US08888913B2

公开(公告)日：2014-11-18

申请号：US13206310

申请日：2011-08-09

申请人： Kazuhiro Narahara ,  Hirotaka Kato ,  Koichiro Hayashida

发明人： Kazuhiro Narahara ,  Hirotaka Kato ,  Koichiro Hayashida

IPC分类号： C30B21/02 ,  C30B23/06 ,  C23C16/458 ,  C30B25/12 ,  C23C16/24

CPC分类号： C23C16/24 ,  C23C16/4585 ,  C23C16/4586 ,  C30B23/063 ,  C30B25/12 ,  H01L21/68735

摘要： A method of forming an epitaxial layer to increase flatness of an epitaxial silicon wafer is provided. In particular, a method of controlling the epitaxial layer thickness in a peripheral part of the wafer is provided. An apparatus for manufacturing an epitaxial wafer by growing an epitaxial layer with reaction of a semiconductor wafer and a source gas in a reaction furnace comprising: a pocket in which the semiconductor wafer is placed; a susceptor fixing the semiconductor; orientation-dependent control means dependent on a crystal orientation of the semiconductor wafer and/or orientation-independent control means independent from the crystal orientation of the semiconductor wafer, wherein the apparatus may improve flatness in a peripheral part of the epitaxial layer.

摘要翻译： 提供了形成外延层以提高外延硅晶片的平坦度的方法。 特别地，提供了控制晶片周边部分中的外延层厚度的方法。 一种用于通过在反应炉中生长具有半导体晶片和源气体的反应的外延层来制造外延晶片的装置，包括：放置半导体晶片的凹槽; 固定半导体的基座; 取决于半导体晶片的晶体取向和/或独立于半导体晶片的晶体取向的取向非依赖性控制装置的取向依赖控制装置，其中该装置可以改善外延层的外围部分的平坦度。

公开(公告)号：US08021484B2

公开(公告)日：2011-09-20

申请号：US11731815

申请日：2007-03-30

申请人： Kazuhiro Narahara ,  Hirotaka Kato ,  Koichiro Hayashida

发明人： Kazuhiro Narahara ,  Hirotaka Kato ,  Koichiro Hayashida

IPC分类号： C30B21/06

CPC分类号： C23C16/24 ,  C23C16/4585 ,  C23C16/4586 ,  C30B23/063 ,  C30B25/12 ,  H01L21/68735

摘要： A method of forming an epitaxial layer to increase flatness of an epitaxial silicon wafer is provided. In particular, a method of controlling the epitaxial layer thickness in a peripheral part of the wafer is provided. An apparatus for manufacturing an epitaxial wafer by growing an epitaxial layer with reaction of a semiconductor wafer and a source gas in a reaction furnace comprising: a pocket in which the semiconductor wafer is placed; a susceptor fixing the semiconductor; orientation-dependent control means dependent on a crystal orientation of the semiconductor wafer and/or orientation-independent control means independent from the crystal orientation of the semiconductor wafer, wherein the apparatus may improve flatness in a peripheral part of the epitaxial layer.

摘要翻译： 提供了形成外延层以提高外延硅晶片的平坦度的方法。 特别地，提供了控制晶片周边部分中的外延层厚度的方法。 一种用于通过在反应炉中生长具有半导体晶片和源气体的反应的外延层来制造外延晶片的装置，包括：放置半导体晶片的凹槽; 固定半导体的基座; 取决于半导体晶片的晶体取向和/或独立于半导体晶片的晶体取向的取向非依赖性控制装置的取向依赖控制装置，其中该装置可以改善外延层的外围部分的平坦度。

公开(公告)号：US20100112213A1

公开(公告)日：2010-05-06

申请号：US12610708

申请日：2009-11-02

申请人： Motonori NAKAMURA ,  Yoshinobu MORI ,  Takeshi MASUDA ,  Hidenori KOBAYASHI ,  Kazuhiro NARAHARA

发明人： Motonori NAKAMURA ,  Yoshinobu MORI ,  Takeshi MASUDA ,  Hidenori KOBAYASHI ,  Kazuhiro NARAHARA

IPC分类号： C23C16/46 ,  C23C16/458 ,  C23C16/00

CPC分类号： C23C16/4586 ,  C23C16/46 ,  C30B25/10 ,  C30B25/12

摘要： In a manufacturing apparatus for manufacturing an epitaxial wafer with a wafer being mounted substantially concentrically with a susceptor, a center rod is provided to extend in an up-and-down direction on a side of a non-mounting surface of the susceptor so that its upper end is adjacent to the center of the susceptor. With this arrangement, part of radiation light irradiated toward the susceptor is diffusely reflected by the center rod before reaching the central portion of the susceptor, thereby reducing the amount of the radiation light irradiated to the central portion of the susceptor as well as lowering the temperature of the portion. Since the center rod and the susceptor are not in surface contact, the center rod does not take the heat from the susceptor, thereby suppressing the temperature from decreasing locally at the central portion of the susceptor.

摘要翻译： 在用于制造具有与基座大致同心地安装的晶片的外延晶片的制造装置中，设置中心杆，以在基座的非安装表面的一侧沿上下方向延伸， 上端邻近基座的中心。 利用这种布置，朝向基座照射的一部分辐射光在到达基座的中心部分之前被中心棒漫反射，从而减少了照射到基座的中心部分的辐射光的量以及降低温度 的部分。 由于中心杆和基座不与表面接触，所以中心杆不会从基座受热，从而抑制温度在基座的中心部分局部减小。

公开(公告)号：US07537658B2

公开(公告)日：2009-05-26

申请号：US11793155

申请日：2005-12-20

申请人： Yuichi Nasu ,  Kazuhiro Narahara

发明人： Yuichi Nasu ,  Kazuhiro Narahara

IPC分类号： C30B15/20

CPC分类号： H01L21/324 ,  C30B25/02 ,  C30B29/06 ,  H01L21/02052 ,  H01L21/02381 ,  H01L21/02532 ,  H01L21/02658

摘要： An oxide film 13 on the surface of the substrate 11 and an inner wall oxide film 112 in a COP 111 exposed to the surface of the substrate 11 are removed by cleaning the surface of the substrate 11 with a hydrofluoric acid solution. The substrate 11 is then cleaned with ozone water, thereby forming an oxide film 13 on the surface of the substrate 11. Thereafter the substrate 11 is subjected to a heat treatment for removing the oxide film 13 on the surface of the substrate 11. Consequently, the COP 111 on the surface of the substrate 11 is planarized to be eliminated from the substrate surface. Thereafter an epitaxial layer 12 is formed on the surface of the substrate 11.

摘要翻译： 通过用氢氟酸溶液清洗基板11的表面，去除在基板11的表面上的氧化膜13和暴露于基板11的表面的COP 111中的内壁氧化膜112。 然后用臭氧水清洗基板11，从而在基板11的表面上形成氧化膜13.然后对基板11进行热处理，以去除基板11表面上的氧化膜13。 基板11的表面上的COP111平坦化，从基板表面去除。 此后，在衬底11的表面上形成外延层12。

公开(公告)号：US09758871B2

公开(公告)日：2017-09-12

申请号：US12632032

申请日：2009-12-07

申请人： Kazuhiro Narahara

发明人： Kazuhiro Narahara

IPC分类号： C30B25/10 ,  C23C16/48 ,  H01L21/67 ,  C23C16/52 ,  C23C16/458 ,  C30B25/16 ,  C30B29/06

CPC分类号： C23C16/481 ,  C23C16/4583 ,  C23C16/52 ,  C30B25/10 ,  C30B25/16 ,  C30B29/06 ,  H01L21/67248

摘要： A method of manufacturing an epitaxial wafer in which an epitaxial layer is grown over a main surface of a silicon wafer placed substantially horizontally on a susceptor is provided. The method comprises: a growing step of the epitaxial layer; and a cooling step of cooling the epitaxial wafer having the epitaxial layer. The cooling step comprises: a wafer measurement step of measuring a temperature of the epitaxial wafer; a susceptor measurement step of measuring a temperature of the susceptor; and a control step of controlling a heater capable of heating at least the susceptor or the epitaxial wafer such that difference between a temperature of the epitaxial wafer and a temperature of the susceptor is within a predetermined range.

公开(公告)号：US07993452B2

公开(公告)日：2011-08-09

申请号：US11731268

申请日：2007-03-30

申请人： Koichiro Hayashida ,  Kazuhiro Narahara ,  Hirotaka Kato

发明人： Koichiro Hayashida ,  Kazuhiro Narahara ,  Hirotaka Kato

IPC分类号： C30B21/04

CPC分类号： H01L21/02052 ,  H01L21/02381 ,  H01L21/02532 ,  H01L21/02658 ,  H01L21/68735

摘要： A role of a bottom face of a silicon wafer is identified in a manufacturing process of the silicon wafer. And preferable characteristic feature is also identified. In order to obtain the above characteristic feature, a process method to be implemented into the method of manufacturing a normal silicon wafer is provided. For example, the method comprises: a pre-cleaning process for cleaning the silicon wafer having top and bottom faces processed to a mirror finish; and a rapid thermal process or an epitaxial growth process, wherein the pre-cleaning process comprises a hydrofluoric acid (HF) process and a subsequent pure water (DIW) process.

摘要翻译： 在硅晶片的制造过程中识别硅晶片的底面的作用。 并且还确定了优选的特征。 为了获得上述特征，提供了一种将在普通硅晶片的制造方法中实施的方法。 例如，该方法包括：用于清洁硅晶片的预清洁工艺，其具有加工成镜面光洁度的顶面和底面; 以及快速热处理或外延生长工艺，其中预清洗工艺包括氢氟酸（HF）工艺和随后的纯水（DIW）工艺。

公开(公告)号：US20090226293A1

公开(公告)日：2009-09-10

申请号：US11922997

申请日：2006-06-30

申请人： Yuichi Nasu ,  Hirotaka Katou ,  Kazuhiro Narahara ,  Hideyuki Matsunaga

发明人： Yuichi Nasu ,  Hirotaka Katou ,  Kazuhiro Narahara ,  Hideyuki Matsunaga

IPC分类号： H01L21/02 ,  C23C16/52

CPC分类号： H01L21/67115 ,  C23C16/24 ,  C23C16/52 ,  C30B25/105 ,  C30B29/06 ,  C30B35/005 ,  H01L21/67288 ,  H01L21/68742

摘要： A method and an apparatus for manufacturing a semiconductor wafer are provided for improving a quality of the semiconductor wafer, and further, for improving a quality of a semiconductor device manufactured by using the semiconductor wafer, by preventing warping from being generated at a stage of a placing step, at the time of performing heat treatment to a semiconductor wafer substrate. The placing process is performed by a placing means so that a time when a temperature difference between a wafer front surface temperature and a wafer rear surface temperature becomes maximum, and a time when warping is generated in the wafer are prior to a time when the wafer is brought into contact with lift pins or a susceptor (i.e., a time after the temperature is at an upper limit value of an infrared temperature region at 600° C.), and the lift pins are brought into contact with the wafer rear surface.

摘要翻译： 提供一种用于制造半导体晶片的方法和装置，用于提高半导体晶片的质量，此外，为了通过防止在半导体晶片的阶段产生翘曲来提高通过使用半导体晶片制造的半导体器件的质量 在对半导体晶片基板进行热处理时的放置工序。 通过放置装置进行放置处理，使得当晶片前表面温度和晶片背面温度之间的温度差变为最大时，以及在晶片中产生翘曲的时间在晶片的时间之前 与提升销或感受器接触（即，在温度处于600℃的红外温度区域的上限值之后的时间），并且提升销与晶片后表面接触。

公开(公告)号：US20080131605A1

公开(公告)日：2008-06-05

申请号：US11793155

申请日：2005-12-20

申请人： Yuichi Nasu ,  Kazuhiro Narahara

发明人： Yuichi Nasu ,  Kazuhiro Narahara

IPC分类号： H01L21/205 ,  H01L21/324

CPC分类号： H01L21/324 ,  C30B25/02 ,  C30B29/06 ,  H01L21/02052 ,  H01L21/02381 ,  H01L21/02532 ,  H01L21/02658

摘要： An oxide film 13 on the surface of the substrate 11 and an inner wall oxide film 112 in a COP 111 exposed to the surface of the substrate 11 are removed by cleaning the surface of the substrate 11 with a hydrofluoric acid solution. The substrate 11 is then cleaned with ozone water, thereby forming an oxide film 13 on the surface of the substrate 11. Thereafter the substrate 11 is subjected to a heat treatment for removing the oxide film 13 on the surface of the substrate 11. Consequently, the COP 111 on the surface of the substrate 11 is planarized to be eliminated from the substrate surface. Thereafter an epitaxial layer 12 is formed on the surface of the substrate 11.

摘要翻译： 通过用氢氟酸溶液清洗基板11的表面，去除在基板11的表面上的氧化膜13和暴露于基板11的表面的COP 111中的内壁氧化膜112。 然后用臭氧水清洗基板11，从而在基板11的表面上形成氧化膜13。 此后，对衬底11进行热处理以除去衬底11的表面上的氧化膜13。 因此，将基板11表面上的COP111平坦化，从基板表面除去。 此后，在衬底11的表面上形成外延层12。

公开(公告)号：US09685315B2

公开(公告)日：2017-06-20

申请号：US13885382

申请日：2011-11-11

申请人： Sumihisa Masuda ,  Kazuhiro Narahara

发明人： Sumihisa Masuda ,  Kazuhiro Narahara

IPC分类号： C30B25/18 ,  H01L21/02 ,  C30B29/06 ,  H01L29/30

CPC分类号： H01L21/02021 ,  C30B25/186 ,  C30B29/06 ,  H01L21/02381 ,  H01L21/02532 ,  H01L21/0262 ,  H01L21/02658 ,  H01L29/30

摘要： The present invention provides a method of producing an epitaxial wafer having a highly flat rear surface without polishing top and rear surfaces of the epitaxial wafer after forming an epitaxial film. A method of producing an epitaxial wafer 100 according to the present invention comprises a step of preparing a semiconductor wafer 10 having a beveled portion 11 formed on its end portion, a first surface 12b, a second surface 12a opposite to the first surface 12b, and edges 13b and 13a on both of the first surface 12b and the second surface 12a, the each edge 13a and 13b is boundary with the beveled portion 11; a step of processing of rolling off an outer peripheral portion 14 of the first surface 12b to form a roll-off region, the outer peripheral portion 14 is extending outward of the wafer from a predetermined position P inner than the position of the edge 13b on 12a the first surface 12b; and a step of forming a first epitaxial film 20 on the second surface 12a.

公开(公告)号：US20130264690A1

公开(公告)日：2013-10-10

申请号：US13885382

申请日：2011-11-11

申请人： Sumihisa Masuda ,  Kazuhiro Narahara

发明人： Sumihisa Masuda ,  Kazuhiro Narahara

IPC分类号： H01L21/02 ,  H01L29/30

CPC分类号： H01L21/02021 ,  C30B25/186 ,  C30B29/06 ,  H01L21/02381 ,  H01L21/02532 ,  H01L21/0262 ,  H01L21/02658 ,  H01L29/30

摘要： The present invention provides a method of producing an epitaxial wafer having a highly flat rear surface without polishing top and rear surfaces of the epitaxial wafer after forming an epitaxial film. A method of producing an epitaxial wafer 100 according to the present invention comprises a step of preparing a semiconductor wafer 10 having a beveled portion 11 formed on its end portion, a first surface 12b, a second surface 12a opposite to the first surface 12b, and edges 13b and 13a on both of the first surface 12b and the second surface 12a, the each edge 13a and 13b is boundary with the beveled portion 11; a step of processing of rolling off an outer peripheral portion 14 of the first surface 12b to form a roll-off region, the outer peripheral portion 14 is extending outward of the wafer from a predetermined position P inner than the position of the edge 13b on 12a the first surface 12b; and a step of forming a first epitaxial film 20 on the second surface 12a.

摘要翻译： 本发明提供一种制造具有高平坦后表面的外延晶片的方法，而不会在形成外延膜之后抛光外延晶片的顶表面和后表面。 根据本发明的制造外延晶片100的方法包括制备半导体晶片10的步骤，半导体晶片10具有形成在其端部上的斜面部分11，第一表面12b，与第一表面12b相对的第二表面12a，以及 在第一表面12b和第二表面12a两者上的边缘13b和13a，每个边缘13a和13b是与斜面部分11的边界; 处理滚动第一表面12b的外周部分14以形成滚降区域的步骤，外周部分14从比边缘13b的位置内侧的预定位置P向晶片外延伸 12a表示第一表面12b; 以及在第二表面12a上形成第一外延膜20的步骤。