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19 条记录 (耗时 0.015 秒)

    Strained Si/SiGe layers on insulator
    2.
    发明授权
    Strained Si/SiGe layers on insulator 有权
    绝缘体上的应变Si / SiGe层

    公开(公告)号：US6059895A

    公开(公告)日：2000-05-09

    申请号：US311468

    申请日：1999-05-13

    申请人： Jack Oon Chu ,  Khalid EzzEldin Ismail

    发明人： Jack Oon Chu ,  Khalid EzzEldin Ismail

    IPC分类号： H01L21/02 ,  H01L21/20 ,  H01L21/762 ,  H01L27/12 ,  H01L29/00

    CPC分类号： H01L21/76251 ,  H01L21/02381 ,  H01L21/0245 ,  H01L21/02505 ,  H01L21/0251 ,  H01L21/02532 ,  H01L21/2007

    摘要： An SOI substrate and method for forming is described incorporating the steps of forming strained layers of Si and/or SiGe on a first substrate, forming a layer of Si and/or S.sub.i O.sub.2 over the strained layers, bonding a second substrate having an insulating layer on its upper surface to the top surface above the strained layers, and removing the first substrate. The invention overcomes the problem of forming strained Si and SiGe layers on insulating substrates.

    摘要翻译： 描述SOI衬底和形成方法，其包括在第一衬底上形成Si和/或SiGe的应变层的步骤，在应变层上形成Si和/或SiO 2层，将具有绝缘层的第二衬底 其上表面到应变层上方的顶表面，并且移除第一基底。 本发明克服了在绝缘基板上形成应变Si和SiGe层的问题。

    Scalable MOS field effect transistor
    4.
    发明授权
    Scalable MOS field effect transistor 失效
    可扩展MOS场效应晶体管

    公开(公告)号：US06870232B1

    公开(公告)日：2005-03-22

    申请号：US09550990

    申请日：2000-04-17

    申请人： Kevin Kok Chan ,  Jack Oon Chu ,  Khalid EzzEldin Ismail ,  Stephen Anthony Rishton ,  Katherine Lynn Saenger

    发明人： Kevin Kok Chan ,  Jack Oon Chu ,  Khalid EzzEldin Ismail ,  Stephen Anthony Rishton ,  Katherine Lynn Saenger

    IPC分类号： H01L27/095 ,  H01L29/94

    CPC分类号： H01L27/095

    摘要： A field effect transistor and method for making is described incorporating self aligned source and drain contacts with Schottky metal-to-semiconductor junction and a T-shaped gate or incorporating highly doped semiconductor material for the source and drain contacts different from the channel material to provide etch selectivity and a T-shaped gate or incorporating a metal for the source and drain contacts and the oxide of the metal for the gate dielectric which is self aligned.

    摘要翻译： 描述了一种场效应晶体管和制造方法，其结合了与肖特基金属对半导体结和T形栅极的自对准源极和漏极接触，或者掺入用于不同于沟道材料的源极和漏极接触的高掺杂半导体材料，以提供 蚀刻选择性和T形栅极或掺入用于源极和漏极接触的金属和用于自对准的栅极电介质的金属的氧化物。

    Scalable MOS field effect transistor
    5.
    发明授权
    Scalable MOS field effect transistor 失效
    可扩展MOS场效应晶体管

    公开(公告)号：US6096590A

    公开(公告)日：2000-08-01

    申请号：US107738

    申请日：1998-06-30

    申请人： Kevin Kok Chan ,  Jack Oon Chu ,  Khalid EzzEldin Ismail ,  Stephen Anthony Rishton ,  Katherine Lynn Saenger

    发明人： Kevin Kok Chan ,  Jack Oon Chu ,  Khalid EzzEldin Ismail ,  Stephen Anthony Rishton ,  Katherine Lynn Saenger

    IPC分类号： H01L29/872 ,  H01L27/095 ,  H01L29/47 ,  H01L29/78 ,  H01L21/8238

    CPC分类号： H01L21/28114 ,  H01L27/095

    摘要： A field effect transistor and method for making is described incorporating self aligned source and drain contacts with Schottky metal-to-semiconductor junction and a T-shaped gate or incorporating highly doped semiconductor material for the source and drain contacts different from the channel material to provide etch selectivity and a T-shaped gate or incorporating a metal for the source and drain contacts and the oxide of the metal for the gate dielectric which is self aligned. The invention overcomes the problem of self-aligned high resistance source/drain contacts and a high resistance gate electrode for submicron FET devices which increase as devices are scaled to smaller dimensions.

    摘要翻译： 描述了一种场效应晶体管和制造方法，其结合了与肖特基金属对半导体结和T形栅极的自对准源极和漏极接触，或者掺入用于不同于沟道材料的源极和漏极接触的高掺杂半导体材料，以提供 蚀刻选择性和T形栅极或掺入用于源极和漏极接触的金属和用于自对准的栅极电介质的金属的氧化物。 本发明克服了自对准高电阻源极/漏极触点的问题，以及用于亚微米FET器件的高电阻栅电极，随着器件被缩放到更小的尺寸而增加。