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公开(公告)号：US20160211742A1
公开(公告)日：2016-07-21
申请号：US14601816
申请日：2015-01-21
IPC分类号： H02M1/36
CPC分类号： H02J50/00
摘要： There is provided a self-powered energy harvesting system for harvesting electrical energy from the environment for feeding a load, the system comprising a first energy harvester for generating first electrical energy having a first input voltage from the environment; a first local storage unit for storing the first electrical energy after conversion; a passive startup circuit connected to the first energy harvester for harvesting, converting and storing the first electrical energy inside the first local storage unit; a second energy harvester for generating second electrical energy having a second input voltage from the environment; and an active circuit connected to the first local storage unit, to the second energy harvester and to the load for extracting and using the first electrical energy stored in the first local storage unit for harvesting, converting and directing the second electrical energy to the load, the second input voltage being insufficient for operating the active circuit. There is also provided a passive startup circuit and an energy-aware time multiplexer for combining energy originating from the different energy harvesting sources for use with energy harvesting systems.
摘要翻译： 提供了一种用于从环境采集用于馈送负载的电能的自供能能量采集系统，该系统包括用于产生具有来自环境的第一输入电压的第一电能的第一能量收集器; 第一本地存储单元，用于存储转换后的第一电能; 被连接到第一能量收集器的被动启动电路，用于在第一本地存储单元内采集，转换和存储第一电能; 第二能量收集器，用于从环境产生具有第二输入电压的第二电能; 以及连接到第一本地存储单元的有源电路，到第二能量收集器和用于提取和使用存储在第一本地存储单元中的第一电能的负载，用于收集，转换和引导第二电能到负载， 第二输入电压不足以操作有源电路。 还提供了一种无源启动电路和能量感知时间复用器，用于将来自不同能量采集源的能量与能量采集系统结合使用。
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2.发明申请公开(公告)号：US20140152504A1
公开(公告)日：2014-06-05
申请号：US13691806
申请日：2012-12-02
IPC分类号： G01S3/14
摘要： The various embodiments herein provide a Uniform Circular Displaced Sensor Array (UC-DSA) system and method for measuring/estimating Direction of Arrival (DOA) of a wireless signal. The UC-DSA system comprises at least a set of two circular antenna arrays. The two circular antenna arrays have a number of elements. A Radio frequency (RF) receiver captures a wireless signal incident on a circular antenna array. A Direction of Arrival (DOA) estimator processes a received input signal and a Triangulation system provides the exact location of the source of the wireless signal. The two circular antenna arrays with the same number of elements are placed on different radii, and are shifted to have equal separation between inner elements and outer elements.
摘要翻译： 本文的各种实施例提供了一种用于测量/估计无线信号的到达方向（DOA）的均匀圆形位移传感器阵列（UC-DSA）系统和方法。 UC-DSA系统至少包括一组两个圆形天线阵列。 两个圆形天线阵列具有许多元件。 射频（RF）接收器捕获入射在圆形天线阵列上的无线信号。 到达方向（DOA）估计器处理接收的输入信号，并且三角测量系统提供无线信号源的确切位置。 具有相同数量元件的两个圆形天线阵列放置在不同的半径上，并且被移位以在内部元件和外部元件之间具有相等的间隔。
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3.发明申请公开(公告)号：US20160293244A1
公开(公告)日：2016-10-06
申请号：US14679162
申请日：2015-04-06
IPC分类号： G11C11/409 , G06F9/455 , G06F1/32
CPC分类号： G11C11/409 , G06F1/3275 , G06F1/3287 , G11C11/4072
摘要： The present invention provides an erasure circuitry, a method for erasing a volatile memory, a volatile memory and erasure module in the form of computer readable instructions, where the erasure circuitry is adapted to erase the memory at occurrence of a predefined event. The erasure circuitry includes a negative pulse generator which is adapted to reduce the charge on capacitor in one or more volatile memory cells to zero logic by using a switch connected to the Voltage Reference (Vref) of the volatile memory cell, a controller and a negative power supply. The switch and the negative power supply impose a negative pulse on the Vref of the volatile memory cells on being instructed by the controller at the occurrence of a predefined event. An erasure module associated with the controller is provided for instructing the erasure circuitry for erasing data at the occurrence of a predefined event.
摘要翻译： 本发明提供一种擦除电路，一种用于擦除易失性存储器的方法，以计算机可读指令的形式的易失性存储器和擦除模块，其中擦除电路适于在预定事件发生时擦除存储器。 擦除电路包括负脉冲发生器，其适于通过使用连接到易失性存储器单元的电压基准（Vref）的开关，控制器和负值将一个或多个易失性存储器单元中的电容器上的电荷减小到零逻辑 电源。 开关和负电源在发生预定义事件时由控制器指示，在易失性存储器单元的Vref上施加负脉冲。 提供与控制器相关联的擦除模块，用于指示擦除电路在预定事件发生时擦除数据。
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4.发明申请SYSTEM AND A METHOD FOR DESIGNING A HYBRID MEMORY CELL WITH MEMRISTOR AND COMPLEMENTARY METAL-OXIDE SEMICONDUCTOR 有权用于设计具有电容器和补充金属氧化物半导体的混合存储器单元的系统和方法公开(公告)号：US20160189772A1
公开(公告)日：2016-06-30
申请号：US15062395
申请日：2016-03-07
IPC分类号： G11C13/00
CPC分类号： G11C13/004 , G06F17/5072 , G11C13/0002 , G11C13/0007 , G11C13/0069
摘要： The embodiments herein relates to a hybrid non-volatile memory cell system and architecture for designing integrated circuits. The system comprises CMOS access transistor connected to a memristor which stores a data based on a resistance. The system has a word line for accessing the hybrid memory and two bit lines carrying data of mutually opposite values for transferring a data from the memory. The two terminals of the transistor are connected respectively to a first terminal of the memristor and to a first bit line. The gate terminals of the transistors are coupled together to form a word line. The access transistors control the two bit lines during a read and write operation. A control logic performs a read and write operation with the hybrid memory cells. The memory architecture prevents a power leakage during data storage and controls a drift in a state during a read process.
摘要翻译： 本文的实施例涉及用于设计集成电路的混合非易失性存储器单元系统和架构。 该系统包括连接到忆阻器的CMOS存取晶体管，存储器基于电阻存储数据。 该系统具有用于访问混合存储器的字线和携带相互相反值的数据的两个位线，用于从存储器传送数据。 晶体管的两个端子分别连接到忆阻器的第一端子和第一位线。 晶体管的栅极端子耦合在一起形成字线。 存取晶体管在读和写操作期间控制两个位线。 控制逻辑与混合存储器单元执行读和写操作。 存储器架构防止数据存储期间的电力泄漏并且在读取过程期间控制状态漂移。
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公开(公告)号：US20140260714A1
公开(公告)日：2014-09-18
申请号：US13803902
申请日：2013-03-14
发明人： HEIKE VALLERY , DUSTIN JUHN-YIN LI
IPC分类号： G01C19/04
CPC分类号： G01C19/04 , A61H3/00 , A61H2201/0173 , A61H2201/1623 , A61H2201/165 , A61H2201/5007 , A61H2201/5069 , A61H2201/5084 , Y10T74/1225
摘要： The embodiment herein generally relates to a system to apply moments to a user, particularly during gait. The system is a portable gyroscopic-assisted system, mounted on a user's body, particularly the upper body, particularly to influence orientation of users having difficulty with balancing during gait. The system comprises a plurality of variable-speed control moment gyroscopes (VSCMGs). The VSCMGs generate moments, particularly to counteract a fall to any direction. The VSCMGs are placed close to the center of mass of the user. The couple moments of the VSCMGs are transmitted to the user through a support structure that is tightly attached to the user. Particularly, the system controls moments based on detecting pre-fall conditions.
摘要翻译： 本文的实施例通常涉及一种向用户施加时刻的系统，特别是在步态期间。 该系统是便携式陀螺辅助系统，安装在用户的身体，特别是上身上，特别是影响步态难平衡的用户的方位。 该系统包括多个可变速度控制力矩陀螺仪（VSCMG）。 VSCMGs产生时刻，特别是抵制任何方向的跌倒。 VSCMG靠近用户的质心放置。 通过与用户紧密连接的支持结构将VSCMG的两个时刻传送给用户。 特别地，系统基于检测前置下降条件来控制力矩。
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公开(公告)号：US09679632B2
公开(公告)日：2017-06-13
申请号：US14681156
申请日：2015-04-08
IPC分类号： G06F12/00 , G11C11/4072 , G11C7/20
CPC分类号： G11C11/4072 , G11C7/20
摘要： The present invention discloses an erasure circuitry, a method for erasing a volatile memory, a volatile memory and a processing unit coupled with an operating system, where the erasure circuitry is adapted to erase the volatile memory at occurrence of a predefined event. The erasure circuitry includes a control unit for initiating a dummy operation to randomize data of one or more memory cells at the occurrence of a predefined event. The control unit is adapted to receive the addresses of the memory blocks from a processing unit via an operating system.
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公开(公告)号：US09653162B2
公开(公告)日：2017-05-16
申请号：US15062395
申请日：2016-03-07
CPC分类号： G11C13/004 , G06F17/5072 , G11C13/0002 , G11C13/0007 , G11C13/0069
摘要： The embodiments herein relates to a hybrid non-volatile memory cell system and architecture for designing integrated circuits. The system comprises CMOS access transistor connected to a memristor which stores a data based on a resistance. The system has a word line for accessing the hybrid memory and two bit lines carrying data of mutually opposite values for transferring a data from the memory. The two terminals of the transistor are connected respectively to a first terminal of the memristor and to a first bit line. The gate terminals of the transistors are coupled together to form a word line. The access transistors control the two bit lines during a read and write operation. A control logic performs a read and write operation with the hybrid memory cells. The memory architecture prevents a power leakage during data storage and controls a drift in a state during a read process.
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8.发明申请VOLATILE MEMORY ERASURE BY THE RANDOMIZATION OF DATA STORED IN MEMORY CELLS 有权通过记忆存储器中存储的数据的随机存储器的挥发性存储器擦除公开(公告)号：US20160300600A1
公开(公告)日：2016-10-13
申请号：US14681156
申请日：2015-04-08
CPC分类号： G11C11/4072 , G11C7/20
摘要： The present invention discloses an erasure circuitry, a method for erasing a volatile memory, a volatile memory and a processing unit coupled with an operating system, where the erasure circuitry is adapted to erase the volatile memory at occurrence of a predefined event. The erasure circuitry includes a control unit for initiating a dummy operation to randomize data of one or more memory cells at the occurrence of a predefined event. The control unit is adapted to receive the addresses of the memory blocks from a processing unit via an operating system.
摘要翻译： 本发明公开了一种擦除电路，用于擦除易失性存储器的方法，易失性存储器和与操作系统耦合的处理单元，其中擦除电路适于在发生预定事件时擦除易失性存储器。 擦除电路包括一个控制单元，用于启动虚拟操作，以在发生预定义的事件时使一个或多个存储单元的数据随机化。 控制单元适于经由操作系统从处理单元接收存储块的地址。
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9.发明申请公开(公告)号：US20160246542A1
公开(公告)日：2016-08-25
申请号：US14627133
申请日：2015-02-20
发明人： Khaled Hamed SALAH , Baker Shehadah MOHAMMAD , Mahmoud Abdullah AL-QUTAYRI , Bushra Abbas Mohammed Essa ALBELOOSHI
IPC分类号： G06F3/06 , G11C11/407 , G11C11/406
CPC分类号： G06F3/0652 , G06F3/0608 , G06F3/0673 , G11C7/106 , G11C7/1087 , G11C8/10 , G11C11/406 , G11C11/4072 , G11C11/4087 , G11C11/4093
摘要： A method of erasing volatile memory requiring refreshment using refresh circuitry to maintain data storage, the method comprising controlling the refresh circuitry for preventing refreshment of the memory upon occurrence of a predefined event which would require erasure of data stored in the memory by a previous user, process, application or service. A computer readable medium encoded with processor executable instructions for execution by a processing unit for controlling a refresh circuitry connected to a volatile memory for preventing refreshment of the memory at the predefined event. A refresh circuitry adapted to be connected to a volatile memory requiring refreshment using the refresh circuitry to maintain data storage, the refresh circuitry being adapted to prevent the refreshment of the memory at the occurrence of the predefined event. A volatile memory comprising a refresh circuitry adapted to prevent the refreshment of the memory at the occurrence of the predefined event.
摘要翻译： 一种擦除使用刷新电路来维持数据存储的需要刷新的易失性存储器的方法，所述方法包括：控制刷新电路，用于在发生需要擦除由先前用户存储在存储器中的数据的预定义事件时防止存储器刷新， 流程，应用或服务。 编码有处理器可执行指令的计算机可读介质，用于由处理单元执行，用于控制连接到易失性存储器的刷新电路，以防止在预定事件下刷新存储器。 一种刷新电路，适于连接到易失性存储器，该易失性存储器需要使用刷新电路进行刷新以维持数据存储，所述刷新电路适于在发生预定事件时防止刷新存储器。 一种易失性存储器，包括适于在发生预定事件时防止刷新存储器的刷新电路。
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10.发明申请SYSTEM AND PROCESS FOR CONTROLLING A SAFE DISTANCE BETWEEN MOVING VEHICLES 审中-公开用于控制移动车辆之间安全距离的系统和过程公开(公告)号：US20160009279A1
公开(公告)日：2016-01-14
申请号：US14499315
申请日：2014-09-29
发明人： Shihab JIMAA , Abdulrahman AL MULLA , Abdulaziz Saeed AL ALI , Ahmad Abdullah AL DAHMANI , Mohammed AL EMADI
IPC分类号： B60W30/16
CPC分类号： B60W30/16 , B60W30/095 , B60W50/14 , B60W2520/10 , B60W2550/308
摘要： A system for controlling the distance between a first moving vehicle and a second moving vehicle comprising: A distance sensor for measuring the distance between the first and second moving vehicles; A speed sensor for measuring the speed of the first moving vehicle; A speed control unit connected to the distance and speed sensors for determining a safe distance threshold as a function of the deceleration rate and speed; A notification unit connected to the speed control unit for notifying the driver of the first moving vehicle of any breach of the safe distance threshold; An authority alert unit connected to the speed control unit and to the traffic authorities via a wireless data network for alerting the traffic authorities of any violation of the safe distance threshold by the first moving vehicle, and a process for controlling the distance between a first moving vehicle and a second moving vehicle.
摘要翻译： 一种用于控制第一移动车辆和第二移动车辆之间的距离的系统，包括：用于测量第一和第二移动车辆之间的距离的距离传感器; 一种速度传感器，用于测量第一移动车辆的速度; 连接到距离和速度传感器的速度控制单元，用于根据减速率和速度确定安全距离阈值; 连接到所述速度控制单元的通知单元，用于通知所述第一移动车辆的驾驶员违反所述安全距离阈值; 通过无线数据网络连接到速度控制单元和交通管理机构的权限警报单元，用于向交通管理机构警告由第一移动车辆违反安全距离阈值的任何行为，以及用于控制第一移动车辆之间的距离的过程 车辆和第二移动车辆。
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