公开(公告)号：US20080014701A1

公开(公告)日：2008-01-17

申请号：US11892872

申请日：2007-08-28

申请人： Kouji Tsunoda ,  Tatsuya Usuki ,  Masao Taguchi

发明人： Kouji Tsunoda ,  Tatsuya Usuki ,  Masao Taguchi

IPC分类号： H01L21/8247

CPC分类号： H01L27/11526 ,  G11C16/0416 ,  H01L27/105 ,  H01L27/11543 ,  H01L29/0692 ,  H01L29/7883

摘要： A semiconductor device has: an isolation region formed on a semiconductor substrate and defining a continuous active region including a select transistor region and a direct tunnel element region; a gate insulating film formed on a channel region of the select transistor region; a tunnel insulating film formed on a partial area of the direct tunnel element region and having a thickness different from a thickness of the gate insulating film; a continuous floating gate electrode formed above the gate insulating film and the tunnel insulating film; an inter-electrode insulating film formed on a surface of the floating gate electrode; a control gate electrode facing the floating gate electrode via the inter-electrode insulating film; and a pair of source/drain regions formed on both sides of the channel region of the select transistor region and not overlapping the tunnel insulating film.

公开(公告)号：US20050230741A1

公开(公告)日：2005-10-20

申请号：US11037176

申请日：2005-01-19

申请人： Kouji Tsunoda ,  Tatsuya Usuki ,  Masao Taguchi

发明人： Kouji Tsunoda ,  Tatsuya Usuki ,  Masao Taguchi

IPC分类号： H01L21/8247 ,  G11C16/04 ,  H01L27/105 ,  H01L27/115 ,  H01L29/06 ,  H01L29/788 ,  H01L29/792

CPC分类号： H01L27/11526 ,  G11C16/0416 ,  H01L27/105 ,  H01L27/11543 ,  H01L29/0692 ,  H01L29/7883

摘要： A semiconductor device has: an isolation region formed on a semiconductor substrate and defining a continuous active region including a select transistor region and a direct tunnel element region; a gate insulating film formed on a channel region of the select transistor region; a tunnel insulating film formed on a partial area of the direct tunnel element region and having a thickness different from a thickness of the gate insulating film; a continuous floating gate electrode formed above the gate insulating film and the tunnel insulating film; an inter-electrode insulating film formed on a surface of the floating gate electrode; a control gate electrode facing the floating gate electrode via the inter-electrode insulating film; and a pair of source/drain regions formed on both sides of the channel region of the select transistor region and not overlapping the tunnel insulating film.

摘要翻译： 半导体器件具有形成在半导体衬底上的隔离区域，并且限定包括选择晶体管区域和直接隧道元件区域的连续有源区域; 形成在所述选择晶体管区域的沟道区上的栅极绝缘膜; 隧道绝缘膜，其形成在所述直接隧道元件区域的部分区域上，并且具有与所述栅极绝缘膜的厚度不同的厚度; 形成在栅极绝缘膜和隧道绝缘膜上方的连续浮栅; 在所述浮栅电极的表面上形成的电极间绝缘膜; 通过所述电极间绝缘膜与所述浮栅相对的控制栅电极; 以及形成在选择晶体管区域的沟道区域的两侧并且不与隧道绝缘膜重叠的一对源极/漏极区域。

公开(公告)号：US07102189B2

公开(公告)日：2006-09-05

申请号：US10745967

申请日：2003-12-29

申请人： Nobuyuki Nishikawa ,  Hiroshi Minakata ,  Kouji Tsunoda ,  Eiji Yoshida

发明人： Nobuyuki Nishikawa ,  Hiroshi Minakata ,  Kouji Tsunoda ,  Eiji Yoshida

IPC分类号： H01L27/108

CPC分类号： H01L28/65 ,  H01L27/10814 ,  H01L27/10855 ,  H01L28/91

摘要： A tight contact layer is disposed on a semiconductor substrate, the tight contact layer being made of one material selected from the group consisting of refractory metal, alloy of refractory metal, nitride of refractory metal, and siliconized nitride of refractory metal. An oxide surface layer is disposed on the surface of the tight contact layer, the oxide surface layer being made of oxide of material constituting the tight contact layer. A first conductive layer is disposed on the surface of the oxide surface layer, the first conductive layer being made of a platinum group or alloy which contains a platinum group. When a conductive layer made of metal such as a platinum group is formed on a tight contact layer, coverage and morphology can be prevented from being degraded.

摘要翻译： 紧密接触层设置在半导体衬底上，紧密接触层由选自耐火金属，难熔金属合金，难熔金属氮化物和难熔金属的氮化硅组成的组中的一种材料制成。 氧化物表面层设置在紧密接触层的表面上，氧化物表面层由构成紧密接触层的材料的氧化物制成。 第一导电层设置在氧化物表面层的表面上，第一导电层由含有铂族的铂族或合金制成。 当在紧密接触层上形成由诸如铂族基团的金属制成的导电层时，可以防止覆盖和形态的劣​​化。

公开(公告)号：US06530683B1

公开(公告)日：2003-03-11

申请号：US09619393

申请日：2000-07-19

申请人： Masaya Ohkohdo ,  Katuhiro Murahashi ,  Kouji Tsunoda

发明人： Masaya Ohkohdo ,  Katuhiro Murahashi ,  Kouji Tsunoda

IPC分类号： F21V800

CPC分类号： B60Q1/0052 ,  B60Q1/0041 ,  B60Q1/44 ,  F21S43/14 ,  F21S43/237 ,  F21S43/245 ,  F21S43/247

摘要： A vehicle lighting device has a housing, a plurality of light guides extending in radial fashion from the substantially center part of the housing, a reflector within the housing, and a plurality of LED light sources. The surface of each light guide has a reflective region with a reflecting means along the longitudinal direction thereof and an transmissive region in which the reflecting means is not provided. The transmissive region faces forward, and the reflective region faces rearward. The reflector is disposed further to the rear than the light guides, and in opposition to the reflective regions. Each LED light source is in proximity to one end of a light guide.

摘要翻译： 车辆用照明装置具有壳体，从壳体的大致中心部分以径向方式延伸的多个光导件，壳体内的反射器和多个LED光源。 每个光导的表面具有沿着其纵向具有反射装置的反射区域和不设置反射装置的透射区域。 透射区域面向前方，反射区域面向后方。 反射器被设置在比导光件更靠后的位置，并且与反射区域相对。 每个LED光源靠近光导的一端。

公开(公告)号：US06924526B2

公开(公告)日：2005-08-02

申请号：US10020951

申请日：2001-12-19

申请人： Masatoshi Fukuda ,  Kouji Tsunoda

发明人： Masatoshi Fukuda ,  Kouji Tsunoda

IPC分类号： H01L21/8242 ,  H01L21/02 ,  H01L21/316 ,  H01L21/8246 ,  H01L27/105 ,  H01L27/108 ,  H01L29/92

CPC分类号： H01L27/10808 ,  H01L21/31604 ,  H01L27/10814 ,  H01L27/10852 ,  H01L27/10894 ,  H01L28/55 ,  H01L28/91

摘要： The semiconductor device comprises a capacitor including a storage electrode 76, a capacitor dielectric film formed on the storage electrode 76, and a plate electrode formed on the capacitor dielectric film 78, the storage electrode 76 having an upper end rounded and having a larger thickness at the upper end than a thickness in the rest region. Whereby electric field concentration on the upper end of the storage electrode can be mitigated, and leakage current increase and dielectric breakdown of the capacitor dielectric film can be precluded.

摘要翻译： 半导体器件包括电容器，其包括存储电极76，形成在存储电极76上的电容器电介质膜和形成在电容器电介质膜78上的平板电极，存储电极76具有上端圆形并具有较大厚度 上端大于其余区域的厚度。 由此可以减轻存储电极上端的电场浓度，并且可以防止漏电流增加并且可以阻止电容器电介质膜的介电击穿。

公开(公告)号：US07462539B2

公开(公告)日：2008-12-09

申请号：US11892872

申请日：2007-08-28

申请人： Kouji Tsunoda ,  Tatsuya Usuki ,  Masao Taguchi

发明人： Kouji Tsunoda ,  Tatsuya Usuki ,  Masao Taguchi

IPC分类号： H01L21/00 ,  H01L21/20

CPC分类号： H01L27/11526 ,  G11C16/0416 ,  H01L27/105 ,  H01L27/11543 ,  H01L29/0692 ,  H01L29/7883

摘要： A semiconductor device has: an isolation region formed on a semiconductor substrate and defining a continuous active region including a select transistor region and a direct tunnel element region; a gate insulating film formed on a channel region of the select transistor region; a tunnel insulating film formed on a partial area of the direct tunnel element region and having a thickness different from a thickness of the gate insulating film; a continuous floating gate electrode formed above the gate insulating film and the tunnel insulating film; an inter-electrode insulating film formed on a surface of the floating gate electrode; a control gate electrode facing the floating gate electrode via the inter-electrode insulating film; and a pair of source/drain regions formed on both sides of the channel region of the select transistor region and not overlapping the tunnel insulating film.

摘要翻译： 半导体器件具有形成在半导体衬底上的隔离区域，并且限定包括选择晶体管区域和直接隧道元件区域的连续有源区域; 形成在所述选择晶体管区域的沟道区上的栅极绝缘膜; 隧道绝缘膜，其形成在所述直接隧道元件区域的部分区域上，并且具有与所述栅极绝缘膜的厚度不同的厚度; 形成在栅极绝缘膜和隧道绝缘膜上方的连续浮栅; 形成在所述浮栅电极的表面上的电极间绝缘膜; 通过所述电极间绝缘膜与所述浮栅相对的控制栅电极; 以及形成在选择晶体管区域的沟道区域的两侧并且不与隧道绝缘膜重叠的一对源极/漏极区域。

公开(公告)号：US20060043464A1

公开(公告)日：2006-03-02

申请号：US11012277

申请日：2004-12-16

申请人： Kouji Tsunoda ,  Tatsuya Usuki

发明人： Kouji Tsunoda ,  Tatsuya Usuki

IPC分类号： H01L29/788

CPC分类号： H01L27/11521 ,  H01L27/115 ,  H01L29/42324 ,  H01L29/7883

摘要： A direct-tunneling semiconductor memory device includes a device isolation structure formed on a semiconductor substrate, including a device isolation trench and a device isolation insulation film filling the device isolation trench, a dielectric film covering both sidewall surfaces and a top surface of a floating gate electrode formed on the semiconductor substrate, a conductive part provided on the sidewall surfaces of the floating gate electrode via the dielectric film, the conductor part constituting a part of a control gate electrode, and first and second diffusion regions formed at respective lateral sides of the floating gate electrode, wherein the first and second diffusion regions are formed on a surface of the device isolation groove with offset from a region right underneath the floating gate electrode, the conductive part is formed in the device region with offset from the device isolation trench.

摘要翻译： 直接隧道半导体存储器件包括形成在半导体衬底上的器件隔离结构，包括器件隔离沟槽和填充器件隔离沟槽的器件隔离绝缘膜，覆盖两个侧壁表面的电介质膜和浮动栅极的顶表面 形成在所述半导体基板上的电极，经由所述电介质膜设置在所述浮栅电极的侧壁面上的导电部，构成控制栅电极的一部分的导体部，以及形成在所述第一扩散区 浮置栅电极，其中所述第一和第二扩散区形成在所述器件隔离槽的表面上，偏离所述浮置栅电极正下方的区域，所述导电部分形成在所述器件区域中，偏离所述器件隔离沟槽。

公开(公告)号：US06474852B1

公开(公告)日：2002-11-05

申请号：US09653897

申请日：2000-09-01

申请人： Masaya Ohkohdo ,  Katsuhiro Murahashi ,  Kouji Tsunoda

发明人： Masaya Ohkohdo ,  Katsuhiro Murahashi ,  Kouji Tsunoda

IPC分类号： B60Q100

CPC分类号： B60Q1/2696 ,  F21S43/14 ,  F21S43/30 ,  F21V7/0008

摘要： A small light-source module has a module body having a small single-point light source with a limited light-emitting angle mounted thereto, and a reflective surface provided on the module body. The light axis of the light source tilted with respect to the reflective surface, so as to create a substantially fan-shape projected light region on the reflective surface. The outer contour of the reflective surface is also substantially fan-shaped, and the reflective surface has a reflective pattern for reflecting light emitted form the small single-point light source as parallel light.

摘要翻译： 小型光源模块具有模块体，该模块主体具有安装在其上的发光角度有限的小单点光源，以及设置在模块本体上的反射面。 光源的光轴相对于反射面倾斜，以便在反射表面上形成大致扇形的投射光区域。 反射表面的外轮廓也基本上是扇形，并且反射表面具有用于将作为平行光的小单点光源发射的光反射的反射图案。

公开(公告)号：US07470595B2

公开(公告)日：2008-12-30

申请号：US11497344

申请日：2006-08-02

申请人： Nobuyuki Nishikawa ,  Hiroshi Minakata ,  Kouji Tsunoda ,  Eiji Yoshida

发明人： Nobuyuki Nishikawa ,  Hiroshi Minakata ,  Kouji Tsunoda ,  Eiji Yoshida

IPC分类号： H01L21/20 ,  H01L21/76

CPC分类号： H01L28/65 ,  H01L27/10814 ,  H01L27/10855 ,  H01L28/91

摘要： A tight contact layer is disposed on a semiconductor substrate, the tight contact layer being made of one material selected from the group consisting of refractory metal, alloy of refractory metal, nitride of refractory metal, and siliconized nitride of refractory metal. An oxide surface layer is disposed on the surface of the tight contact layer, the oxide surface layer being made of oxide of material constituting the tight contact layer. A first conductive layer is disposed on the surface of the oxide surface layer, the first conductive layer being made of a platinum group or alloy which contains a platinum group. When a conductive layer made of metal such as a platinum group is formed on a tight contact layer, coverage and morphology can be prevented from being degraded.

摘要翻译： 紧密接触层设置在半导体衬底上，紧密接触层由选自耐火金属，难熔金属合金，难熔金属氮化物和难熔金属的氮化硅组成的组中的一种材料制成。 氧化物表面层设置在紧密接触层的表面上，氧化物表面层由构成紧密接触层的材料的氧化物制成。 第一导电层设置在氧化物表面层的表面上，第一导电层由含有铂族的铂族或合金制成。 当在紧密接触层上形成由诸如铂族基团的金属制成的导电层时，可以防止覆盖和形态的劣​​化。

公开(公告)号：US07432153B2

公开(公告)日：2008-10-07

申请号：US11898685

申请日：2007-09-14

申请人： Kouji Tsunoda ,  Tatsuya Usuki

发明人： Kouji Tsunoda ,  Tatsuya Usuki

IPC分类号： H01L21/336

CPC分类号： H01L27/11521 ,  H01L27/115 ,  H01L29/42324 ,  H01L29/7883

摘要： A direct-tunneling semiconductor memory device includes a device isolation structure formed on a semiconductor substrate, including a device isolation trench and a device isolation insulation film filling the device isolation trench, a dielectric film covering both sidewall surfaces and a top surface of a floating gate electrode formed on the semiconductor substrate, a conductive part provided on the sidewall surfaces of the floating gate electrode via the dielectric film, the conductor part constituting a part of a control gate electrode, and first and second diffusion regions formed at respective lateral sides of the floating gate electrode, wherein the first and second diffusion regions are formed on a surface of the device isolation groove with offset from a region right underneath the floating gate electrode, the conductive part is formed in the device region with offset from the device isolation trench.

摘要翻译： 直接隧道半导体存储器件包括形成在半导体衬底上的器件隔离结构，包括器件隔离沟槽和填充器件隔离沟槽的器件隔离绝缘膜，覆盖两个侧壁表面的电介质膜和浮动栅极的顶表面 形成在所述半导体基板上的电极，经由所述电介质膜设置在所述浮栅电极的侧壁面上的导电部，构成控制栅电极的一部分的导体部，以及形成在所述第一扩散区 浮置栅电极，其中所述第一和第二扩散区形成在所述器件隔离槽的表面上，偏离所述浮置栅电极正下方的区域，所述导电部分形成在所述器件区域中，偏离所述器件隔离沟槽。