公开(公告)号：US5929528A

公开(公告)日：1999-07-27

申请号：US844891

申请日：1997-04-22

申请人： Masaaki Kinugawa

发明人： Masaaki Kinugawa

IPC分类号： H01L23/528 ,  H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC分类号： H01L23/528 ,  H01L2924/0002 ,  Y10S438/926

摘要： The semiconductor of this invention is provided with a first inter-layer insulating film formed on the surface of a semiconductor substrate to a first film thickness; a plurality of first wiring patterns formed on the surface of the first inter-layer insulating film; a dummy pattern formed between the first wiring patterns and insulated electrically from the wiring patterns; a second inter-layer insulating film formed from the first inter-layer insulating film to a second film thickness so as to cover the surfaces of the first inter-layer insulating film, the first wiring patterns, the dummy pattern; and second wiring patterns formed on the surface of the second inter-layer insulating film and wherein the dummy pattern has no planar overlapped portion with respect to the second wiring patterns, that is, it is separated from the second wiring patterns in top view.

摘要翻译： 本发明的半导体设置有形成在半导体衬底的表面上的第一层间绝缘膜至第一膜厚度; 形成在所述第一层间绝缘膜的表面上的多个第一布线图案; 形成在所述第一布线图案之间并与所述布线图形电绝缘的虚设图案; 第二层间绝缘膜，由第一层间绝缘膜形成为第二膜厚，以覆盖第一层间绝缘膜，第一布线图案，虚设图案的表面; 以及形成在第二层间绝缘膜的表面上的第二布线图案，并且其中虚设图案相对于第二布线图案没有平面重叠部分，即在顶视图中与第二布线图案分离。

公开(公告)号：US5847412A

公开(公告)日：1998-12-08

申请号：US867984

申请日：1997-06-03

申请人： Masakazu Kakumu ,  Masaaki Kinugawa

发明人： Masakazu Kakumu ,  Masaaki Kinugawa

IPC分类号： H01L21/762 ,  H01L21/8244 ,  H01L27/11 ,  H01L29/76 ,  H01L29/94

CPC分类号： H01L27/11 ,  H01L21/76202 ,  H01L27/1112 ,  Y10S257/903 ,  Y10S257/904

摘要： A plurality of silicon insulating films are formed to separate regions to be formed with elements from each other on a silicon semiconductor substrate. Silicon layers are formed by an epitaxially growing method on the regions to be formed with the elements and the silicon insulating film. An MOS transistor is formed on the monocrystalline silicon layer formed on the regions to be formed with the elements of the silicon layer, and the polysilicon layer formed on the silicon insulating film is used as a high resistance element or doped with an impurity as a conductor line.

摘要翻译： 形成多个硅绝缘膜，以在硅半导体衬底上分离要由元件彼此形成的区域。 在由元件和硅绝缘膜形成的区域上通过外延生长方法形成硅层。 在形成有硅层的元件的区域上形成的单晶硅层上形成MOS晶体管，将形成在硅绝缘膜上的多晶硅层用作高电阻元件或掺杂杂质作为导体 线。

公开(公告)号：US5220182A

公开(公告)日：1993-06-15

申请号：US824406

申请日：1992-01-23

申请人： Fumitomo Matsuoka ,  Masaaki Kinugawa

发明人： Fumitomo Matsuoka ,  Masaaki Kinugawa

IPC分类号： H01L21/8244 ,  H01L27/11 ,  H01L29/78 ,  H01L29/786

CPC分类号： H01L27/1108 ,  Y10S257/903

摘要： A semiconductor device comprising an electrode or wiring layer formed over a semiconductor substrate, a circuit element provided adjacent the electrode or wiring layer, and a conductive layer formed on a side wall, or a side wall and top surface, of the electrode or wiring layer with an insulating film provided therebetween, and supplied with a fixed potential or a variable potential different from a potential on the electrode or wiring layer.

摘要翻译： 一种半导体器件，包括在半导体衬底上形成的电极或布线层，邻近所述电极或布线层设置的电路元件以及形成在所述电极或布线层的侧壁或侧壁和顶表面上的导电层 其间设置有绝缘膜，并且提供与电极或布线层上的电位不同的固定电位或可变电位。

公开(公告)号：US5665645A

公开(公告)日：1997-09-09

申请号：US668522

申请日：1996-06-28

申请人： Masaaki Kinugawa

发明人： Masaaki Kinugawa

IPC分类号： G03F1/70 ,  G03F1/84 ,  G03F7/20 ,  G03F9/00 ,  H01L21/027 ,  H01L21/3205 ,  H01L21/768 ,  H01L23/00 ,  H01L23/544 ,  H01L21/28

CPC分类号： G03F7/70866 ,  G03F7/70616 ,  G03F7/70633 ,  G03F7/70916 ,  G03F9/7076 ,  H01L21/768 ,  H01L23/544 ,  H01L2223/54406 ,  H01L2223/54453 ,  H01L2924/0002 ,  Y10S438/975

摘要： A first insulating film is formed on the surface of a silicon substrate, and a first silicide wiring layer is deposited on the insulating film. A first mark is formed by transferring the pattern of a first reticle formed on the silicide wiring layer. A second insulation film is deposited on the mark and the first insulation film, and a second mark is formed on the first mark by transferring the pattern of a second reticle formed on the second insulation film. A second silicide wiring layer is deposited in the second mark and on the second insulating film. An anti dust deposit and a third mark are formed by transferring the pattern of a third reticle formed on the second silicide wiring layer. Thus, dusts from the marks produced by transferring the reticle inspection marks of the reticles can be effectively prevented to improve the yield of LSIs.

摘要翻译： 在硅衬底的表面上形成第一绝缘膜，并且在绝缘膜上沉积第一硅化物布线层。 通过转印形成在硅化物布线层上的第一掩模版的图案来形成第一标记。 在标记和第一绝缘膜上沉积第二绝缘膜，并且通过转印形成在第二绝缘膜上的第二掩模版的图案，在第一标记上形成第二标记。 第二硅化物布线层沉积在第二标记和第二绝缘膜上。 通过转印形成在第二硅化物布线层上的第三掩模版的图案来形成防尘沉积物和第三标记。 因此，可以有效地防止通过转印标线的掩模版检查标记而产生的标记的灰尘，从而提高LSI的产量。

公开(公告)号：US4857986A

公开(公告)日：1989-08-15

申请号：US884962

申请日：1986-07-14

申请人： Masaaki Kinugawa

发明人： Masaaki Kinugawa

IPC分类号： H01L21/8238 ,  H01L27/092

CPC分类号： H01L27/0927

摘要： A monocrystalline silicon substrate having a (110) crystal plane is prepared. A CMOS transistor is formed on this substrate. An N channel MOS transistor and a P channel MOS transistor are formed in the surface of the semiconductor substrate. In each of these transistors the channel length is 1.5 .mu.m or less and the velocity saturation phenomenon of electrons is outstanding.

摘要翻译： 制备具有（110）晶面的单晶硅衬底。 在该衬底上形成CMOS晶体管。 在半导体衬底的表面中形成N沟道MOS晶体管和P沟道MOS晶体管。 在这些晶体管的每一个中，沟道长度为1.5μm或更小，并且电子的速度饱和现象是突出的。

公开(公告)号：US6069067A

公开(公告)日：2000-05-30

申请号：US299149

申请日：1999-04-26

申请人： Masaaki Kinugawa

发明人： Masaaki Kinugawa

IPC分类号： H01L23/528 ,  H01L21/4763

CPC分类号： H01L23/528 ,  H01L2924/0002 ,  Y10S438/926

摘要： The semiconductor of this invention is provided with a first inter-layer insulating film formed on the surface of a semiconductor substrate to a first film thickness; a plurality of first wiring patterns formed on the surface of the first inter-layer insulating film; a dummy pattern formed between the first wiring patterns and insulated electrically from the wiring patterns; a second inter-layer insulating film formed from the first inter-layer insulating film to a second film thickness so as to cover the surfaces of the first inter-layer insulating film, the first wiring patterns, the dummy pattern; and second wiring patterns formed on the surface of the second inter-layer insulating film and wherein the dummy pattern has no planar overlapped portion with respect to the second wiring patterns, that is, it is separated from the second wiring patterns in top view.

摘要翻译： 本发明的半导体设置有形成在半导体衬底的表面上的第一层间绝缘膜至第一膜厚度; 形成在所述第一层间绝缘膜的表面上的多个第一布线图案; 形成在所述第一布线图案之间并与所述布线图形电绝缘的虚设图案; 第二层间绝缘膜，由第一层间绝缘膜形成为第二膜厚，以覆盖第一层间绝缘膜，第一布线图案，虚设图案的表面; 以及形成在第二层间绝缘膜的表面上的第二布线图案，并且其中虚设图案相对于第二布线图案没有平面重叠部分，即在顶视图中与第二布线图案分离。

公开(公告)号：US5027186A

公开(公告)日：1991-06-25

申请号：US473436

申请日：1990-02-01

申请人： Masaaki Kinugawa

发明人： Masaaki Kinugawa

IPC分类号： H01L27/04 ,  H01L21/822 ,  H01L21/8244 ,  H01L27/11

CPC分类号： H01L27/1112 ,  Y10S257/904

摘要： A static random access memory comprises a first power source, a second power source, a first resistor connected at one end to the first power source, a second resistor connected at one end to the first power source, a first FET including a first source connected to the second power source, a first drain connected to the other end of the first resistor, and a first gate arranged in parallel and electrically connected to the second resistor, via an insulating film, thereby varying a resistance value of the second resistor, and a second FET including a second source connected to the second power source, a second drain connected to the other end of the second resistor, and a second gate arranged in parallel and electrically connected to the first resistor, via an insulating film, thereby varying a resistance value of the first resistor.

摘要翻译： 静态随机存取存储器包括第一电源，第二电源，一端连接到第一电源的第一电阻器，一端连接到第一电源的第二电阻器，包括第一源极连接的第一FET 到第二电源，连接到第一电阻器的另一端的第一漏极和经由绝缘膜并联布置并电连接到第二电阻器的第一栅极，由此改变第二电阻器的电阻值，以及 第二FET，包括连接到第二电源的第二源极，连接到第二电阻器的另一端的第二漏极和经由绝缘膜平行并电连接到第一电阻器的第二栅极，从而改变 第一个电阻的电阻值。

公开(公告)号：US4971926A

公开(公告)日：1990-11-20

申请号：US285395

申请日：1988-12-16

申请人： Masaaki Kinugawa

发明人： Masaaki Kinugawa

IPC分类号： H01L27/10 ,  H01L21/145 ,  H01L21/76 ,  H01L21/762 ,  H01L21/822 ,  H01L21/8242 ,  H01L27/04 ,  H01L27/07 ,  H01L27/08 ,  H01L27/108 ,  H01L29/04 ,  H01L29/94

CPC分类号： H01L29/045 ,  H01L21/76237 ,  H01L27/0727 ,  H01L27/10829 ,  H01L29/945 ,  Y10S438/973

摘要： A semiconductor device comprising a semiconductor substrate having a principal surface constituted by crystal plane (100) formed with a groove, which is utilized for an element isolation region, a capacitor element, etc., wherein at least one of the side wall surfaces of the groove is constituted by a (100) crystal plane. There is also proposed a method of forming a groove having at least one crystal plane side surface in a crystal plane surface of a semiconductor substrate.

摘要翻译： 一种半导体器件，包括具有由形成有用于元件隔离区域的沟槽的晶体平面（100）构成的主表面的半导体衬底，电容器元件等，其中至少一个侧壁表面 槽由（100）晶面构成。 还提出了在半导体衬底的晶体平面表面中形成具有至少一个晶面侧面的沟槽的方法。

公开(公告)号：US06389782B1

公开(公告)日：2002-05-21

申请号：US09232721

申请日：1999-01-19

申请人： Masaaki Kinugawa ,  Kazuya Sato

发明人： Masaaki Kinugawa ,  Kazuya Sato

IPC分类号： B65B5110

CPC分类号： B41M5/03 ,  B41M3/12 ,  B65B11/105 ,  B65B61/025

摘要： A method and an apparatus for wrapping an elongated article with using a tranfer printing film are provided. A transfer printing film comprising a substrate film and a pattern-decorated transfer layer on the substrate film is drawn out from a roll thereof, and fed to a surface of the article which is conveyed horizontally by the convey rollers. The printing film is subject to an adhesive application during the travel to the article on the rollers. A hot melt type adhesive is employed as the adhesive, which type of adhesive can be easily regulated in thickness by an applicator. The printing film adheres to the article by the thick hot melt type adhesive to the article surface, and pressed with heat to transfer the decorated transfer layer with adhesive together integrally. Peeling off the substrate film finally, a smooth, quality and decrated article with a pattern such as the grain of wood or stone is obtained superior in appearance, because the thick hot melt type adhesion between the transfer layer and the article satisfactorily cover the cracks, flaws, roughness of the article.

摘要翻译： 提供了一种使用转印印刷膜包裹细长制品的方法和装置。 将包含基材膜和图案转印层的转印印刷膜从其辊上拉出，并送入通过输送辊水平输送的物品的表面。 印刷膜在行进到辊子上的物品时经受粘合剂应用。 使用热熔型粘合剂作为粘合剂，通过涂布器可以容易地调节粘合剂的厚度。 印刷膜通过厚的热熔型粘合剂粘附到制品表面上，并且被加热压制以将装饰的转印层与粘合剂一起转移。 最终剥离基材膜，由于在转印层和制品之间的厚的热熔型粘合令人满意地覆盖裂纹，因此在外观上获得了具有诸如木材或石材的图案的光滑，质量和脱落的制品， 瑕疵，粗糙的文章。

公开(公告)号：US5215936A

公开(公告)日：1993-06-01

申请号：US292112

申请日：1988-12-30

申请人： Masaaki Kinugawa

发明人： Masaaki Kinugawa

IPC分类号： H01L21/336 ,  H01L29/78

CPC分类号： H01L29/6659 ,  H01L29/7836

摘要： A semiconductor device includes a semiconductor body of one conductivity type, source and drain regions formed in the surface area of the semiconductor body, a gate insulating film formed on the semiconductor body between the source and drain regions, a gate electrode formed on the gate insulating film, an insulating member formed on the source and drain regions and in contact with the side walls of the gate electrode. Each of the source and drain regions includes a first impurity region of the opposite conductivity type and a second impurity region having a higher impurity concentration than that of the first impurity region and formed in the first impurity region to extend below the gate electrode.

摘要翻译： 一种半导体器件包括：一个导电类型的半导体本体，形成在该半导体主体的表面区域中的源区和漏区;栅极绝缘膜，形成在该源极和漏极区之间的该半导体本体上;栅电极， 膜，形成在源区和漏区上并与栅电极的侧壁接触的绝缘构件。 源区和漏区各自包括相反导电类型的第一杂质区和具有比第一杂质区的杂质浓度高的杂质浓度的第二杂质区，并形成在第一杂质区中以在栅电极下方延伸。