Using Virtual Table Protections to Prevent the Exploitation of Object Corruption Vulnerabilities
    1.
    发明申请
    Using Virtual Table Protections to Prevent the Exploitation of Object Corruption Vulnerabilities 有权
    使用虚拟表格保护来防止对象损坏漏洞利用

    公开(公告)号:US20120144480A1

    公开(公告)日:2012-06-07

    申请号:US12958668

    申请日:2010-12-02

    IPC分类号: G06F21/00

    CPC分类号: G06F21/6218 G06F2221/2143

    摘要: The subject disclosure is directed towards preventing the exploitation by malicious code of object state corruption vulnerabilities, such as use-after-free vulnerabilities. An object class is configured with a secret cookie in a virtual function table of the object, e.g., inserted at compile time. An instrumentation check inserted in the program code evaluates the secret cookie to determine whether the object state has been corrupted before object access (e.g., a call to one of the object's methods) is allowed. If corrupted, access to the object is prevented by the instrumentation check. Another instrumentation check may be used to determine whether the object's virtual table pointer points to a location outside of the module that contains the legitimate virtual function table; if so, object access is prevented.

    摘要翻译: 该主题披露旨在防止恶意代码利用对象状态破坏漏洞(例如使用后免费漏洞)。 对象类在对象的虚拟功能表中配置有秘密cookie,例如在编译时插入。 插入程序代码中的检测检查将评估秘密cookie,以确定对象状态是否在对象访问之前已被破坏(例如,对对象的方法之一的调用)。 如果损坏,仪器检查会阻止对对象的访问。 可以使用另一种仪器检查来确定对象的虚拟表指针是否指向包含合法虚拟功能表的模块之外的位置; 如果是这样,则可以防止对象访问。

    DIGITAL PULSE WIDTH MODULATION FOR HALF BRIDGE AMPLIFIERS
    2.
    发明申请
    DIGITAL PULSE WIDTH MODULATION FOR HALF BRIDGE AMPLIFIERS 有权
    用于半桥式放大器的数字脉冲宽度调制

    公开(公告)号:US20100109767A1

    公开(公告)日:2010-05-06

    申请号:US12262127

    申请日:2008-10-30

    IPC分类号: H03F3/38 H03F3/217

    CPC分类号: H03F3/217

    摘要: A switching amplifier drives a load or audio transducer. A digital integral noise shaping circuit converts a digital input such as audio content to an output digital pulse width modulated signal using an integrator. The integrator integrates the digital input, a variable frequency reference pulse width modulated signal and an inverse of the output digital pulse width modulated signal. A half bridge amplifier receives the output digital pulse width modulated signal and drives the load or audio transducer. A variable frequency generator generates the variable frequency reference pulse width modulated signal with an approximately equal duty ratio or alternatively varies the variable frequency pulse width modulated signal above and below about a fifty percent duty ratio.

    摘要翻译: 开关放大器驱动负载或音频传感器。 数字积分噪声整形电路使用积分器将诸如音频内容的数字输入转换为输出数字脉宽调制信号。 积分器将数字输入,可变频率参考脉冲宽度调制信号和输出数字脉宽调制信号的反相相结合。 半桥放大器接收输出数字脉宽调制信号并驱动负载或音频传感器。 可变频率发生器以大致相等的占空比产生可变频率参考脉冲宽度调制信号,或者可选地改变高于和低于约百分之五十占空比的可变频率脉宽调制信号。

    Method and system for determining an element conversion characteristic contemporaneous with converting and input signal in a signal converter
    3.
    发明授权
    Method and system for determining an element conversion characteristic contemporaneous with converting and input signal in a signal converter 有权
    用于确定与信号转换器中的转换和输入信号同时的元件转换特性的方法和系统

    公开(公告)号:US06411232B1

    公开(公告)日:2002-06-25

    申请号:US09409779

    申请日:1999-09-30

    IPC分类号: H03M110

    CPC分类号: H03M3/386 H03M3/388 H03M3/424

    摘要: A converter continuously converts an input signal (110) to an output signal (112) even during correction and compensation. A primary converter (124) converts the signal along a forward primary path (104). A feedback converter (140) along a feedback path (106) outputs a feedback signal (116). A reference device (136) employs reference indicator (134) to provide a digital reference signal (135). A selection device (132) passes the digital reference signal (135) to an element (204) of the feedback converter (140) for outputting reference portion (208) of the feedback signal (116). The passing of the digital reference signal (135) to the element (204) is contemporaneous with the converting of the input signal (110) to the output signal (112). The evaluator (142) determines a conversion characteristic of the element (204) by employing a characteristic of the reference indicator (134).

    摘要翻译: 即使在校正和补偿期间,A转换器也将输入信号(110)连续地转换为输出信号(112)。 主转换器(124)沿着前向主路径(104)转换信号。 沿反馈路径(106)的反馈转换器(140)输出反馈信号(116)。 参考装置(136)使用参考指示器(134)来提供数字参考信号(135)。 选择装置(132)将数字参考信号(135)传递到反馈转换器(140)的元件(204),用于输出反馈信号(116)的参考部分(208)。 将数字参考信号(135)传递到元件(204)同时与输入信号(110)转换为输出信号(112)。 评估器(142)通过采用参考指示符(134)的特性来确定元件(204)的转换特性。

    Digital pulse width modulation for half bridge amplifiers
    5.
    发明授权
    Digital pulse width modulation for half bridge amplifiers 有权
    半桥放大器的数字脉宽调制

    公开(公告)号:US07825726B2

    公开(公告)日:2010-11-02

    申请号:US12262127

    申请日:2008-10-30

    IPC分类号: H03F3/38

    CPC分类号: H03F3/217

    摘要: A switching amplifier drives a load or audio transducer. A digital integral noise shaping circuit converts a digital input such as audio content to an output digital pulse width modulated signal using an integrator. The integrator integrates the digital input, a variable frequency reference pulse width modulated signal and an inverse of the output digital pulse width modulated signal. A half bridge amplifier receives the output digital pulse width modulated signal and drives the load or audio transducer. A variable frequency generator generates the variable frequency reference pulse width modulated signal with an approximately equal duty ratio or alternatively varies the variable frequency pulse width modulated signal above and below about a fifty percent duty ratio.

    摘要翻译: 开关放大器驱动负载或音频传感器。 数字积分噪声整形电路使用积分器将诸如音频内容的数字输入转换为输出数字脉宽调制信号。 积分器将数字输入,可变频率参考脉冲宽度调制信号和输出数字脉宽调制信号的反相相结合。 半桥放大器接收输出数字脉宽调制信号并驱动负载或音频传感器。 可变频率发生器以大致相等的占空比产生可变频率参考脉冲宽度调制信号,或者可选地改变高于和低于约百分之五十占空比的可变频率脉宽调制信号。

    RF transmitter with interleaved IQ modulation
    7.
    发明授权
    RF transmitter with interleaved IQ modulation 有权
    具有交错IQ调制的RF发射机

    公开(公告)号:US07609779B2

    公开(公告)日:2009-10-27

    申请号:US11363463

    申请日:2006-02-27

    IPC分类号: H04L27/00

    CPC分类号: H04L27/2071

    摘要: An RF modulator supporting wide-band signals includes IQ modulation by interleaving the in-phase and quadrature signals. The modulator can be implemented using an integrated circuit having a baseband in-phase stage that receives an in-phase analog input signal, a baseband quadrature stage that receives a quadrature analog input signal, and a switching mixer having a plurality of switches. The switching mixer receives in-phase and quadrature signals from the baseband in-phase stage and the baseband quadrature stage. The switching mixer produces a differential signal combining the in-phase and quadrature signals by interleaving the signals over a plurality of phases of a carrier period.

    摘要翻译: 支持宽带信号的RF调制器通过交织同相和正交信号来包括IQ调制。 可以使用具有接收同相模拟输入信号的基带同相级的集成电路,接收正交模拟输入信号的基带正交级和具有多个开关的开关混频器来实现调制器。 开关混频器从基带同相级和基带正交级接收同相和正交信号。 开关混频器通过在载波周期的多个相位上交织信号来产生组合同相和正交信号的差分信号。

    Method and system for analog to digital conversion using digital pulse width modulation (PWM)
    8.
    发明授权
    Method and system for analog to digital conversion using digital pulse width modulation (PWM) 有权
    使用数字脉宽调制(PWM)模数转换的方法和系统

    公开(公告)号:US06965339B2

    公开(公告)日:2005-11-15

    申请号:US10819644

    申请日:2004-04-07

    IPC分类号: H03M1/12 H03M1/34 H03M3/02

    CPC分类号: H03M3/00

    摘要: A system and method for analog-to-digital conversion using digital pulse width modulation (PWM) is disclosed. The method and system according to the disclosed invention converts an analog input signal to a digital signal in pulse code modulated (PCM) form. The disclosed invention uses a feedback circuit to perform PWM of the analog input signal. The PWM signal is then decimated to obtain the digital signal in PCM form. The system according to the disclosed invention requires lower operating frequency and dissipates lesser power than prior art systems providing the same sampling frequency and resolution. The operation at a lower frequency is achieved by obtaining two samples from every pulse of the PWM signal; the first sample being obtained from the right duty ratio, and the second sample being obtained form the left duty ratio. Further, the disclosed invention has lesser implementation complexity and higher signal-to-noise ratio than prior art.

    摘要翻译: 公开了一种使用数字脉宽调制(PWM)进行模数转换的系统和方法。 根据所公开的发明的方法和系统将模拟输入信号转换成脉冲编码调制(PCM)形式的数字信号。 所公开的发明使用反馈电路来执行模拟输入信号的PWM。 然后抽取PWM信号以获得PCM形式的数字信号。 根据所公开的发明的系统需要更低的工作频率并且消耗比提供相同采样频率和分辨率的现有技术系统更小的功率。 通过从PWM信号的每个脉冲获得两个采样来实现较低频率的操作; 从正确的占空比获得第一个样品,并且从左占空比获得第二个样品。 此外,所公开的发明比现有技术具有较小的实现复杂度和更高的信噪比。

    Continuous-time sigma-delta modulator with discrete time common-mode feedback
    9.
    发明授权
    Continuous-time sigma-delta modulator with discrete time common-mode feedback 有权
    具有离散时间共模反馈的连续时间Σ-Δ调制器

    公开(公告)号:US06697001B1

    公开(公告)日:2004-02-24

    申请号:US10324684

    申请日:2002-12-19

    IPC分类号: H03M302

    CPC分类号: H03M3/356 H03M3/43 H03M3/456

    摘要: Systems and methods are described for a continuous-time sigma-delta modulator with discrete time common-mode feedback. The method includes calculating an integrator input signal as a difference between an input signal and a modulation feedback signal, continuous time integrating the integrator input signal to produce an integrator output signal having a common mode voltage, determining the common mode voltage of the integrator output signal using a discrete-time process, determining an integrator feedback signal as a function of the common-mode voltage and feeding back the feedback signal to the integrator in order to maintain the common mode voltage at a substantially constant value, sampling and quantizing the integrator output signal to produce a sigma-delta modulated output signal and converting the sigma-delta modulated output signal from a digital signal to an analog signal, to produce the modulation feedback signal.

    摘要翻译: 对具有离散时间共模反馈的连续时间Σ-Δ调制器描述了系统和方法。 该方法包括:计算积分器输入信号作为输入信号和调制反馈信号之间的差值,连续时间积分积分器输入信号以产生具有共模电压的积分器输出信号,确定积分器输出信号的共模电压 使用离散时间过程,确定作为共模电压的函数的积分器反馈信号并将反馈信号反馈到积分器,以便将共模电压保持在基本恒定的值,对积分器输出进行采样和量化 信号以产生Σ-Δ调制输出信号,并将Σ-Δ调制输出信号从数字信号转换成模拟信号,以产生调制反馈信号。

    Digital tuning scheme for continuous-time sigma delta modulation
    10.
    发明授权
    Digital tuning scheme for continuous-time sigma delta modulation 有权
    用于连续时间Σ-Δ调制的数字调谐方案

    公开(公告)号:US06693572B1

    公开(公告)日:2004-02-17

    申请号:US10358055

    申请日:2003-02-04

    IPC分类号: H03M300

    CPC分类号: H03M3/382 H03M3/43 H03M3/456

    摘要: Systems and methods are described for a digital tuning scheme for continuous-time sigma-delta modulation. The method includes integrating a voltage from a voltage source using a discrete-time integrator to produce a discrete-time integrator output, continuous-time integrating a current from a controllable current source to produce a continuous-time integrator output, quantizing the difference between the continuous-time integrator output and the discrete-time integrator output to produce a quantizer output, controlling a polarity of the controllable current source with the quantizer output, counting the quantizer output to produce a feedback signal, and tuning the controllable current source as a function of the feedback signal.

    摘要翻译: 描述了用于连续时间Σ-Δ调制的数字调谐方案的系统和方法。 该方法包括使用离散时间积分器积分来自电压源的电压以产生离散时间积分器输出,将来自可控电流源的电流连续时间积分以产生连续时间积分器输出,量化 连续时间积分器输出和离散时间积分器输出以产生量化器输出,通过量化器输出来控制可控电流源的极性,对量化器输出进行计数以产生反馈信号,以及调节可控电流源作为一个功能 的反馈信号。