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公开(公告)号：US20140050243A1
公开(公告)日：2014-02-20
申请号：US13995689
申请日：2011-12-22
Applicant: Siddharth Jain , John Bowers , Matthew Sysak , John Heck , Ran Feldesh , Richard Jones , Yoel Shetrit , Michael Geva
Inventor： Siddharth Jain , John Bowers , Matthew Sysak , John Heck , Ran Feldesh , Richard Jones , Yoel Shetrit , Michael Geva
IPC: H01L23/00
CPC classification number: H01L24/45 , H01L21/28575 , H01L21/823814 , H01L21/823871 , H01L21/8258 , H01L27/1203 , H01L29/20 , H01L29/452 , H01L2224/45 , H01L2924/00011 , H01L2924/00014 , H01L2924/01006 , H01L2924/01015 , H01L2924/12042 , H01S5/021 , H01S5/0425 , H01L2924/00 , H01L2224/45099 , H01L2224/43
Abstract: A semiconductor metallurgy includes a ratio of germanium and palladium that provides low contact resistance to both n-type material and p-type material. The metallurgy allows for a contact that does not include gold and is compatible with mass-production CMOS techniques. The ratio of germanium and palladium can be achieved by stacking layers of the materials and annealing the stack, or simultaneously depositing the germanium and palladium on the material where the contact is to be manufactured.
Abstract translation: 半导体冶金学包括对n型材料和p型材料提供低接触电阻的锗和钯的比例。 冶金允许不包括金的接触，并且与大规模生产CMOS技术兼容。 锗和钯的比例可以通过堆叠材料的层并退火叠层来实现，或者同时将锗和钯沉积在要制造接触的材料上。
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公开(公告)号：US20160380407A1
公开(公告)日：2016-12-29
申请号：US15039837
申请日：2013-12-27
Applicant: Matthew SYSAK , Jock BOVINGTON
Inventor： Matthew Sysak , Jock Bovington
CPC classification number: H01S5/1228 , G02B6/1228 , G02B6/124 , H01S5/021 , H01S5/0654 , H01S5/1014 , H01S5/1032 , H01S5/1206 , H01S5/1225 , H01S5/1231 , H01S5/1237 , H01S5/22 , H01S5/3013 , H04B10/66 , H04B10/801
Abstract: Monolithic asymmetric optical waveguide grating resonators including an asymmetric resonant grating are disposed in a waveguide. A first grating strength is provided along a first grating length, and a second grating strength, higher than the first grating strength, is provided along a second grating length. In advantageous embodiments, the effective refractive index along first grating length is substantially matched to the effective refractive index along second grating length through proper design of waveguide and grating parameters. A well-matched effective index of refraction may permit the resonant grating to operate in a highly asymmetric single longitudinal mode (SLM). In further embodiments, an asymmetric monolithic DFB laser diode includes front and back grating sections having waveguide and grating parameters for highly asymmetric operation.
Abstract translation: 包括非对称谐振光栅的单片非对称光波导光栅谐振器设置在波导中。 沿着第一光栅长度提供第一光栅强度，并且沿着第二光栅长度提供高于第一光栅强度的第二光栅强度。 在有利的实施例中，通过波导和光栅参数的适当设计，沿着第一光栅长度的有效折射率基本上与第二光栅长度的有效折射率匹配。 良好匹配的有效折射率可以允许谐振光栅以高度不对称的单纵模（SLM）工作。 在另外的实施例中，不对称单片DFB激光二极管包括具有用于高度不对称操作的波导和光栅参数的前后光栅部分。
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Patent Agency Ranking
公开(公告)号：US08111729B2
公开(公告)日：2012-02-07
申请号：US12054771
申请日：2008-03-25
Applicant: Matthew Sysak , Richard Jones
Inventor： Matthew Sysak , Richard Jones
IPC: H01S5/00
CPC classification number: H01S5/026 , B82Y20/00 , H01S5/0215 , H01S5/0217 , H01S5/1032 , H01S5/1071 , H01S5/12 , H01S5/3414 , H01S5/3434 , H01S5/4087
Abstract: A multi-wavelength array of hybrid silicon lasers and a method of fabricating such a device. The method may include providing a silicon-on-insulator wafer; patterning waveguides in the silicon-on-insulator wafer; providing a III-V wafer comprising multiple layers; applying quantum well intermixing to obtain a plurality of regions of different bandgaps within the III-V wafer; and bonding the silicon on insulator wafer with the III-V wafer.
Abstract translation: 混合硅激光器的多波长阵列和制造这种器件的方法。 该方法可以包括提供绝缘体上硅晶片; 在绝缘体上硅晶片上构图波导; 提供包括多层的III-V晶片; 应用量子阱混合以在III-V晶片内获得不同带隙的多个区域; 以及将绝缘体上的硅晶片与III-V晶片结合。
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公开(公告)号：US20090245316A1
公开(公告)日：2009-10-01
申请号：US12054771
申请日：2008-03-25
Applicant: Matthew Sysak , Richard Jones
Inventor： Matthew Sysak , Richard Jones
CPC classification number: H01S5/026 , B82Y20/00 , H01S5/0215 , H01S5/0217 , H01S5/1032 , H01S5/1071 , H01S5/12 , H01S5/3414 , H01S5/3434 , H01S5/4087
Abstract: A multi-wavelength array of hybrid silicon lasers and a method of fabricating such a device. The method may include providing a silicon-on-insulator wafer; patterning waveguides in the silicon-on-insulator wafer; providing a III-V wafer comprising multiple layers; applying quantum well intermixing to obtain a plurality of regions of different bandgaps within the III-V wafer; and bonding the silicon on insulator wafer with the III-V wafer.
Abstract translation: 混合硅激光器的多波长阵列和制造这种器件的方法。 该方法可以包括提供绝缘体上硅晶片; 在绝缘体上硅晶片上构图波导; 提供包括多层的III-V晶片; 应用量子阱混合以在III-V晶片内获得不同带隙的多个区域; 以及将绝缘体上的硅晶片与III-V晶片结合。
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公开(公告)号：US09252118B2
公开(公告)日：2016-02-02
申请号：US13995689
申请日：2011-12-22
Applicant: Siddharth Jain , John Bowers , Matthew Sysak , John Heck , Ran Feldesh , Richard Jones , Yoel Shetrit , Michael Geva
Inventor： Siddharth Jain , John Bowers , Matthew Sysak , John Heck , Ran Feldesh , Richard Jones , Yoel Shetrit , Michael Geva
IPC: H01S5/042 , H01L23/00 , H01L21/8238 , H01L21/8258 , H01L21/285 , H01L29/45 , H01L27/12 , H01L29/20 , H01S5/02
CPC classification number: H01L24/45 , H01L21/28575 , H01L21/823814 , H01L21/823871 , H01L21/8258 , H01L27/1203 , H01L29/20 , H01L29/452 , H01L2224/45 , H01L2924/00011 , H01L2924/00014 , H01L2924/01006 , H01L2924/01015 , H01L2924/12042 , H01S5/021 , H01S5/0425 , H01L2924/00 , H01L2224/45099 , H01L2224/43
Abstract: A semiconductor metallurgy includes a ratio of germanium and palladium that provides low contact resistance to both n-type material and p-type material. The metallurgy allows for a contact that does not include gold and is compatible with mass-production CMOS techniques. The ratio of germanium and palladium can be achieved by stacking layers of the materials and annealing the stack, or simultaneously depositing the germanium and palladium on the material where the contact is to be manufactured.
Abstract translation: 半导体冶金学包括对n型材料和p型材料提供低接触电阻的锗和钯的比例。 冶金允许不包括金的接触，并且与大规模生产CMOS技术兼容。 锗和钯的比例可以通过堆叠材料的层并退火叠层来实现，或者同时将锗和钯沉积在要制造接触的材料上。
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公开(公告)号：US07639719B2
公开(公告)日：2009-12-29
申请号：US11968000
申请日：2007-12-31
Applicant: Alexander Fang , Richard Jones , Hyundai Park , Matthew Sysak
Inventor： Alexander Fang , Richard Jones , Hyundai Park , Matthew Sysak
CPC classification number: H01S5/024 , H01S5/021 , H01S5/0218 , H01S5/02236 , H01S5/02415 , H01S5/02476 , H01S5/026 , H01S5/0425 , H01S5/1032
Abstract: An optimized structure for heat dissipation is provided that may include two types of thermal shunts. The first type of thermal shunt employed involves using p and n metal contact layers to conduct heat away from the active region and into the silicon substrate. The second type of thermal shunt involves etching and backfilling a portion of the silicon wafer with poly-silicon to conduct heat to the silicon substrate.
Abstract translation: 提供了一种用于散热的优化结构，其可以包括两种类型的热分流器。 采用的第一种类型的热分路器涉及使用p和n金属接触层将热量从有源区域导入硅衬底。 第二种类型的热分流涉及用多晶硅蚀刻和回填硅晶片的一部分以将热传导到硅衬底。
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公开(公告)号：US20090168821A1
公开(公告)日：2009-07-02
申请号：US11968000
申请日：2007-12-31
Applicant: Alexander Fang , Richard Jones , Hyundai Park , Matthew Sysak
Inventor： Alexander Fang , Richard Jones , Hyundai Park , Matthew Sysak
CPC classification number: H01S5/024 , H01S5/021 , H01S5/0218 , H01S5/02236 , H01S5/02415 , H01S5/02476 , H01S5/026 , H01S5/0425 , H01S5/1032
Abstract: An optimized structure for heat dissipation is provided that may include two types of thermal shunts. The first type of thermal shunt employed involves using p and n metal contact layers to conduct heat away from the active region and into the silicon substrate. The second type of thermal shunt involves etching and backfilling a portion of the silicon wafer with poly-silicon to conduct heat to the silicon substrate.
Abstract translation: 提供了一种用于散热的优化结构，其可以包括两种类型的热分流器。 采用的第一种类型的热分路器涉及使用p和n金属接触层将热量从有源区域导入硅衬底。 第二种类型的热分流涉及用多晶硅蚀刻和回填硅晶片的一部分以将热传导到硅衬底。
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