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1.
公开(公告)号:US06482289B1
公开(公告)日:2002-11-19
申请号:US08540139
申请日:1995-10-06
IPC分类号: B32B3100
CPC分类号: H01L24/16 , H01L24/29 , H01L24/83 , H01L2224/13099 , H01L2224/16225 , H01L2224/16237 , H01L2224/2919 , H01L2224/73204 , H01L2224/83192 , H01L2224/838 , H01L2924/00014 , H01L2924/01006 , H01L2924/01013 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01079 , H01L2924/0665 , H01L2924/0781 , H01L2924/14 , H01L2924/19041 , H01L2924/19043 , H05K3/321 , H05K3/4069 , H05K2201/0394 , H05K2201/09472 , H05K2201/10674 , H05K2201/10977 , H05K2203/1189 , Y10T428/31515 , H01L2924/00 , H01L2224/0401
摘要: An assembly and method for connecting two substrates utilizes a nonconductive laminant that is compatible when wet with a conductive paste when wet. Thus, the curing of the nonconductive laminant and the conductive paste may be performed together. The nonconductive laminant also cures in a shorter time than those previously available, thus the stress on the semiconductor device created by exposure to the cure temperature is additionally reduced.
摘要翻译: 用于连接两个基板的组件和方法使用非导电层压体,当在湿润时用导电浆润湿时,其是相容的。 因此,可以一起执行非导电层压体和导电浆料的固化。 非导电层压体还在比以前可用的时间短的时间内固化,因此通过暴露于固化温度而产生的对半导体器件的应力被额外地降低。
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公开(公告)号:US6022761A
公开(公告)日:2000-02-08
申请号:US654466
申请日:1996-05-28
IPC分类号: H05K1/18 , H01L21/60 , H01L23/485 , H01L23/498 , H05K1/14 , H05K3/36 , H01L21/44 , H01L21/48 , H01L21/50
CPC分类号: H01L24/13 , H01L23/49827 , H01L24/16 , H01L24/29 , H01L24/81 , H01L24/83 , H01L2224/11003 , H01L2224/13099 , H01L2224/13144 , H01L2224/13147 , H01L2224/1319 , H01L2224/16225 , H01L2224/16227 , H01L2224/16237 , H01L2224/29101 , H01L2224/2919 , H01L2224/2929 , H01L2224/29339 , H01L2224/81801 , H01L2224/8319 , H01L2224/838 , H01L2924/00013 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01057 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/0665 , H01L2924/07802 , H01L2924/0781 , H01L2924/14 , H01L2924/15153 , H01L2924/1517
摘要: A method for connecting substrates includes using an adhesive interposer structure (11) to bond a semiconductor device (26) to a substrate (18). The adhesive interposer structure (11) includes a non-conductive adhesive laminant (12) and conductive adhesive bumps (13). The conductive adhesive bumps (13) provide a conductive path between conductive bumps (27) on the semiconductor device (26) and conductive metal pads (21) located on the substrate (18). In an alternative embodiment, a conductive adhesive material (34) is screen or stencil printed into vias (39) located on a printed circuit board (38) to form conductive adhesive bumps (33). A non-conductive adhesive (52) is then screen or stencil printed onto the printed circuit board (38) adjacent the conductive adhesive bumps (33). A semiconductor die is then connected to the structure.
摘要翻译: 一种用于连接衬底的方法包括使用粘合剂插入物结构(11)将半导体器件(26)接合到衬底(18)。 粘合剂插入物结构(11)包括非导电粘合剂层压体(12)和导电粘合剂凸块(13)。 导电粘合剂凸块(13)在半导体器件(26)上的导电凸块(27)和位于衬底(18)上的导电金属焊盘(21)之间提供导电路径。 在替代实施例中,导电粘合剂材料(34)是印刷在位于印刷电路板(38)上的通孔(39)中以形成导电粘合剂凸块(33)的筛网或模板。 然后将非导电粘合剂(52)屏蔽或模板印刷到邻近导电粘合剂凸块(33)的印刷电路板(38)上。 然后将半导体管芯连接到该结构。
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公开(公告)号:US5268065A
公开(公告)日:1993-12-07
申请号:US993984
申请日:1992-12-21
IPC分类号: H01L21/02 , H01L21/302 , H01L21/304 , H01L21/306 , H01L21/68 , H01L21/78 , B44C1/22
CPC分类号: H01L21/78 , H01L21/6835 , H01L21/6836 , H01L2221/68327 , H01L2221/6834 , H01L2221/68386 , Y10S438/977
摘要: A method for thinning a semiconductor wafer (11) is provided. An support film (15) is mounted to the semiconductor wafer (11). The support film (15) provides support for a semiconductor wafer during thinning as well as protection for a front-side (12) of the semiconductor wafer (11). After mounting the support film (15) to the semiconductor wafer (11), a back-side (13) of the semiconductor wafer is etched in a two step process. First the back-side (13) undergoes a mechanical grinding followed by a chemical etch. A metal film (18) may be sputtered on the back-side (13). The semiconductor wafer (11) having the support film (15) is placed in a tape frame (20) for dicing operations and the support film (15) is removed from the front-side (12) of the semiconductor wafer (11).
摘要翻译: 提供了一种用于减薄半导体晶片(11)的方法。 支撑膜(15)安装到半导体晶片(11)上。 支撑膜(15)在减薄期间为半导体晶片提供支撑以及保护半导体晶片(11)的前侧(12)。 在将支撑膜(15)安装到半导体晶片(11)之后,以两步工艺蚀刻半导体晶片的背面(13)。 首先,背面(13)进行机械研磨,然后进行化学蚀刻。 金属膜(18)可以在背面(13)上溅射。 具有支撑膜(15)的半导体晶片(11)被放置在用于切割操作的带框架(20)中,并且从半导体晶片(11)的前侧(12)去除支撑膜(15)。
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公开(公告)号:US5346848A
公开(公告)日:1994-09-13
申请号:US70068
申请日:1993-06-01
IPC分类号: H01L21/02 , H01L21/20 , H01L21/76 , H01L21/762 , H01L27/12 , H01L21/302
CPC分类号: H01L21/2007 , Y10S148/012 , Y10S148/135
摘要: A silicon wafer and a III-V semiconductor wafer are bonded together through a bonding interlayer which is deposited on the III-V semiconductor wafer. By forming the bonding interlayer on the III-V semiconductor wafer, rather than the silicon wafer, the bonding process is facilitated, creating a sufficiently strong bond to carry out further processing. The III-V semiconductor wafer is thinned to relieve stress after the bonding procedure. The bonded wafers may be subjected to a second bonding procedure to increase the bond strength. The bonded wafers can then be subjected to high temperature processing used in semiconductor device fabrication.
摘要翻译: 硅晶片和III-V半导体晶片通过沉积在III-V半导体晶片上的键合中间层结合在一起。 通过在III-V半导体晶片而不是硅晶片上形成接合中间层,便于结合工艺,产生足够强的键以进行进一步的处理。 III-V半导体晶片被稀薄以在接合过程之后减轻应力。 接合的晶片可以经受第二接合过程以增加粘结强度。 接合的晶片然后可以进行用于半导体器件制造的高温处理。
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公开(公告)号:US5080933A
公开(公告)日:1992-01-14
申请号:US577248
申请日:1990-09-04
IPC分类号: H01L21/205 , C23C16/02 , C23C16/04 , H01L21/76
CPC分类号: C23C16/0236 , C23C16/0209 , C23C16/04
摘要: A method for selectively depositing polysilicon on a semiconductor surface (13) is accomplished by preparing the surface (13) in a manner to provide a contamination free surface. The contamination free semiconductor surface is placed into a chemical vapor deposition reactor. The semiconductor surface (13) is exposed to a single crystal inhibitor gas to prevent formation of single crystal silicon on surface (13). Semiconductor surface (13) is then exposed to a silicon containing gas with a hydrogen source to form the polysilicon.
摘要翻译: 通过以提供无污染表面的方式制备表面(13)来实现在半导体表面(13)上选择性地沉积多晶硅的方法。 将无污染的半导体表面放置在化学气相沉积反应器中。 半导体表面(13)暴露于单晶抑制气体,以防止在表面(13)上形成单晶硅。 然后将半导体表面(13)用氢源暴露于含硅气体以形成多晶硅。
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