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    SUBSTRATE STRUCTURE
    1.
    发明申请
    SUBSTRATE STRUCTURE 有权
    基板结构

    公开(公告)号：US20130277093A1

    公开(公告)日：2013-10-24

    申请号：US13572705

    申请日：2012-08-13

    Applicant: Sheng-Yuan Sun ,  Po-Jen Su

    Inventor： Sheng-Yuan Sun ,  Po-Jen Su

    IPC: H05K1/02

    CPC classification number: H01L25/0753 ,  H01L23/3677 ,  H01L33/62 ,  H01L33/642 ,  H01L2924/0002 ,  H01L2924/00

    Abstract: A substrate structure for carrying plural heat generating elements is provided. The substrate structure includes a board, a patterned metal layer and plural heat dissipating channels. The board has an upper surface. The patterned metal layer is disposed on the board and includes a first electrode, a second electrode, plural first pads and plural second pads. The first pads and the second pads are alternatively disposed on the upper surface in parallel. Parts of the first (second) pads are electrically connected to the first (second) electrode. The other parts of first pads and the other parts of second pads are electrically connected to each other. Each first pad and the adjacent second pad define a device bonding area. The heat generating elements are respectively disposed in the device bonding areas. There are multiple trenches between the two adjacent device bonding areas. The heat dissipating channels are disposed in the trenches.

    Abstract translation: 提供了用于承载多个发热元件的基板结构。 基板结构包括板，图案化金属层和多个散热通道。 电路板有一个上表面。 图案化金属层设置在板上，包括第一电极，第二电极，多个第一焊盘和多个第二焊盘。 第一焊盘和第二焊盘交替地平行布置在上表面上。 第一（第二）焊盘的部分电连接到第一（第二）电极。 第一焊盘的其他部分和第二焊盘的其它部分彼此电连接。 每个第一焊盘和相邻的第二焊盘限定一个器件接合区域。 发热元件分别设置在装置接合区域中。 两个相邻的器件接合区域之间有多个沟槽。 散热通道设置在沟槽中。

    SEMICONDUCTOR PACKAGE STRUCTURE
    2.
    发明申请
    SEMICONDUCTOR PACKAGE STRUCTURE 有权
    半导体封装结构

    公开(公告)号：US20130153944A1

    公开(公告)日：2013-06-20

    申请号：US13670438

    申请日：2012-11-06

    Applicant: Po-Jen Su ,  Chih-Ling Wu ,  Yi-Ru Huang ,  Yi-Ju Shih

    Inventor： Po-Jen Su ,  Chih-Ling Wu ,  Yi-Ru Huang ,  Yi-Ju Shih

    IPC: H01L33/60

    CPC classification number: H01L33/62 ,  H01L33/46 ,  H01L2224/48091 ,  H01L2924/00014

    Abstract: A semiconductor package structure includes an insulating substrate, a patterned conductive layer, a light emitting diode (LED) chip and a conductive connection part. The insulating substrate has an upper surface divided into an element configuration region and an element bonding region. The patterned conductive layer includes plural circuits located in the element configuration region and at least one bonding pad located in the element bonding region. The LED chip is flip chip bonded on the patterned conductive layer and electrically connected to the circuits. The conductive connection part has a first end point electrically connected to the bonding pad and a second end point electrically connected to an external circuit. The bonding pad and a corner of the LED chip are disposed correspondingly. A horizontal distance between an apex of the corner and the first end point of the conductive connection part is greater than or equal to 30 micrometers.

    Abstract translation: 半导体封装结构包括绝缘衬底，图案化导电层，发光二极管（LED）芯片和导电连接部分。 绝缘基板具有分为元件配置区域和元件接合区域的上表面。 图案化导电层包括位于元件配置区域中的多个电路和位于元件接合区域中的至少一个焊盘。 LED芯片在图案化的导电层上被倒装芯片接合并电连接到电路。 导电连接部分具有电连接到焊盘的第一端点和电连接到外部电路的第二端点。 接合焊盘和LED芯片的角部相应地设置。 角的顶点与导电连接部的第一端点之间的水平距离大于或等于30微米。

    LIGHT EMITTING DEVICE
    3.
    发明申请
    LIGHT EMITTING DEVICE 审中-公开
    发光装置

    公开(公告)号：US20130148344A1

    公开(公告)日：2013-06-13

    申请号：US13670421

    申请日：2012-11-06

    Applicant: Po-Jen Su ,  Yun-Li Li ,  Yi-Ju Shih ,  Cheng-Yen Chen ,  Gwo-Jiun Sheu

    Inventor： Po-Jen Su ,  Yun-Li Li ,  Yi-Ju Shih ,  Cheng-Yen Chen ,  Gwo-Jiun Sheu

    IPC: F21V9/00

    CPC classification number: H01L25/075 ,  H01L33/62 ,  H01L33/641 ,  H01L2924/0002 ,  H01L2924/00

    Abstract: A light emitting device including an insulating substrate, a plurality of light emitting diode (LED) chips and a patterned conductive layer is provided. The insulating substrate has an upper surface. The LED chips are disposed on the insulating substrate and located on the upper surface. The dominant wavelengths of the LED chips are in a wavelength range of a specific color light and the dominant wavelengths of at least two of the LED chips are different. The patterned conductive layer is disposed between the insulating substrate and LED chips, and electrically connected to the LEDs chip.

    Abstract translation: 提供了包括绝缘基板，多个发光二极管（LED）芯片和图案化导电层的发光器件。 绝缘基板具有上表面。 LED芯片设置在绝缘基板上并位于上表面。 LED芯片的主要波长在特定颜色的光的波长范围内，并且至少两个LED芯片的主要波长是不同的。 图案化导电层设置在绝缘基板和LED芯片之间，并且电连接到LED芯片。

    ELECTRONIC DEVICE
    5.
    发明申请
    ELECTRONIC DEVICE 审中-公开
    电子设备

    公开(公告)号：US20130146912A1

    公开(公告)日：2013-06-13

    申请号：US13670412

    申请日：2012-11-06

    Applicant: Po-Jen Su ,  Yun-Li Li ,  Cheng-Yen Chen ,  Gwo-Jiun Sheu

    Inventor： Po-Jen Su ,  Yun-Li Li ,  Cheng-Yen Chen ,  Gwo-Jiun Sheu

    IPC: H01L33/60

    CPC classification number: H01L33/641 ,  H01L23/3677 ,  H01L33/46 ,  H01L33/486 ,  H01L33/62 ,  H01L33/642 ,  H01L33/647 ,  H01L2924/0002 ,  H01L2924/00

    Abstract: An electronic device including an insulating substrate, a plurality of conductive vias and a chip is provided. The insulating substrate has an upper surface and a lower surface opposite to each other. The conductive vias pass through the insulating substrate. The chip is disposed on the upper surface of the insulating substrate and includes a chip substrate, a semiconductor layer and a plurality of contacts. The semiconductor layer is located between the chip substrate and the contacts. The contacts are electrically connected to the conductive vias. The material of the insulating substrate and the material of the chip substrate are the same.

    Abstract translation: 提供了包括绝缘基板，多个导电通孔和芯片的电子设备。 绝缘基板具有彼此相对的上表面和下表面。 导电通孔穿过绝缘基板。 芯片设置在绝缘基板的上表面上，并且包括芯片基板，半导体层和多个触点。 半导体层位于芯片基板和触点之间。 触点电连接到导电通孔。 绝缘基板的材料和芯片基板的材料相同。

    Light emitting module
    8.
    发明授权
    Light emitting module 有权
    发光模块

    公开(公告)号：US09035335B2

    公开(公告)日：2015-05-19

    申请号：US13798126

    申请日：2013-03-13

    Applicant: Sheng-Yuan Sun ,  Po-Jen Su

    Inventor： Sheng-Yuan Sun ,  Po-Jen Su

    IPC: H01L27/15 ,  H01L25/075 ,  H01L33/20 ,  H01L33/50

    CPC classification number: F21K9/64 ,  F21V9/30 ,  F21V13/02 ,  F21V19/0025 ,  F21Y2101/00 ,  F21Y2113/10 ,  F21Y2115/10 ,  H01L25/0753 ,  H01L27/15 ,  H01L33/20 ,  H01L33/50 ,  H01L2924/0002 ,  H01L2924/00

    Abstract: A light emitting module including a substrate, a plurality of first light emitting diode (LED) chips and a plurality of second LED chips is provided. The substrate has a cross-shaped central region and a peripheral region surrounding the cross-shaped central region. The first LED chips are disposed on the substrate and at least located in the cross-shaped central region. The second LED chips are disposed on the substrate and at least located in the peripheral region. A size of each second LED chip is smaller than a size of each first LED chip. The number of the first LED chips located in the peripheral region is smaller than that in the cross-shaped central region. The number of the second LED chips located in the cross-shaped central region is smaller than that in the peripheral region.

    Abstract translation: 提供了包括基板，多个第一发光二极管（LED）芯片和多个第二LED芯片的发光模块。 衬底具有十字形中心区域和围绕十字形中心区域的周边区域。 第一LED芯片设置在基板上并且至少位于十字形中心区域中。 第二LED芯片设置在基板上并且至少位于周边区域中。 每个第二LED芯片的尺寸小于每个第一LED芯片的尺寸。 位于周边区域的第一LED芯片的数量小于十字形中心区域中的数量。 位于十字形中心区域的第二LED芯片的数量小于周边区域中的第二LED芯片的数量。

    LIGHT-EMITTING DIODE PACKAGE STRUCTURE
    9.
    发明申请
    LIGHT-EMITTING DIODE PACKAGE STRUCTURE 审中-公开
    发光二极管封装结构

    公开(公告)号：US20140319562A1

    公开(公告)日：2014-10-30

    申请号：US14096009

    申请日：2013-12-04

    Applicant: Yun-Li Li ,  Po-Jen Su

    Inventor： Yun-Li Li ,  Po-Jen Su

    IPC: H01L33/52 ,  H01L33/60 ,  H01L33/50

    CPC classification number: H01L33/58 ,  H01L33/54 ,  H01L33/56 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2924/00014

    Abstract: An LED package structure of the invention includes a light-emitting device and a transparent molding compound. The light-emitting device has an upper surface. The transparent molding compound is disposed on the light-emitting device and covers the upper surface, in which the transparent molding compound has a top surface and a bottom surface opposite to each other and a first outside surface connecting the top surface and the bottom surface. A surface area of the first outside surface is greater than or equal to four times of a horizontal projection area of the upper surface.

    Abstract translation: 本发明的LED封装结构包括发光器件和透明模塑料。 发光装置具有上表面。 透明模塑料设置在发光装置上并且覆盖透明模塑料具有彼此相对的顶表面和底表面的上表面和连接顶表面和底表面的第一外表面。 第一外表面的表面积大于或等于上表面的水平投影面积的四倍。

    Semiconductor package structure
    10.
    发明授权
    Semiconductor package structure 有权
    半导体封装结构

    公开(公告)号：US08587013B2

    公开(公告)日：2013-11-19

    申请号：US13670438

    申请日：2012-11-06

    Applicant: Po-Jen Su ,  Chih-Ling Wu ,  Yi-Ru Huang ,  Yi-Ju Shih

    Inventor： Po-Jen Su ,  Chih-Ling Wu ,  Yi-Ru Huang ,  Yi-Ju Shih

    IPC: H01L33/00

    CPC classification number: H01L33/62 ,  H01L33/46 ,  H01L2224/48091 ,  H01L2924/00014

    Abstract: A semiconductor package structure includes an insulating substrate, a patterned conductive layer, a light emitting diode (LED) chip and a conductive connection part. The insulating substrate has an upper surface divided into an element configuration region and an element bonding region. The patterned conductive layer includes plural circuits located in the element configuration region and at least one bonding pad located in the element bonding region. The LED chip is flip chip bonded on the patterned conductive layer and electrically connected to the circuits. The conductive connection part has a first end point electrically connected to the bonding pad and a second end point electrically connected to an external circuit. The bonding pad and a corner of the LED chip are disposed correspondingly. A horizontal distance between an apex of the corner and the first end point of the conductive connection part is greater than or equal to 30 micrometers.

    Abstract translation: 半导体封装结构包括绝缘衬底，图案化导电层，发光二极管（LED）芯片和导电连接部分。 绝缘基板具有分为元件配置区域和元件接合区域的上表面。 图案化导电层包括位于元件配置区域中的多个电路和位于元件接合区域中的至少一个焊盘。 LED芯片在图案化的导电层上被倒装芯片接合并电连接到电路。 导电连接部分具有电连接到焊盘的第一端点和电连接到外部电路的第二端点。 接合焊盘和LED芯片的角部相应地设置。 角的顶点与导电连接部的第一端点之间的水平距离大于或等于30微米。

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