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    Vehicle vision system
    1.
    发明授权
    Vehicle vision system 有权
    车辆视觉系统

    公开(公告)号：US07567291B2

    公开(公告)日：2009-07-28

    申请号：US10259253

    申请日：2002-09-27

    申请人： Jon H. Bechtel ,  Joseph S. Stam ,  Eric R. Fossum ,  Sabrina E. Kemeny

    发明人： Jon H. Bechtel ,  Joseph S. Stam ,  Eric R. Fossum ,  Sabrina E. Kemeny

    IPC分类号： H04N5/222 ,  H04N5/225

    CPC分类号： H04N5/2353 ,  G07C5/0891 ,  H04N5/57 ,  H04N9/73

    摘要： A vehicle viewing system including a camera system for generating a signal corresponding to a scene by integrating light from the scene incident on pixel cells having a variable integration time, a display system for presenting a visual representation of the scene, and a processor system operable to determine the camera system integration time based on brightness levels in the scene. The camera system preferably includes and an input attenuating filter to limit light striking the optical array. The processor system includes an image brightness detector to determine overall image brightness and a display control to determine luminance settings for the display system. The processor system may determine the intensity of the display system based on the brightness of the scene, ambient light levels, and glare on the display. The display system includes a display and a display attenuation filter for limiting the intensity as viewed by the operator.

    摘要翻译： 一种车辆观看系统，包括：相机系统，用于通过对入射到具有可变积分时间的像素单元上的场景进行积分来产生对应于场景的信号;用于呈现场景的视觉表示的显示系统;以及可操作以 根据场景中的亮度级别确定摄像机系统集成时间。 相机系统优选地包括输入衰减滤波器以限制撞击光学阵列的光。 处理器系统包括图像亮度检测器以确定整体图像亮度和显示控制以确定显示系统的亮度设置。 处理器系统可以基于场景的亮度，环境光水平和显示器上的眩光来确定显示系统的强度。 显示系统包括显示器和显示衰减滤波器，用于限制操作者观察的强度。

    Digital parallel processor array for optimum path planning
    3.
    发明授权
    Digital parallel processor array for optimum path planning 失效
    数字并行处理器阵列，实现最佳路径规划

    公开(公告)号：US5548773A

    公开(公告)日：1996-08-20

    申请号：US42486

    申请日：1993-03-30

    申请人： Sabrina E. Kemeny ,  Eric R. Fossum ,  Robert H. Nixon

    发明人： Sabrina E. Kemeny ,  Eric R. Fossum ,  Robert H. Nixon

    IPC分类号： G06F17/50 ,  G06F15/00 ,  G06F15/20

    CPC分类号： G06F17/509 ,  G06Q30/0283

    摘要： The invention computes the optimum path across a terrain or topology represented by an array of parallel processor cells interconnected between neighboring cells by links extending along different directions to the neighboring cells. Such an array is preferably implemented as a high-speed integrated circuit. The computation of the optimum path is accomplished by, in each cell, receiving stimulus signals from neighboring cells along corresponding directions, determining and storing the identity of a direction along which the first stimulus signal is received, broadcasting a subsequent stimulus signal to the neighboring cells after a predetermined delay time, whereby stimulus signals propagate throughout the array from a starting one of the cells. After propagation of the stimulus signals throughout the array, a master processor traces back from a selected destination cell to the starting cell along an optimum path of the cells in accordance with the identity of the directions stored in each of the cells.

    摘要翻译： 本发明通过沿着不同方向向相邻小区延伸的链路计算由相邻小区之间互连的并行处理单元的阵列所表示的地形或拓扑的最佳路径。 这样的阵列优选地被实现为高速集成电路。 最佳路径的计算是通过在每个小区中从沿着相应方向的相邻小区接收刺激信号来实现的，确定并存储接收第一刺激信号的方向的身份，将后续的刺激信号广播到相邻小区 在预定的延迟时间之后，由此刺激信号从整个阵列中的起始单元传播。 在整个阵列中激励信号传播之后，主处理器根据存储在每个单元中的方向的身份沿着单元的最佳路径从选定的目的地单元追溯到起始单元。

    Trench-defined charge-coupled device
    4.
    发明授权
    Trench-defined charge-coupled device 失效
    沟槽定义的电荷耦合器件

    公开(公告)号：US5055900A

    公开(公告)日：1991-10-08

    申请号：US419904

    申请日：1989-10-11

    申请人： Eric R. Fossum ,  Sabrina E. Kemeny

    发明人： Eric R. Fossum ,  Sabrina E. Kemeny

    IPC分类号： H01L29/762 ,  H01L21/339 ,  H01L27/148 ,  H01L29/423 ,  H01L29/768

    CPC分类号： H01L29/768 ,  H01L27/14831 ,  H01L29/42396

    摘要： A charge-coupled device (CCD) is formed by first defining relatively deep trenches having relatively small lateral dimensions in the surface of a silicon bulk region. A relatively thin silicon dioxide layer is formed over the silicon surface and inside each trench to cover the internal surfaces thereof. Finally, respective conducting electrode layers are formed over each trench covering the silicon dioxide layer within the trench. Such a CCD structure provides improved packing density and versatility of function over a conventional surface electrode CCD structures. When used in an image-sensing device, the trench-defined CCD structure provides improved quantum efficiency, owing to the deeper potential wells which may be formed in such structures for capturing photogenerated charge carriers.

    摘要翻译： 电荷耦合器件（CCD）通过首先在硅体区域的表面中限定具有相对小的横向尺寸的相对较深的沟槽而形成。 在硅表面和每个沟槽内部形成相对薄的二氧化硅层以覆盖其内表面。 最后，在覆盖沟槽内的二氧化硅层的每个沟槽上形成各个导电电极层。 这样的CCD结构提供了改进的堆积密度和功能与常规表面电极CCD结构的通用性。 当在图像感测装置中使用时，由于在用于捕获光生电荷载体的这种结构中可能形成的较深的势阱，沟槽限定的CCD结构提供了改进的量子效率。

    Wide dynamic range optical sensor
    6.
    发明授权
    Wide dynamic range optical sensor 失效
    宽动态范围光学传感器

    公开(公告)号：US6008486A

    公开(公告)日：1999-12-28

    申请号：US2400

    申请日：1997-12-31

    申请人： Joseph S. Stam ,  Jon H. Bechtel ,  Eric R. Fossum ,  Sabrina E. Kemeny

    发明人： Joseph S. Stam ,  Jon H. Bechtel ,  Eric R. Fossum ,  Sabrina E. Kemeny

    IPC分类号： H04N5/355 ,  H04N5/3745 ,  H04N5/335

    CPC分类号： H04N5/355 ,  H04N5/23258 ,  H04N5/35572 ,  H04N5/3745

    摘要： A system and method is described for increasing effective integration time of an optical sensor including holding a first signal within each pixel cell, proportional to light integrated by the pixel cell over the previous frame period, generating a second signal within each pixel cell proportional to light integrated by the pixel cell over the current frame period, and summing the first signal and the second signal from each pixel, thereby producing an output signal representing the light integrated by each pixel over two frame periods. If saturation of pixel cells is possible, a further method of extending dynamic range is described including generating and storing a first signal in each pixel cell indicative of light integrated by the pixel cell over a long period, generating a second signal in each pixel cell indicative of light integrated by the pixel cell over a short period, and determining an output for each pixel as the first signal whenever the first signal is less than a threshold value, otherwise determining the output as the second signal. Also included are double correlated sampling for noise reduction, interlacing for increased integration time, and individual pixel reset for additional gains in dynamic range.

    摘要翻译： 描述了用于增加光学传感器的有效积分时间的系统和方法，包括在每个像素单元内保持与先前帧周期中由像素单元集成的光成比例的第一信号，在与光成比例的每个像素单元内产生第二信号 由像素单元在当前帧周期内积分，并且从每个像素求和第一信号和第二信号，从而产生表示在两个帧周期内由每个像素集成的光的输出信号。 如果像素单元的饱和​​是可能的，则描述扩展动态范围的另一种方法，其包括在指示由像素单元整合的光的每个像素单元中生成和存储第一信号，并在长周期内存储第一信号，在每个像素单元中生成第二信号 ，并且每当所述第一信号小于阈值时，将每个像素的输出确定为所述第一信号，否则将所述输出确定为所述第二信号。 还包括用于减少噪声的双重相关采样，用于增加积分时间的隔行扫描和用于动态范围附加增益的单独像素复位。

    Active pixel sensor array with multiresolution readout
    10.
    发明授权
    Active pixel sensor array with multiresolution readout 失效
    具有多分辨率读出功能的有源像素传感器阵列

    公开(公告)号：US5949483A

    公开(公告)日：1999-09-07

    申请号：US785930

    申请日：1997-01-22

    申请人： Eric R. Fossum ,  Sabrina E. Kemeny ,  Bedabrata Pain

    发明人： Eric R. Fossum ,  Sabrina E. Kemeny ,  Bedabrata Pain

    IPC分类号： G11C19/28 ,  H01L27/146 ,  H01L27/148 ,  H01L31/0216 ,  H01L31/0232 ,  H04N5/347 ,  H04N5/374 ,  H04N9/04 ,  H04N5/335

    CPC分类号： G11C19/282 ,  G11C19/285 ,  H01L27/14621 ,  H01L27/14627 ,  H01L27/14843 ,  H01L27/1485 ,  H01L27/14856 ,  H01L27/14887 ,  H01L31/02162 ,  H04N3/155 ,  H04N3/1562 ,  H04N3/1568 ,  H04N5/3532 ,  H04N5/3575 ,  H04N5/361 ,  H04N5/363 ,  H04N5/3745 ,  H01L27/14645 ,  H01L31/0232 ,  H04N9/045

    摘要： An imaging device formed as a monolithic complementary metal oxide semiconductor integrated circuit in an industry standard complementary metal oxide semiconductor process, the integrated circuit including a focal plane array of pixel cells, each one of the cells including a photogate overlying the substrate for accumulating photo-generated charge in an underlying portion of the substrate and a charge coupled device section formed on the substrate adjacent the photogate having a sensing node and at least one charge coupled device stage for transferring charge from the underlying portion of the substrate to the sensing node. There is also a readout circuit, part of which can be disposed at the bottom of each column of cells and be common to all the cells in the column. The imaging device can also include an electronic shutter formed on the substrate adjacent the photogate, and/or a storage section to allow for simultaneous integration. In addition, the imaging device can include a multiresolution imaging circuit to provide images of varying resolution. The multiresolution circuit could also be employed in an array where the photosensitive portion of each pixel cell is a photodiode. This latter embodiment could further be modified to facilitate low light imaging.

    摘要翻译： 一种在工业标准互补金属氧化物半导体工艺中形成为单片互补金属氧化物半导体集成电路的成像装置，该集成电路包括像素单元的焦平面阵列，每个单元包括覆盖基板的光栅， 在衬底的下面部分中产生电荷，以及形成在邻近光栅上的衬底上的电荷耦合器件部分，其具有感测节点和至少一个电荷耦合器件级，用于将电荷从衬底的下面部分转移到感测节点。 还有一个读出电路，其中的一部分可以设置在每一列单元的底部，并且与列中的所有单元通用。 成像装置还可以包括形成在邻近光栅的基板上的电子快门和/或存储部分以允许同时集成。 此外，成像装置可以包括多分辨率成像电路，以提供不同分辨率的图像。 多分辨率电路也可以用于每个像素单元的光敏部分是光电二极管的阵列中。 可以进一步修改后一个实施例以便于低光成像。