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    Method of fabricating semiconductor devices employing at least one modulation doped quantum well structure and one or more etch stop layers for accurate contact formation
    2.
    发明授权
    Method of fabricating semiconductor devices employing at least one modulation doped quantum well structure and one or more etch stop layers for accurate contact formation 有权
    使用至少一个调制掺杂量子阱结构和一个或多个蚀刻停止层来制造半导体器件以准确接触形成的方法

    公开(公告)号：US07556976B2

    公开(公告)日：2009-07-07

    申请号：US11360756

    申请日：2006-02-23

    申请人： Geoff W. Taylor ,  Scott W. Duncan

    发明人： Geoff W. Taylor ,  Scott W. Duncan

    IPC分类号： H01L21/00

    CPC分类号： H01L29/155 ,  H01L21/8252 ,  H01L27/0605 ,  H01L29/0646 ,  H01L29/0653 ,  H01L29/0821 ,  H01L29/0843 ,  H01L29/1004 ,  H01L29/1066 ,  H01L29/1075 ,  H01L29/66318 ,  H01L29/7371 ,  H01L29/74 ,  H01L29/7783 ,  H03K17/79 ,  H03M1/667 ,  H03M1/74 ,  H03M1/808

    摘要： A method of fabricating a semiconductor device includes the steps of forming (or providing) a series of layers formed on a substrate, the layers including a first plurality of layers including an n-type ohmic contact layer, a p-type modulation doped quantum well structure, an n-type modulation doped quantum well structure, and a fourth plurality of layers including a p-type ohmic contact layer. Etch stop layers are used during etching operations when forming contacts to the n-type ohmic contact layer and contacts to the n-type modulation doped quantum well. Preferably, each such etch stop layer is made sufficiently thin to permit current tunneling therethrough during operation of optoelectronic/electronic devices realized from this structure (including heterojunction thyristor devices, n-channel HFET devices, p-channel HFET devices, p-type quantum-well-base bipolar transistor devices, and n-type quantum-well-base bipolar transistor devices). The etch stop layer(s) preferably comprise AlAs that functions as an etch stop during etching by a chlorine-based gas mixture that includes fluorine. The series of layers preferably comprise group III-V materials.

    摘要翻译： 制造半导体器件的方法包括以下步骤：形成（或提供）在衬底上形成的一系列层，所述层包括包括n型欧姆接触层，p型调制掺杂量子阱的第一多个层 结构，n型调制掺杂量子阱结构，以及包括p型欧姆接触层的第四多层。 当与n型欧姆接触层形成接触并与n型调制掺杂量子阱接触时，在蚀刻操作期间使用蚀刻停止层。 优选地，每个这样的蚀刻停止层被制成足够薄以允许在从该结构实现的光电子/电子器件的操作期间电流隧穿（包括异质结晶闸管器件，n沟道HFET器件，p沟道HFET器件，p型量子阱器件， 基极双极晶体管器件和n型量子阱基双极晶体管器件）。 蚀刻停止层优选地包括在通过包括氟的氯基气体混合物蚀刻期间用作蚀刻停止的AlAs。 该系列层优选包含III-V族材料。

    Semiconductor devices employing at least one modulation doped quantum well structure and one or more etch stop layers for accurate contact formation
    4.
    发明授权
    Semiconductor devices employing at least one modulation doped quantum well structure and one or more etch stop layers for accurate contact formation 有权
    采用至少一个调制掺杂量子阱结构和一个或多个蚀刻停止层的半导体器件用于精确的接触形成

    公开(公告)号：US07173293B2

    公开(公告)日：2007-02-06

    申请号：US11044636

    申请日：2005-01-10

    申请人： Geoff W. Taylor ,  Scott W. Duncan

    发明人： Geoff W. Taylor ,  Scott W. Duncan

    IPC分类号： H01L29/06

    CPC分类号： H01L29/66318 ,  H01L29/155 ,  H01L29/66462 ,  H01L29/7371 ,  H01L29/802 ,  H03K17/79 ,  H03M1/667 ,  H03M1/74 ,  H03M1/808

    摘要： A semiconductor device includes a series of layers formed on a substrate, the layers including a first plurality of layers including an n-type ohmic contact layer, a p-type modulation doped quantum well structure, an n-type modulation doped quantum well structure, and a fourth plurality of layers including a p-type ohmic contact layer. Etch stop layers are used to form contacts to the n-type ohmic contact layer and contacts to the n-type modulation doped quantum well structure. Thin capping layers are also provided to protect certain layers from oxidation. Preferably, each such etch stop layer is made sufficiently thin to permit current tunneling therethrough during operation of optoelectronic/electronic devices realized from this structure (including heterojunction thyristor devices, n-channel HFET devices, p-channel HFET devices, p-type quantum-well-base bipolar transistor devices, and n-type quantum-well-base bipolar transistor devices).In another aspect of the present invention, a high performance bipolar transistor device is realized from this structure by implanting p-type ions in a interdigitization pattern that forms a plurality of p-type ion implant regions on both sides of the p-type modulation doped quantum well structure to a depth that penetrates the n-type ohmic contact layer. The interdigitization pattern of the p-type implants reduces capacitance between the p-type modulation doped quantum well structure and the n-type ohmic contact layer to enable higher frequency operation.

    摘要翻译： 半导体器件包括在衬底上形成的一系列层，所述层包括包括n型欧姆接触层，p型调制掺杂量子阱结构，n型调制掺杂量子阱结构的第一多个层， 以及包括p型欧姆接触层的第四多个层。 蚀刻停止层用于形成与n型欧姆接触层的接触并与n型调制掺杂量子阱结构接触。 还提供薄盖层以保护某些层免于氧化。 优选地，每个这样的蚀刻停止层被制成足够薄以允许在从该结构实现的光电子/电子器件的操作期间电流隧穿（包括异质结晶闸管器件，n沟道HFET器件，p沟道HFET器件，p型量子阱器件， 基极双极晶体管器件和n型量子阱基双极晶体管器件）。 在本发明的另一方面，通过将p型离子注入到在p型调制掺杂的两侧上形成多个p型离子注入区的叉指形式中，从该结构实现了高性能双极晶体管器件 量子阱结构到穿透n型欧姆接触层的深度。 p型植入物的叉​​指形式降低p型调制掺杂量子阱结构和n型欧姆接触层之间的电容，以实现更高频率的操作。

    Semiconductor devices employing at least one modulation doped quantum well structure and one or more etch stop layers for accurate contact formation
    8.
    发明授权
    Semiconductor devices employing at least one modulation doped quantum well structure and one or more etch stop layers for accurate contact formation 有权
    采用至少一个调制掺杂量子阱结构和一个或多个蚀刻停止层的半导体器件用于精确的接触形成

    公开(公告)号：US06841795B2

    公开(公告)日：2005-01-11

    申请号：US10340942

    申请日：2003-01-13

    申请人： Geoff W. Taylor ,  Scott W. Duncan

    发明人： Geoff W. Taylor ,  Scott W. Duncan

    IPC分类号： H01L21/331 ,  H01L21/335 ,  H01L29/15 ,  H01L29/737 ,  H01L29/80 ,  H03K17/79 ,  H03M1/66 ,  H03M1/74 ,  H03M1/80

    CPC分类号： H01L29/66318 ,  H01L29/155 ,  H01L29/66462 ,  H01L29/7371 ,  H01L29/802 ,  H03K17/79 ,  H03M1/667 ,  H03M1/74 ,  H03M1/808

    摘要： A semiconductor device includes a series of layers formed on a substrate, the layers including a first plurality of layers including an n-type ohmic contact layer, a p-type modulation doped quantum well structure, an n-type modulation doped quantum well structure, and a fourth plurality of layers including a p-type ohmic contact layer. Etch stop layers are used to form contacts to the n-type ohmic contact layer and contacts to the n-type modulation doped quantum well structure. Thin capping layers are also provided to protect certain layers from oxidation. Preferably, each such etch stop layer is made sufficiently thin to permit current tunneling therethrough during operation of optoelectronic/electronic devices realized from this structure (including heterojunction thyristor devices, n-channel HFET devices, p-channel HFET devices, p-type quantum-well-base bipolar transistor devices, and n-type quantum-well-base bipolar transistor devices).In another aspect of the present invention, a high performance bipolar transistor device is realized from this structure by implanting p-type ions in a interdigitization pattern that forms a plurality of p-type ion implant regions on both sides of the p-type modulation doped quantum well structure to a depth that penetrates the n-type ohmic contact layer. The interdigitization pattern of the p-type implants reduces capacitance between the p-type modulation doped quantum well structure and the n-type ohmic contact layer to enable higher frequency operation.

    摘要翻译： 半导体器件包括在衬底上形成的一系列层，所述层包括包括n型欧姆接触层，p型调制掺杂量子阱结构，n型调制掺杂量子阱结构的第一多个层， 以及包括p型欧姆接触层的第四多个层。 蚀刻停止层用于形成与n型欧姆接触层的接触并与n型调制掺杂量子阱结构接触。 还提供薄盖层以保护某些层免于氧化。 优选地，每个这样的蚀刻停止层被制成足够薄以允许在从该结构实现的光电子/电子器件的操作期间电流隧穿（包括异质结晶闸管器件，n沟道HFET器件，p沟道HFET器件，p型量子阱器件， 基极双极型晶体管器件和n型量子阱基双极型晶体管器件）。在本发明的另一方面，通过将p型离子注入叉指形式中，从该结构实现了高性能双极晶体管器件 其在p型调制掺杂量子阱结构的两侧上形成穿过n型欧姆接触层的深度的多个p型离子注入区域。 p型植入物的叉​​指形式降低p型调制掺杂量子阱结构和n型欧姆接触层之间的电容，以实现更高频率的操作。

    Method of fabricating semiconductor devices employing at least one modulation doped quantum well structure and one or more etch stop layers for accurate contact formation
    10.
    发明授权
    Method of fabricating semiconductor devices employing at least one modulation doped quantum well structure and one or more etch stop layers for accurate contact formation 有权
    使用至少一个调制掺杂量子阱结构和一个或多个蚀刻停止层来制造半导体器件以准确接触形成的方法

    公开(公告)号：US07776753B2

    公开(公告)日：2010-08-17

    申请号：US11360759

    申请日：2006-02-23

    申请人： Geoff W. Taylor ,  Scott W. Duncan

    发明人： Geoff W. Taylor ,  Scott W. Duncan

    IPC分类号： H01L21/302

    CPC分类号： H01L29/155 ,  H01L21/30612 ,  H01L21/30621 ,  H01L29/0646 ,  H01L29/0653 ,  H01L29/0821 ,  H01L29/0843 ,  H01L29/1004 ,  H01L29/1066 ,  H01L29/1075 ,  H01L29/66318 ,  H01L29/7371 ,  H01L29/74 ,  H01L29/7783 ,  H03K17/79 ,  H03M1/667 ,  H03M1/74 ,  H03M1/808

    摘要： A method of fabricating a semiconductor device includes the steps of forming (or providing) a series of layers formed on a substrate, the layers including a first plurality of layers including an n-type ohmic contact layer, a p-type modulation doped quantum well structure, an n-type modulation doped quantum well structure, and a fourth plurality of layers including a p-type ohmic contact layer. Etch stop layers are used during etching operations when forming contacts to the n-type ohmic contact layer and contacts to the n-type modulation doped quantum well. Preferably, each such etch stop layer is made sufficiently thin to permit current tunneling therethrough during operation of optoelectronic/electronic devices realized from this structure (including heterojunction thyristor devices, n-channel HFET devices, p-channel HFET devices, p-type quantum-well-base bipolar transistor devices, and n-type quantum-well-base bipolar transistor devices). The etch stop layer(s) preferably comprise AlAs that functions as an etch stop during etching by a chlorine-based gas mixture that includes fluorine. The series of layers preferably comprise group III-V materials.

    摘要翻译： 制造半导体器件的方法包括以下步骤：形成（或提供）在衬底上形成的一系列层，所述层包括包括n型欧姆接触层，p型调制掺杂量子阱的第一多个层 结构，n型调制掺杂量子阱结构，以及包括p型欧姆接触层的第四多层。 当与n型欧姆接触层形成接触并与n型调制掺杂量子阱接触时，在蚀刻操作期间使用蚀刻停止层。 优选地，每个这样的蚀刻停止层被制成足够薄以允许在从该结构实现的光电子/电子器件的操作期间电流隧穿（包括异质结晶闸管器件，n沟道HFET器件，p沟道HFET器件，p型量子阱器件， 基极双极晶体管器件和n型量子阱基双极晶体管器件）。 蚀刻停止层优选地包括在通过包括氟的氯基气体混合物蚀刻期间用作蚀刻停止的AlAs。 该系列层优选包含III-V族材料。