公开(公告)号：US20100259912A1

公开(公告)日：2010-10-14

申请号：US12662218

申请日：2010-04-06

申请人： Dong-Kil Shin ,  Shle-Ge Lee

发明人： Dong-Kil Shin ,  Shle-Ge Lee

IPC分类号： H05K1/11

CPC分类号： H05K1/111 ,  H05K3/3436 ,  H05K3/368 ,  H05K2201/09381 ,  H05K2201/09418 ,  H05K2201/09427 ,  Y02P70/611 ,  Y02P70/613

摘要： Provided is an electronic device which may include a first structure having a first surface, a first land region on the first surface, a second structure having a second surface facing the first surface, a second land region on the second surface, and a connection structure between the first and second structures electrically connecting the first land region to the second land region. As provided, the first land region may have a major axis and a minor axis on the first surface and the second land region may have a major axis and a minor axis on the second surface. Furthermore, the major axes of the first and second land regions may have different orientations with respect to one another.

摘要翻译： 提供一种电子设备，其可以包括第一结构，其具有第一表面，第一表面上的第一焊盘区域，具有面向第一表面的第二表面的第二结构，第二表面上的第二焊盘区域，以及连接结构 在第一和第二结构之间，电连接第一焊盘区域和第二焊盘区域。 如上所述，第一焊盘区域可以在第一表面上具有长轴和短轴，并且第二焊盘区域可以在第二表面上具有长轴和短轴。 此外，第一和第二脊区域的长轴可以具有彼此不同的取向。

公开(公告)号：US20100230811A1

公开(公告)日：2010-09-16

申请号：US12722794

申请日：2010-03-12

申请人： Dong-Kil Shin ,  Shle-Ge Lee ,  Jong-Joo Lee ,  Jong-Ho Lee

发明人： Dong-Kil Shin ,  Shle-Ge Lee ,  Jong-Joo Lee ,  Jong-Ho Lee

IPC分类号： H01L23/498

CPC分类号： H01L24/13 ,  H01L23/3192 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L2224/02126 ,  H01L2224/0401 ,  H01L2224/05558 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05666 ,  H01L2224/1132 ,  H01L2224/1134 ,  H01L2224/11464 ,  H01L2224/13006 ,  H01L2224/13018 ,  H01L2224/13022 ,  H01L2224/13082 ,  H01L2224/131 ,  H01L2224/13147 ,  H01L2224/16 ,  H01L2924/0001 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01022 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/014 ,  H01L2924/351 ,  H01L2924/00014 ,  H01L2224/13099 ,  H01L2924/00 ,  H01L2924/00012

摘要： In one embodiment, a semiconductor device includes a semiconductor substrate and a bonding pad disposed thereon. The semiconductor device also includes a passivation layer, a buffer layer, and an insulating layer sequentially stacked on the semiconductor substrate. According to one aspect, a first recess is defined within the passivation layer, the buffer layer, and the insulating layer to expose at least a region of the bonding pad and a second recess is defined within the insulating layer to expose at least a region of the buffer layer and spaced apart from the first recess such that a portion of the insulating layer is interposed therebetween. Further, the semiconductor device includes a conductive solder bump disposed within the first and second recesses. The conductive solder bump may be connected to the bonding pad in the first recess and supported by the buffer layer through a protrusion of the conductive solder bump extending into the second recess.

摘要翻译： 在一个实施例中，半导体器件包括半导体衬底和设置在其上的接合焊盘。 半导体器件还包括依次堆叠在半导体衬底上的钝化层，缓冲层和绝缘层。 根据一个方面，在钝化层，缓冲层和绝缘层内限定第一凹槽，以露出焊盘的至少一个区域，并且在绝缘层内限定第二凹槽，以暴露至少一个区域 缓冲层，并且与第一凹部间隔开，使得绝缘层的一部分插入其间。 此外，半导体器件包括设置在第一和第二凹槽内的导电焊料凸块。 导电焊料凸块可以连接到第一凹槽中的焊盘，并且通过延伸到第二凹部中的导电焊料凸块的突起被缓冲层支撑。

公开(公告)号：US08120176B2

公开(公告)日：2012-02-21

申请号：US12722794

申请日：2010-03-12

申请人： Dong-Kil Shin ,  Shle-Ge Lee ,  Jong-Joo Lee ,  Jong-Ho Lee

发明人： Dong-Kil Shin ,  Shle-Ge Lee ,  Jong-Joo Lee ,  Jong-Ho Lee

IPC分类号： H01L23/48

CPC分类号： H01L24/13 ,  H01L23/3192 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L2224/02126 ,  H01L2224/0401 ,  H01L2224/05558 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05666 ,  H01L2224/1132 ,  H01L2224/1134 ,  H01L2224/11464 ,  H01L2224/13006 ,  H01L2224/13018 ,  H01L2224/13022 ,  H01L2224/13082 ,  H01L2224/131 ,  H01L2224/13147 ,  H01L2224/16 ,  H01L2924/0001 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01022 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/014 ,  H01L2924/351 ,  H01L2924/00014 ,  H01L2224/13099 ,  H01L2924/00 ,  H01L2924/00012

摘要： In one embodiment, a semiconductor device includes a semiconductor substrate and a bonding pad disposed thereon. The semiconductor device also includes a passivation layer, a buffer layer, and an insulating layer sequentially stacked on the semiconductor substrate. According to one aspect, a first recess is defined within the passivation layer, the buffer layer, and the insulating layer to expose at least a region of the bonding pad and a second recess is defined within the insulating layer to expose at least a region of the buffer layer and spaced apart from the first recess such that a portion of the insulating layer is interposed therebetween. Further, the semiconductor device includes a conductive solder bump disposed within the first and second recesses. The conductive solder bump may be connected to the bonding pad in the first recess and supported by the buffer layer through a protrusion of the conductive solder bump extending into the second recess.

摘要翻译： 在一个实施例中，半导体器件包括半导体衬底和设置在其上的接合焊盘。 半导体器件还包括依次堆叠在半导体衬底上的钝化层，缓冲层和绝缘层。 根据一个方面，在钝化层，缓冲层和绝缘层内限定第一凹槽，以露出焊盘的至少一个区域，并且在绝缘层内限定第二凹槽，以暴露至少一个区域 缓冲层，并且与第一凹部间隔开，使得绝缘层的一部分插入其间。 此外，半导体器件包括设置在第一和第二凹槽内的导电焊料凸块。 导电焊料凸块可以连接到第一凹槽中的焊盘，并且通过延伸到第二凹部中的导电焊料凸块的突起被缓冲层支撑。

公开(公告)号：US08427841B2

公开(公告)日：2013-04-23

申请号：US12662218

申请日：2010-04-06

申请人： Dong-Kil Shin ,  Shle-Ge Lee

发明人： Dong-Kil Shin ,  Shle-Ge Lee

IPC分类号： H05K7/00

CPC分类号： H05K1/111 ,  H05K3/3436 ,  H05K3/368 ,  H05K2201/09381 ,  H05K2201/09418 ,  H05K2201/09427 ,  Y02P70/611 ,  Y02P70/613

摘要： Provided is an electronic device which may include a first structure having a first surface, a first land region on the first surface, a second structure having a second surface facing the first surface, a second land region on the second surface, and a connection structure between the first and second structures electrically connecting the first land region to the second land region. As provided, the first land region may have a major axis and a minor axis on the first surface and the second land region may have a major axis and a minor axis on the second surface. Furthermore, the major axes of the first and second land regions may have different orientations with respect to one another.

摘要翻译： 提供一种电子设备，其可以包括第一结构，其具有第一表面，第一表面上的第一焊盘区域，具有面向第一表面的第二表面的第二结构，第二表面上的第二焊盘区域，以及连接结构 在第一和第二结构之间，电连接第一焊盘区域和第二焊盘区域。 如上所述，第一焊盘区域可以在第一表面上具有长轴和短轴，并且第二焊盘区域可以在第二表面上具有长轴和短轴。 此外，第一和第二脊区域的长轴可以具有彼此不同的取向。

公开(公告)号：US20080122056A1

公开(公告)日：2008-05-29

申请号：US11983451

申请日：2007-11-09

申请人： Shle-Ge Lee ,  Dong-Kil Shin ,  Min-Young Son

发明人： Shle-Ge Lee ,  Dong-Kil Shin ,  Min-Young Son

IPC分类号： H01L23/488

CPC分类号： H01L23/13 ,  H01L23/49816 ,  H01L24/48 ,  H01L2224/32225 ,  H01L2224/4824 ,  H01L2224/73215 ,  H01L2924/00014 ,  H01L2924/15311 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： Provided is a semiconductor device package comprising a printed circuit board, the printed circuit board including a window at a central portion and a connection part, a semiconductor chip including center-type bonding pads, wherein the semiconductor chip is mounted on an upper surface of the printed circuit board such that the center-type bonding pads are exposed by the window, bonding wires electrically connecting the center-type bonding pads with the printed circuit board through the window, a lower molding material at a lower surface of the printed circuit board, the lower molding material encapsulating the center-type bonding pads and the bonding wires, and an upper molding material encapsulating the semiconductor chip and the upper surface of the printed circuit board, wherein the lower molding material and the upper molding material are connected to each other through the connection part of the printed circuit board.

摘要翻译： 提供一种半导体器件封装，其包括印刷电路板，印刷电路板包括在中心部分处的窗口和连接部分，包括中心型接合焊盘的半导体芯片，其中半导体芯片安装在 印刷电路板，使得中心型接合焊盘由窗户露出，通过窗口将中心型接合焊盘与印刷电路板电连接的接合线，印刷电路板的下表面处的下部成型材料， 封装中心型接合焊盘和接合线的下部成型材料以及封装半导体芯片和印刷电路板的上表面的上部成型材料，其中下部成型材料和上部成型材料彼此连接 通过印刷电路板的连接部分。