Semiconductor device package
    1.
    发明申请
    Semiconductor device package 审中-公开
    半导体器件封装

    公开(公告)号:US20080122056A1

    公开(公告)日:2008-05-29

    申请号:US11983451

    申请日:2007-11-09

    IPC分类号: H01L23/488

    摘要: Provided is a semiconductor device package comprising a printed circuit board, the printed circuit board including a window at a central portion and a connection part, a semiconductor chip including center-type bonding pads, wherein the semiconductor chip is mounted on an upper surface of the printed circuit board such that the center-type bonding pads are exposed by the window, bonding wires electrically connecting the center-type bonding pads with the printed circuit board through the window, a lower molding material at a lower surface of the printed circuit board, the lower molding material encapsulating the center-type bonding pads and the bonding wires, and an upper molding material encapsulating the semiconductor chip and the upper surface of the printed circuit board, wherein the lower molding material and the upper molding material are connected to each other through the connection part of the printed circuit board.

    摘要翻译: 提供一种半导体器件封装,其包括印刷电路板,印刷电路板包括在中心部分处的窗口和连接部分,包括中心型接合焊盘的半导体芯片,其中半导体芯片安装在 印刷电路板,使得中心型接合焊盘由窗户露出,通过窗口将中心型接合焊盘与印刷电路板电连接的接合线,印刷电路板的下表面处的下部成型材料, 封装中心型接合焊盘和接合线的下部成型材料以及封装半导体芯片和印刷电路板的上表面的上部成型材料,其中下部成型材料和上部成型材料彼此连接 通过印刷电路板的连接部分。

    SEMICONDUCTOR CHIP PACKAGE
    6.
    发明申请
    SEMICONDUCTOR CHIP PACKAGE 失效
    半导体芯片包装

    公开(公告)号:US20090121332A1

    公开(公告)日:2009-05-14

    申请号:US12266765

    申请日:2008-11-07

    IPC分类号: H01L23/495

    摘要: A semiconductor chip package includes a lead frame, an insulation member, a chip, bonding wires and a sealing member. The lead frame includes a plurality of first leads and a plurality of second leads. The second leads have a chip adhesion region. The insulation member fills a space between the second leads in the chip adhesion region. The chip is provided on at least one surface of the insulation member. The chip has single-side bonding pads. The bonding wires electrically connect the leads and the bonding pads. The sealing member covers the lead frame, the insulation member, the chip and the bonding wires. Since the space between the second leads is filled with the insulation member, voids may be prevented from occurring.

    摘要翻译: 半导体芯片封装包括引线框架,绝缘构件,芯片,接合线和密封构件。 引线框架包括多个第一引线和多个第二引线。 第二引线具有芯片粘附区域。 绝缘构件填充芯片粘合区域中的第二引线之间的空间。 芯片设置在绝缘构件的至少一个表面上。 该芯片具有单面接合焊盘。 接合线将引线和接合焊盘电连接。 密封构件覆盖引线框架,绝缘构件,芯片和接合线。 由于第二引线之间的空间填充有绝缘构件,因此可以防止发生空隙。