Pattern generator for a lithography system
    1.
    发明授权
    Pattern generator for a lithography system 有权
    光刻系统的图案发生器

    公开(公告)号:US09001308B2

    公开(公告)日:2015-04-07

    申请号:US13757477

    申请日:2013-02-01

    Abstract: A pattern generator includes a minor array plate having a mirror, at least one electrode plate disposed over the minor array plate, a lens let disposed over the minor, and at least one insulator layer sandwiched between the mirror array plate and the electrode plate. The electrode plate includes a first conducting layer and a second conducting layer. The lens let has a non-straight sidewall formed in the electrode plate. The pattern generator further includes at least one insulator sandwiched between two electrode plates. The non-straight sidewall can be a U-shaped sidewall or an L-shaped sidewall.

    Abstract translation: 图案发生器包括具有反射镜的次阵列板,设置在次阵列板上的至少一个电极板,设置在副镜上的透镜,以及夹在反射镜阵列板和电极板之间的至少一个绝缘体层。 电极板包括第一导电层和第二导电层。 透镜让具有形成在电极板中的非直的侧壁。 图案发生器还包括夹在两个电极板之间的至少一个绝缘体。 非直的侧壁可以是U形侧壁或L形侧壁。

    System and method for generating direct-write pattern
    3.
    发明授权
    System and method for generating direct-write pattern 有权
    用于生成直写模式的系统和方法

    公开(公告)号:US08378319B2

    公开(公告)日:2013-02-19

    申请号:US12728655

    申请日:2010-03-22

    CPC classification number: G03F7/70291 G03F7/70508

    Abstract: A direct-write system is provided which includes a stage for holding a substrate, a processing module for processing pattern data and generating instructions associated with the pattern data, and an exposure module that includes beams that are focused onto the substrate and a beam controller that controls the beams in accordance with the instructions. The processing module includes vertex pair processors each having bit inverters. Each vertex pair processor is operable to process a respective vertex pair of an input scan line to generate an output scan line. Each bit inverter is operable to invert a respective input bit of the input scan line to generate a respective output bit of the output scan line if a bit position is located between the respective vertex pair, otherwise the respective input bit is copied to the respective output bit. The instructions correspond to the output bits for each beam.

    Abstract translation: 提供了一种直写式系统,其包括用于保持基板的台,用于处理图案数据和产生与图案数据相关联的指令的处理模块,以及包括聚焦在基板上的光束的曝光模块和一个光束控制器, 根据说明控制光束。 处理模块包括各自具有位逆变器的顶点对处理器。 每个顶点对处理器可操作以处理输入扫描线的相应顶点对以产生输出扫描线。 如果比特位置位于相应顶点对之间,则每个位反相器可操作以反转输入扫描线的相应输入位以产生输出扫描线的相应输出位,否则相应的输入位被复制到相应的输出 位。 这些指令对应于每个波束的输出位。

    Phase-shift mask for printing high-resolution images and a method of fabrication
    8.
    发明授权
    Phase-shift mask for printing high-resolution images and a method of fabrication 有权
    用于打印高分辨率图像的相移掩模和制造方法

    公开(公告)号:US06428938B1

    公开(公告)日:2002-08-06

    申请号:US09596900

    申请日:2000-06-19

    CPC classification number: G03F1/30

    Abstract: An improved phase-shift photomask and method of fabrication are described. The method for making this phase-shift mask involves depositing an opaque film, such as chromium (Cr), on a transparent plate, such as SiO2 (quartz plate). An electron beam photoresist layer is deposited on the Cr film and is partially exposed in regions A and completely exposed in closely spaced alternate regions B by an electron beam. The exposed photoresist is then developed. The Cr film is etched in regions B while the remaining resist in regions A protect the Cr from etching. The e-bean resist is plasma etched back to remove the resist over regions A and then the quartz plate in regions B is recessed to a depth d by plasma etching while the Cr protects the quartz in regions A from etching. The recess is etched to a depth to provide an optical path difference between A and B of ½ wavelength (180°) when UV light is transmitted through the mask to expose resist on a product substrate. This 180° phase-shift minimizes the diffracted light under the Cr film between regions A and B and improves the DOF and therefore the photoresist resolution. Since a single e-beam resist is used to make the mask it is more manufacturing cost effective with improved alignment accuracy between regions A and B.

    Abstract translation: 描述了改进的相移光掩模和制造方法。 制造该相移掩模的方法包括在诸如SiO 2(石英板)的透明板上沉积不透明的膜,例如铬(Cr)。 电子束光致抗蚀剂层沉积在Cr膜上,并部分暴露在区域A中,并通过电子束完全暴露在紧密间隔的交替区域B中。 然后曝光的光刻胶显影。 在区域B中蚀刻Cr膜,而区域A中的剩余抗蚀剂保护Cr不被蚀刻。 等离子体蚀刻回蚀刻e-bean抗蚀剂以去除区域A上的抗蚀剂,然后通过等离子体蚀刻将区域B中的石英板凹入深度d,同时Cr保护区域A中的石英免受蚀刻。 当UV光通过掩模透射以暴露产品基底上的抗蚀剂时,凹陷被蚀刻到深度以提供½波长(180°)的A和B之间的光程差。 这种180°相移使区域A和B之间的Cr膜下的衍射光最小化,并且改善了DOF并因此改善了光刻胶分辨率。 由于使用单个电子束抗蚀剂来制造掩模,因此在区域A和区域B之间具有改善的对准精度是更具制造成本效益的。

    Double layer method for fabricating a rim type attenuating phase
shifting mask
    9.
    发明授权
    Double layer method for fabricating a rim type attenuating phase shifting mask 有权
    用于制造边缘型衰减相移掩模的双层方法

    公开(公告)号:US6007324A

    公开(公告)日:1999-12-28

    申请号:US166392

    申请日:1998-10-05

    CPC classification number: G03F1/29 G03F7/203

    Abstract: A method of forming a rim type attenuating phase shifting mask which requires only one resist layer and developing the resist using a single developing solution. A transparent mask substrate has a layer of attenuating phase shifting material, a layer of opaque material, and a layer of resist material formed thereon. The layer of resist is exposed to a first pattern using a first exposure dose and a second pattern using a smaller second exposure dose. The resist is developed for a first time forming the first pattern in the entire layer of resist and the second pattern in the top portion of the layer of resist. The first pattern is then etched in the layer of opaque material using the first pattern in the layer of resist as a mask. In one embodiment the first pattern is then etched in the layer of attenuating phase shifting material, the resist is partially etched using an O.sub.2 plasma etch leaving the second pattern in the lower part of the resist, the second pattern is etched in the layer of opaque material, and the resist is stripped. In a second embodiment the layer of resist is developed for a second time in the same solution forming the second pattern in the entire resist layer, the first pattern is etched in the layer of attenuating phase shifting material, the second pattern is etched in the layer of opaque material, and the resist is stripped.

    Abstract translation: 一种形成仅需一个抗蚀剂层并使用单一显影液显影抗蚀剂的边缘型衰减相移掩模的方法。 透明掩模基板具有衰减相移材料层,不透明材料层和形成在其上的抗蚀材料层。 使用较小的第二曝光剂量,使用第一曝光剂量和第二图案将抗蚀剂层暴露于第一图案。 抗蚀剂首次在抗蚀剂的整个层中形成第一图案,并且在抗蚀剂层的顶部形成第二图案。 然后使用抗蚀剂层中的第一图案作为掩模,在不透明材料层中蚀刻第一图案。 在一个实施例中,然后在衰减相移材料层中蚀刻第一图案,使用等离子体蚀刻部分蚀刻抗蚀剂,留下抗蚀剂下部的第二图案,第二图案被蚀刻在不透明层中 材料,抗蚀剂剥离。 在第二实施例中,抗蚀剂层在形成整个抗蚀剂层中的第二图案的相同溶液中第二次显影,第一图案在衰减相移材料层中被蚀刻,第二图案在层中被蚀刻 的不透明材料,并且抗蚀剂被剥离。

    Multiple-patterning overlay decoupling method
    10.
    发明授权
    Multiple-patterning overlay decoupling method 有权
    多图案叠加去耦方法

    公开(公告)号:US09134627B2

    公开(公告)日:2015-09-15

    申请号:US13328264

    申请日:2011-12-16

    Abstract: A method for fabricating a semiconductor device is disclosed. An exemplary method includes forming a first structure in a first layer by a first exposure and determining placement information of the first structure. The method further includes forming a second structure in a second layer overlying the first layer by a second exposure and determining placement information of the second structure. The method further includes forming a third structure including first and second substructures in a third layer overlying the second layer by a third exposure. Forming the third structure includes independently aligning the first substructure to the first structure and independently aligning the second substructure to the second structure.

    Abstract translation: 公开了一种制造半导体器件的方法。 一种示例性方法包括通过第一曝光在第一层中形成第一结构并确定第一结构的放置信息。 该方法还包括通过第二曝光在覆盖第一层的第二层中形成第二结构,并确定第二结构的放置信息。 该方法还包括在第三层中形成第三结构,该第三结构包括通过第三次曝光覆盖第二层的第三层中的第一和第二子结构。 形成第三结构包括将第一子结构独立地对准第一结构并且将第二子结构独立地对准到第二结构。

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