公开(公告)号：US09034151B2

公开(公告)日：2015-05-19

申请号：US12174897

申请日：2008-07-17

申请人： Shoichi Doi ,  Tatsuya Nishiwaki

发明人： Shoichi Doi ,  Tatsuya Nishiwaki

IPC分类号： C23C14/00 ,  C23C14/32 ,  C25B9/00 ,  C25B11/00 ,  C25B13/00 ,  C23C14/34 ,  C23C14/06 ,  H01J37/34 ,  C23C14/04 ,  C23C14/46 ,  G02F1/1337 ,  C23C14/22

CPC分类号： C23C14/221 ,  C23C14/042 ,  C23C14/0605 ,  C23C14/225 ,  C23C14/3442 ,  C23C14/46 ,  G02F1/133734 ,  G02F1/13378 ,  H01J37/3411 ,  H01J37/3426 ,  H01J2237/3146

摘要： An alignment film forming apparatus and a method are provided to form an alignment film for a liquid crystal in a single process of simultaneously executing a film deposition process of ion beam sputtering and an alignment process. The method greatly restricts the size of a substrate. An alignment film forming apparatus includes a target disposed on a top surface side of a substrate and having a sputtering surface defining a sharp angle to the top surface of the substrate, a transfer table that transfers the substrate in a predetermined direction, and an ion source disposed on the top surface side of the substrate in such a way that an ion beam is irradiated on the sputtering surface of the target. An ion beam reflected at the sputtering surface is irradiated on a sputtering film formed on the substrate. The apparatus includes a mask disposed in such a way as to cover a part of the top surface of the substrate on an upstream side of a position where the sputtering film is formed, and a temperature regulator which regulates the temperature of the target.

摘要翻译： 提供了一种取向膜形成装置和方法，以在同时执行离子束溅射的成膜工艺和对准工艺的单个工艺中形成用于液晶的取向膜。 该方法大大限制了基板的尺寸。 取向膜形成装置包括：设置在基板的顶面侧的靶，具有与基板的上表面形成锐角的溅射面;将基板沿预定方向转印的转印台;离子源 设置在基板的顶面侧，使得离子束照射在靶的溅射表面上。 在溅射表面反射的离子束照射在形成在基板上的溅射膜上。 该装置包括掩模，其设置成覆盖形成溅射膜的位置的上游侧的基板顶表面的一部分，以及调节靶的温度的温度调节器。

公开(公告)号：US20130277734A1

公开(公告)日：2013-10-24

申请号：US13601593

申请日：2012-08-31

申请人： Toshifumi NISHIGUCHI ,  Keiko KAWAMURA ,  Hideki OKUMURA ,  Tatsuya NISHIWAKI

发明人： Toshifumi NISHIGUCHI ,  Keiko KAWAMURA ,  Hideki OKUMURA ,  Tatsuya NISHIWAKI

IPC分类号： H01L29/78 ,  H01L21/336

CPC分类号： H01L29/0634 ,  H01L29/0696 ,  H01L29/1095 ,  H01L29/407 ,  H01L29/41766 ,  H01L29/4238 ,  H01L29/66734 ,  H01L29/66787 ,  H01L29/7809 ,  H01L29/7813

摘要： According to one embodiment, a semiconductor device includes a first semiconductor region; a second semiconductor region having a side face and a lower face, and the faces surrounded by the first semiconductor region; a third semiconductor region provided between the second semiconductor region and the first semiconductor region; a fourth semiconductor region being in contact with an outer side face of the first semiconductor region; a plurality of first electrodes being in contact with the second semiconductor region, the third semiconductor region, and the first semiconductor region via an insulating film; a plurality of pillar areas extending from the third semiconductor region toward the fourth semiconductor region, each of the plurality of pillar areas being provided between adjacent ones of the plurality of first electrodes. An impurity density of each of the pillar areas and an impurity density of the third semiconductor region is substantially the same.

摘要翻译： 根据一个实施例，半导体器件包括第一半导体区域; 第二半导体区域，具有侧面和下表面，并且由第一半导体区域包围的面; 设置在所述第二半导体区域和所述第一半导体区域之间的第三半导体区域; 与所述第一半导体区域的外侧面接触的第四半导体区域; 多个第一电极经由绝缘膜与第二半导体区域，第三半导体区域和第一半导体区域接触; 从所述第三半导体区域朝向所述第四半导体区域延伸的多个支柱区域，所述多个支柱区域中的每一个设置在所述多个第一电极中的相邻的第一电极之间。 每个支柱区域的杂质浓度和第三半导体区域的杂质浓度基本相同。

公开(公告)号：US20120061753A1

公开(公告)日：2012-03-15

申请号：US13053069

申请日：2011-03-21

申请人： Tatsuya NISHIWAKI

发明人： Tatsuya NISHIWAKI

IPC分类号： H01L29/78

CPC分类号： H01L29/7813 ,  H01L29/0696 ,  H01L29/407 ,  H01L29/41741 ,  H01L29/41766 ,  H01L29/4238 ,  H01L29/66734

摘要： A semiconductor device includes: a drain layer; a drift layer provided on the drain layer; a base region provided on the drift layer; a source region selectively provided on a surface of the base region; a first gate; a field-plate; a second gate; a drain electrode; and a source electrode. The first gate electrode is provided in each of a plurality of first trenches via a first insulating film. The first trenches penetrate from a surface of the source region through the base region and contact the drift layer. The field-plate electrode is provided in the first trench under the first gate electrode via a second insulating film. The second gate electrode is provided in a second trench via a third insulating film. The second trench penetrates from the surface of the source region through the base region and contacts the drift layer between the first trenches.

摘要翻译： 半导体器件包括：漏极层; 设置在漏极层上的漂移层; 设置在漂移层上的基极区域; 选择性地设置在所述基底区域的表面上的源极区域; 第一门 现场板; 第二门 漏电极; 和源电极。 第一栅电极经由第一绝缘膜设置在多个第一沟槽中的每一个中。 第一沟槽从源极区域的表面穿过基极区域并接触漂移层。 场板电极通过第二绝缘膜设置在第一栅电极下的第一沟槽中。 第二栅电极经由第三绝缘膜设置在第二沟槽中。 第二沟槽从源极区域的表面穿过基极区域并与第一沟槽之间的漂移层接触。

公开(公告)号：US07525107B2

公开(公告)日：2009-04-28

申请号：US11566716

申请日：2006-12-05

申请人： Johji Nakagaki ,  Akihiro Asahara ,  Hideo Kimura ,  Hiroaki Kitahara ,  Tatsuya Nishiwaki ,  Yasuhiko Shiota ,  Takeshi Yamada

发明人： Johji Nakagaki ,  Akihiro Asahara ,  Hideo Kimura ,  Hiroaki Kitahara ,  Tatsuya Nishiwaki ,  Yasuhiko Shiota ,  Takeshi Yamada

IPC分类号： G21G5/00

CPC分类号： G02F1/13378 ,  H01J2237/316

摘要： An apparatus and method for forming an alignment layer with uniform orientation is provided. An alignment layer-forming apparatus includes an ion source for generating ion beams and one or more masks disposed between the ion source and a substrate. The masks each have a reflective face directed to the substrate. The ion beams are reflected between the reflective face of each mask and a thin-film which is disposed on the substrate and which is processed into an alignment layer, whereby the alignment layer is formed with the ion beam finally applied to the thin-film. The orientation of a liquid crystal can be rendered uniform by varying the shape and/or arrangement of the reflective face of the mask. Hence, a liquid crystal display with no brightness or color non-uniformity can be manufactured.

摘要翻译： 提供了一种用于形成具有均匀取向的取向层的装置和方法。 配向层形成装置包括用于产生离子束的离子源和设置在离子源和衬底之间的一个或多个掩模。 掩模各自具有指向基板的反射面。 离子束在每个掩模的反射面和设置在基板上的薄膜之间反射，并被处理成取向层，由此形成最终施加到薄膜上的离子束的取向层。 通过改变掩模的反射面的形状和/或布置，液晶的取向可以变得均匀。 因此，可以制造没有亮度或颜色不均匀的液晶显示器。

公开(公告)号：US20080011969A1

公开(公告)日：2008-01-17

申请号：US11566716

申请日：2006-12-05

申请人： Johji Nakagaki ,  Akihiro Asahara ,  Hideo Kimura ,  Hiroaki Kitahara ,  Tatsuya Nishiwaki ,  Yasuhiko Shiota ,  Takeshi Yamada

发明人： Johji Nakagaki ,  Akihiro Asahara ,  Hideo Kimura ,  Hiroaki Kitahara ,  Tatsuya Nishiwaki ,  Yasuhiko Shiota ,  Takeshi Yamada

IPC分类号： G21G5/00

CPC分类号： G02F1/13378 ,  H01J2237/316

摘要： An apparatus and method for forming an alignment layer with uniform orientation is provided. An alignment layer-forming apparatus includes an ion source for generating ion beams and one or more masks disposed between the ion source and a substrate. The masks each have a reflective face directed to the substrate. The ion beams are reflected between the reflective face of each mask and a thin-film which is disposed on the substrate and which is processed into an alignment layer, whereby the alignment layer is formed with the ion beam finally applied to the thin-film. The orientation of a liquid crystal can be rendered uniform by varying the shape and/or arrangement of the reflective face of the mask. Hence, a liquid crystal display with no brightness or color non-uniformity can be manufactured.

摘要翻译： 提供了一种用于形成具有均匀取向的取向层的装置和方法。 配向层形成装置包括用于产生离子束的离子源和设置在离子源和衬底之间的一个或多个掩模。 掩模各自具有指向基板的反射面。 离子束在每个掩模的反射面和设置在基板上的薄膜之间反射，并被处理成取向层，由此形成最终施加到薄膜上的离子束的取向层。 通过改变掩模的反射面的形状和/或布置，液晶的取向可以变得均匀。 因此，可以制造没有亮度或颜色不均匀的液晶显示器。

公开(公告)号：US08629505B2

公开(公告)日：2014-01-14

申请号：US13053069

申请日：2011-03-21

申请人： Tatsuya Nishiwaki

发明人： Tatsuya Nishiwaki

IPC分类号： H01L21/76

CPC分类号： H01L29/7813 ,  H01L29/0696 ,  H01L29/407 ,  H01L29/41741 ,  H01L29/41766 ,  H01L29/4238 ,  H01L29/66734

摘要： A semiconductor device includes: a drain layer; a drift layer provided on the drain layer; a base region provided on the drift layer; a source region selectively provided on a surface of the base region; a first gate; a field-plate; a second gate; a drain electrode; and a source electrode. The first gate electrode is provided in each of a plurality of first trenches via a first insulating film. The first trenches penetrate from a surface of the source region through the base region and contact the drift layer. The field-plate electrode is provided in the first trench under the first gate electrode via a second insulating film. The second gate electrode is provided in a second trench via a third insulating film. The second trench penetrates from the surface of the source region through the base region and contacts the drift layer between the first trenches.

摘要翻译： 半导体器件包括：漏极层; 设置在漏极层上的漂移层; 设置在漂移层上的基极区域; 选择性地设置在所述基底区域的表面上的源极区域; 第一门 现场板; 第二门 漏电极; 和源电极。 第一栅电极经由第一绝缘膜设置在多个第一沟槽中的每一个中。 第一沟槽从源极区域的表面穿过基极区域并接触漂移层。 场板电极通过第二绝缘膜设置在第一栅电极下的第一沟槽中。 第二栅电极经由第三绝缘膜设置在第二沟槽中。 第二沟槽从源极区域的表面穿过基极区域并与第一沟槽之间的漂移层接触。

公开(公告)号：US08502305B2

公开(公告)日：2013-08-06

申请号：US13421816

申请日：2012-03-15

申请人： Tsuyoshi Ohta ,  Tatsuya Nishiwaki ,  Norio Yasuhara ,  Masatoshi Arai ,  Takahiro Kawano

发明人： Tsuyoshi Ohta ,  Tatsuya Nishiwaki ,  Norio Yasuhara ,  Masatoshi Arai ,  Takahiro Kawano

IPC分类号： H01L29/66

CPC分类号： H01L29/7813 ,  H01L21/2255 ,  H01L21/26586 ,  H01L29/0696 ,  H01L29/0856 ,  H01L29/1095 ,  H01L29/407 ,  H01L29/42368 ,  H01L29/42376 ,  H01L29/66734 ,  H01L29/861

摘要： According to an embodiment, a semiconductor device includes a semiconductor layer of a first conductive type, a base region of a second conductive type provided on the semiconductor layer and a first contact region of a second conductive type provided on the base region. The device includes a gate electrode provided in a trench piercing through the first contact region and the base region, and an interlayer insulating film provided on the gate electrode and containing a first conductive type impurity element. The device further includes a source region of a first conductive type provided between the interlayer insulating film and the first contact region, the source region being in contact with a side face of the interlayer insulating film and extending in the base region.

摘要翻译： 根据实施例，半导体器件包括第一导电类型的半导体层，设置在半导体层上的第二导电类型的基极区域和设置在基极区域上的第二导电类型的第一接触区域。 该器件包括设置在穿过第一接触区域和基极区域的沟槽中的栅电极，以及设置在栅极上并包含第一导电型杂质元素的层间绝缘膜。 该器件还包括设置在层间绝缘膜和第一接触区域之间的第一导电类型的源极区域，源极区域与层间绝缘膜的侧面接触并且在基极区域中延伸。

公开(公告)号：US20130069147A1

公开(公告)日：2013-03-21

申请号：US13421816

申请日：2012-03-15

申请人： Tsuyoshi OHTA ,  Tatsuya NISHIWAKI ,  Norio YASUHARA ,  Masatoshi ARAI ,  Takahiro KAWANO

发明人： Tsuyoshi OHTA ,  Tatsuya NISHIWAKI ,  Norio YASUHARA ,  Masatoshi ARAI ,  Takahiro KAWANO

IPC分类号： H01L29/78 ,  H01L21/336

CPC分类号： H01L29/7813 ,  H01L21/2255 ,  H01L21/26586 ,  H01L29/0696 ,  H01L29/0856 ,  H01L29/1095 ,  H01L29/407 ,  H01L29/42368 ,  H01L29/42376 ,  H01L29/66734 ,  H01L29/861

摘要： According to an embodiment, a semiconductor device includes a semiconductor layer of a first conductive type, a base region of a second conductive type provided on the semiconductor layer and a first contact region of a second conductive type provided on the base region. The device includes a gate electrode provided in a trench piercing through the first contact region and the base region, and an interlayer insulating film provided on the gate electrode and containing a first conductive type impurity element. The device further includes a source region of a first conductive type provided between the interlayer insulating film and the first contact region, the source region being in contact with a side face of the interlayer insulating film and extending in the base region.

摘要翻译： 根据实施例，半导体器件包括第一导电类型的半导体层，设置在半导体层上的第二导电类型的基极区域和设置在基极区域上的第二导电类型的第一接触区域。 该器件包括设置在穿过第一接触区域和基极区域的沟槽中的栅电极，以及设置在栅极上并包含第一导电型杂质元素的层间绝缘膜。 该器件还包括设置在层间绝缘膜和第一接触区域之间的第一导电类型的源极区域，源极区域与层间绝缘膜的侧面接触并且在基极区域中延伸。

公开(公告)号：US20130248998A1

公开(公告)日：2013-09-26

申请号：US13619336

申请日：2012-09-14

申请人： Shinichiro Misu ,  Tsuyoshi Ota ,  Tatsuya Nishiwaki ,  Takeshi Uchihara ,  Yusuke Kawaguchi

发明人： Shinichiro Misu ,  Tsuyoshi Ota ,  Tatsuya Nishiwaki ,  Takeshi Uchihara ,  Yusuke Kawaguchi

IPC分类号： H01L29/78

CPC分类号： H01L29/7801 ,  H01L29/0623 ,  H01L29/0634 ,  H01L29/0878 ,  H01L29/407 ,  H01L29/4175 ,  H01L29/42368 ,  H01L29/42376 ,  H01L29/66704 ,  H01L29/66734 ,  H01L29/66787 ,  H01L29/7813 ,  H01L29/7825 ,  H01L29/872

摘要： According to one embodiment, a semiconductor device includes, a drain, source, base and drift regions, a gate electrode, a gate insulating film, a first semiconductor region, a drain electrode, and a source electrode. The drain region has a first portion, and a second portion having a surface extending in a first direction which is vertical to a main surface of the first portion. The source region extends in a second direction which is parallel to the second portion, and is provided to be spaced from the drain region. The gate electrode extends in the first direction and a third direction which is vertical to the first direction and the second direction, and passes through the base region in the third direction. The first semiconductor region is provided between the gate insulating film and the drain region, and has a lower impurity concentration than the drift region.

摘要翻译： 根据一个实施例，半导体器件包括漏极，源极，基极和漂移区，栅电极，栅绝缘膜，第一半导体区，漏电极和源电极。 漏区具有第一部分，第二部分具有沿垂直于第一部分的主表面的第一方向延伸的表面。 源极区域在与第二部分平行的第二方向上延伸，并且设置成与漏极区域间隔开。 栅极电极在第一方向和与第一方向和第二方向垂直的第三方向上延伸，并且在第三方向上穿过基极区域。 第一半导体区域设置在栅极绝缘膜和漏极区之间，并且具有比漂移区更低的杂质浓度。

公开(公告)号：US20130248995A1

公开(公告)日：2013-09-26

申请号：US13607533

申请日：2012-09-07

申请人： Tatsuya NISHIWAKI ,  Tsuyoshi Ota ,  Norio Yasuhara ,  Masatoshi Arai ,  Takahiro Kawano

发明人： Tatsuya NISHIWAKI ,  Tsuyoshi Ota ,  Norio Yasuhara ,  Masatoshi Arai ,  Takahiro Kawano

IPC分类号： H01L29/78 ,  H01L21/82 ,  H01L27/088

CPC分类号： H01L29/7827 ,  H01L21/82 ,  H01L27/088 ,  H01L29/1095 ,  H01L29/407 ,  H01L29/41766 ,  H01L29/41775 ,  H01L29/42368 ,  H01L29/456 ,  H01L29/66727 ,  H01L29/66734 ,  H01L29/7813

摘要： A semiconductor device includes a first semiconductor layer of a first conductivity type, a base layer of a second conductivity type placed above the first semiconductor layer, a second semiconductor layer of the first conductivity type placed above the base layer, multiple gate electrodes having upper end is positioned above the upper surface of the base layer, a lower end positioned below the bottom of the base layer, and contacting the first semiconductor layer, the second semiconductor layer, and the base layer through a gate insulating film, insulating component arranged above the gate electrode in which the upper surface is positioned below the upper surface of the second semiconductor layer, and a conductive layer covering the second semiconductor layer from the upper end to the bottom end.

摘要翻译： 半导体器件包括第一导电类型的第一半导体层，位于第一半导体层上方的第二导电类型的基极层，位于基极层之上的第一导电类型的第二半导体层，具有上端的多个栅电极 位于所述基底层的上表面的上方，位于所述基底层的底部下方的下端，并且通过栅极绝缘膜与所述第一半导体层，所述第二半导体层和所述基底层接触， 栅电极，其上表面位于第二半导体层的上表面下方，以及导电层，其从上端到底端覆盖第二半导体层。