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    Decoding device and semiconductor device which read file rewriting discrimination information
    1.
    发明授权
    Decoding device and semiconductor device which read file rewriting discrimination information 有权
    读取文件重写识别信息的解码装置和半导体装置

    公开(公告)号：US08032696B2

    公开(公告)日：2011-10-04

    申请号：US12364111

    申请日：2009-02-02

    申请人： Tsuyoshi Takayama ,  Akihiro Shibata

    发明人： Tsuyoshi Takayama ,  Akihiro Shibata

    IPC分类号： G06F12/00

    CPC分类号： G11B27/36 ,  G11B27/11 ,  G11B27/329 ,  G11B2220/65

    摘要： When an external recording medium connected to an interface is removed therefrom and a new external recording medium is connected to the interface, a processor selects either first file analysis information read from a memory or second file analysis information generated based on analysis of data recorded on the new external recording medium as file analysis information to be used for decoding a file stored in the new external recording medium, and the processor makes such selection based on comparison between first recording medium management information and second recording medium management information.

    摘要翻译： 当连接到接口的外部记录介质被移除并且新的外部记录介质被连接到接口时，处理器选择从存储器读取的第一文件分析信息或基于记录在存储器上的数据的分析生成的第二文件分析信息 新的外部记录介质作为用于解码存储在新的外部记录介质中的文件的文件分析信息，并且处理器基于第一记录介质管理信息和第二记录介质管理信息之间的比较来进行这样的选择。

    PULSE WIDTH MODULATION METHOD AND DIGITAL ANALOGUE CONVERTER USING THE SAME
    2.
    发明申请
    PULSE WIDTH MODULATION METHOD AND DIGITAL ANALOGUE CONVERTER USING THE SAME 有权
    脉冲宽度调制方法和数字模拟转换器

    公开(公告)号：US20080180293A1

    公开(公告)日：2008-07-31

    申请号：US12016618

    申请日：2008-01-18

    申请人： Naotake Kitahira ,  Tsuyoshi Takayama

    发明人： Naotake Kitahira ,  Tsuyoshi Takayama

    IPC分类号： H03M1/66 ,  H03K7/08

    CPC分类号： H03M3/358 ,  H03M3/506 ,  H03M7/3022

    摘要： In a pulse width modulation method of the present invention, a digital signal is modulated and a pulse width modulation signal is generated in a pulse width modulator by using a digital signal output unit and the pulse width modulator The pulse width modulation method includes: outputting to the pulse width modulator a first value corresponding to the input signal as a first digital signal at a first timing by the digital signal output unit; determining a limited value range based on the first value by the digital signal output unit; determining a second value corresponding to a new input signal by the digital signal output unit; judging whether or not the second value is included in the limited value range, and when the second value being judged to be included, outputting the second value to the pulse width modulator as a second digital signal, and when the second value being judged not to be included, outputting a value included in the limited value range to the pulse width modulator as the second digital signal at the second timing at which at least one cycle has elapsed from the first timing by the digital signal output unit; and modulating the pulse width of the second digital signal and generating the pulse width modulation signal, by the pulse width modulator.

    摘要翻译： 在本发明的脉冲宽度调制方法中，通过使用数字信号输出单元和脉宽调制器，调制数字信号并在脉宽调制器中产生脉宽调制信号。脉宽调制方法包括：输出到 所述脉冲宽度调制器通过所述数字信号输出单元在第一定时处对应于作为第一数字信号的输入信号的第一值; 基于由数字信号输出单元的第一值确定有限值范围; 由所述数字信号输出单元确定对应于新的输入信号的第二值; 判断第二值是否包括在有限值范围内，并且当判断为包括第二值时，将第二值作为第二数字信号输出到脉宽调制器，并且当第二值被判断为不 被包括，在由数字信号输出单元从第一定时经过至少一个周期的第二定时将包括在限制值范围内的值输出到脉宽调制器作为第二数字信号; 并通过脉冲宽度调制器调制第二数字信号的脉冲宽度并产生脉宽调制信号。

    Operational amplifier
    4.
    发明授权
    Operational amplifier 有权
    运算放大器

    公开(公告)号：US6049253A

    公开(公告)日：2000-04-11

    申请号：US238578

    申请日：1999-01-28

    申请人： Tsuyoshi Takayama

    发明人： Tsuyoshi Takayama

    IPC分类号： H03F1/30 ,  H03F1/32 ,  H03F3/30 ,  H03F3/45

    CPC分类号： H03F3/3027 ,  H03F1/308 ,  H03F1/3217

    摘要： Both the distortion characteristic and the through rate characteristic of an operational amplifier are excellently retained over a wide range of a supply voltage. While an operating current of a differential circuit is controlled by a first current source circuit, an operating current of a level shift circuit is controlled by a second current source circuit. The first current source circuit controls the operating current to be substantially constant against a change of the supply voltage, so that the through rate characteristic of the operational amplifier can be good over a predetermined range of the supply voltage. The second current source circuit controls the operating current so that a difference between the supply voltage and a level shift voltage can be substantially constant against the change of the supply voltage so as not to degrade the distortion characteristic of the operational amplifier over the predetermined range of the supply voltage. As a result, the distortion characteristic and the through rate characteristic of the operational amplifier can be excellently retained over a wide range of the supply voltage.

    摘要翻译： 运算放大器的失真特性和通过速率特性两者都在电源电压的宽范围内保持良好。 当差分电路的工作电流由第一电流源电路控制时，电平移位电路的工作电流由第二电流源电路控制。 第一电流源电路控制工作电流相对于电源电压的变化基本上恒定，使得运算放大器的通过速率特性在电源电压的预定范围内可以是良好的。 第二电流源电路控制工作电流，使得电源电压和电平转换电压之间的差可以相对于电源电压的变化基本上是恒定的，从而不会在运行放大器的预定范围内降低运算放大器的失真特性 电源电压。 结果，运算放大器的失真特性和通过速率特性可以在电源电压的宽范围内被极好地保持。

    Digital signal requantizing circuit using multistage noise shaping
    5.
    发明授权
    Digital signal requantizing circuit using multistage noise shaping 失效
    使用多种噪声形状的数字信号请求电路

    公开(公告)号：US5124703A

    公开(公告)日：1992-06-23

    申请号：US680668

    申请日：1991-04-05

    申请人： Tetsuhiko Kaneaki ,  Tsuyoshi Takayama

    发明人： Tetsuhiko Kaneaki ,  Tsuyoshi Takayama

    IPC分类号： H03M3/02 ,  H03M7/00 ,  H03M7/32

    CPC分类号： H03M7/3022 ,  H03M7/3042

    摘要： In a digital signal noise shaping requantization circuit formed of a first delta-sigma quantizer (main loop) for executing noise shaping of an input digital signal and a second delta-sigma quantizer (sub-loop) which receives as input signal the quantization error of a local quantizer in the first delta-sigma quantizer, and whose output signal is differentiated and added to the output signal from the first delta-sigma quantizer, the second delta-sigma quantizer includes a feedback circuit for operating on a quantization error of a local quantizer therein, with a predetermined transfer function. The output signal from the feedback circuit, in addition to being fed back to the input of the second delta-sigma quantizer, is also applied to control the operation of the first delta-sigma quantizer such as to modify the value of quantization error of the local quantizer of the first delta-sigma quantizer, for thereby ensuring stable and effective operation of the second delta-sigma quantizer even when the input digital signal attains a high amplitude.

    SEMICONDUCTOR DEVICE
    7.
    发明申请
    SEMICONDUCTOR DEVICE 有权
    半导体器件

    公开(公告)号：US20120091573A1

    公开(公告)日：2012-04-19

    申请号：US13112385

    申请日：2011-05-20

    申请人： Taishi SASAKI ,  Tsuyoshi TAKAYAMA ,  Mikio ISHIHARA

    发明人： Taishi SASAKI ,  Tsuyoshi TAKAYAMA ,  Mikio ISHIHARA

    IPC分类号： H01L23/34

    CPC分类号： H01L23/3107 ,  H01L23/4006 ,  H01L23/4334 ,  H01L23/473 ,  H01L24/45 ,  H01L24/48 ,  H01L2224/45124 ,  H01L2224/48137 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2924/181 ,  H01L2924/00014 ,  H01L2924/00012

    摘要： Provided is a semiconductor device including a heat dissipating fin; an insulating sheet bonded to an upper surface of the heat dissipating fin, with a part of the upper surface being exposed; a heat spreader located on the insulating sheet; a power element located on the heat spreader; and a transfer molding resin located to cover a predetermined surface including the part of the upper surface of the heat dissipating fin, the insulating sheet, the heat spreader and the power element, wherein the upper surface of the heat dissipating fin has a protruding shape and/or recessed shape located so as to bind an edge of the insulating sheet.

    摘要翻译： 提供了一种包括散热片的半导体器件; 绝缘片与所述散热片的上表面接合，所述上表面的一部分露出; 位于绝缘片上的散热器; 位于散热器上的功率元件; 以及覆盖包括散热片，绝缘片，散热器和功率元件的上表面的一部分的预定表面的传递模塑树脂，其中散热片的上表面具有突出形状，并且 /或凹形形状，以便结合绝缘片的边缘。

    Pulse width modulation method and digital analogue converter using the same
    9.
    发明授权
    Pulse width modulation method and digital analogue converter using the same 有权
    脉宽调制方式和数字模拟转换器采用相同方式

    公开(公告)号：US07532141B2

    公开(公告)日：2009-05-12

    申请号：US12016618

    申请日：2008-01-18

    申请人： Naotake Kitahira ,  Tsuyoshi Takayama

    发明人： Naotake Kitahira ,  Tsuyoshi Takayama

    IPC分类号： H03M1/82

    CPC分类号： H03M3/358 ,  H03M3/506 ,  H03M7/3022

    摘要： In a pulse width modulation method of the present invention, a digital signal is modulated and a pulse width modulation signal is generated in a pulse width modulator by using a digital signal output unit and the pulse width modulator The pulse width modulation method includes: outputting to the pulse width modulator a first value corresponding to the input signal as a first digital signal at a first timing by the digital signal output unit; determining a limited value range based on the first value by the digital signal output unit; determining a second value corresponding to a new input signal by the digital signal output unit; judging whether or not the second value is included in the limited value range, and when the second value being judged to be included, outputting the second value to the pulse width modulator as a second digital signal, and when the second value being judged not to be included, outputting a value included in the limited value range to the pulse width modulator as the second digital signal at the second timing at which at least one cycle has elapsed from the first timing by the digital signal output unit; and modulating the pulse width of the second digital signal and generating the pulse width modulation signal, by the pulse width modulator.

    摘要翻译： 在本发明的脉冲宽度调制方法中，通过使用数字信号输出单元和脉宽调制器，调制数字信号并在脉宽调制器中产生脉宽调制信号。脉宽调制方法包括：输出到 所述脉冲宽度调制器通过所述数字信号输出单元在第一定时处对应于作为第一数字信号的输入信号的第一值; 基于由数字信号输出单元的第一值确定有限值范围; 由所述数字信号输出单元确定对应于新的输入信号的第二值; 判断第二值是否包括在有限值范围内，并且当判断为包括第二值时，将第二值作为第二数字信号输出到脉宽调制器，并且当第二值被判断为不 被包括，在由数字信号输出单元从第一定时经过至少一个周期的第二定时将包括在限制值范围内的值输出到脉宽调制器作为第二数字信号; 并通过脉冲宽度调制器调制第二数字信号的脉冲宽度并产生脉宽调制信号。

    Tone output device and integrated circuit for tone output
    10.
    发明授权
    Tone output device and integrated circuit for tone output 有权
    音频输出设备和音频输出集成电路

    公开(公告)号：US07425673B2

    公开(公告)日：2008-09-16

    申请号：US11583984

    申请日：2006-10-20

    申请人： Kosei Fujisaka ,  Tetsuro Sugioka ,  Kazuki Adachi ,  Kiyomi Kimura ,  Tsuyoshi Takayama

    发明人： Kosei Fujisaka ,  Tetsuro Sugioka ,  Kazuki Adachi ,  Kiyomi Kimura ,  Tsuyoshi Takayama

    IPC分类号： G10H7/00

    CPC分类号： G10H7/04

    摘要： In a tone output device 100, an oscillator 102 outputs a clock 141 that is emitted by a crystal resonator. A multiplication circuit 103 outputs a clock 142 that is generated by multiplying the clock 141. A timing control circuit 104 outputs a timing signal 150 generated based on the clock 142 for operations of a CPU 105. The CPU 105 operates in sync with the timing signal 150. The DA converter 115 operates in sync with a signal generated based on the clock 141. The timing adjustment circuit 114 detects deviation of the clock 142 from the clock 141 resulting from frequency jitter of the clock 142, and prevents occurrence of clock racing.

    摘要翻译： 在音调输出装置100中，振荡器102输出由晶体谐振器发射的时钟141。 乘法电路103输出通过乘以时钟141而产生的时钟142。 定时控制电路104输出用于CPU 105的操作的基于时钟142生成的定时信号150。 CPU 105与定时信号150同步操作。 DA转换器115与基于时钟141产生的信号同步操作。 定时调整电路114检测由时钟142的频率抖动引起的时钟142与时钟141的偏差，并且防止时钟竞赛的发生。