公开(公告)号：US20130320289A1

公开(公告)日：2013-12-05

申请号：US13612844

申请日：2012-09-13

Applicant: Wei-Su Chen ,  Tai-Yuan Wu ,  Frederick T. Chen ,  Pang-Hsu Chen

Inventor： Wei-Su Chen ,  Tai-Yuan Wu ,  Frederick T. Chen ,  Pang-Hsu Chen

IPC: H01L45/00

CPC classification number: H01L45/145 ,  H01L45/08 ,  H01L45/1608 ,  H01L45/1675

Abstract: A resistance random access memory including a first electrode layer, a second electrode layer, and a stacked structure is provided. The stacked structure includes a HfZrON layer and a ZrON layer and is located between the first electrode layer and the second electrode layer. In addition, the disclosure further provides a method of fabricating a resistance random access memory.

Abstract translation: 提供包括第一电极层，第二电极层和堆叠结构的电阻随机存取存储器。 堆叠结构包括HfZrON层和ZrON层，并且位于第一电极层和第二电极层之间。 另外，本发明还提供一种制造电阻随机存取存储器的方法。

公开(公告)号：US08212231B2

公开(公告)日：2012-07-03

申请号：US12649350

申请日：2009-12-30

Applicant: Wei-Su Chen

Inventor： Wei-Su Chen

IPC: H01L47/00

CPC classification number: H01L27/24

Abstract: A resistive memory device and a fabricating method thereof are introduced herein. In resistive memory device, a plurality of bottom electrodes is disposed in active region of a substrate. Each of the bottom electrodes is disposed to correspond to each of the conductive channels; a patterned resistance switching material layer and the patterned top electrode layer are sequentially stacked on the bottom electrodes. An air dielectric layer exists between the patterned resistance switching material layer and the bottom electrodes. A plurality of patterned interconnections is disposed on the patterned top electrode.

Abstract translation: 本文介绍了一种电阻式存储器件及其制造方法。 在电阻式存储器件中，多个底部电极设置在衬底的有源区中。 每个底部电极设置成对应于每个导电通道; 图案化的电阻开关材料层和图案化的顶部电极层依次层叠在底部电极上。 在图案化的电阻切换材料层和底部电极之间存在空气介电层。 多个图案化互连设置在图案化的顶部电极上。

公开(公告)号：US08072018B2

公开(公告)日：2011-12-06

申请号：US11966726

申请日：2007-12-28

Applicant: Wei-Su Chen ,  Ming-Jinn Tsai

Inventor： Wei-Su Chen ,  Ming-Jinn Tsai

IPC: H01L29/788

CPC classification number: H01L27/115 ,  H01L27/11521 ,  H01L27/11568 ,  H01L27/11578 ,  H01L27/11582

Abstract: A semiconductor device is provided. The semiconductor device comprises a substrate. A lamination structure is on the substrate along a first direction. The lamination structure comprises a plurality of conductive layers arranged from bottom to top and separated from each other, and each of the conductive layers has a channel region and an adjacent source/drain doped region along the first direction. A first gate structure is on a sidewall of the channel region of each conductive layer. The first gate structure comprises an inner first gate insulating layer and an outer first gate conductive layer.

Abstract translation: 提供半导体器件。 半导体器件包括衬底。 层压结构沿着第一方向在基板上。 层压结构包括从底部到顶部布置并彼此分离的多个导电层，并且每个导电层具有沿着第一方向的沟道区和相邻的源极/漏极掺杂区。 第一栅极结构在每个导电层的沟道区的侧壁上。 第一栅极结构包括内部第一栅极绝缘层和外部第一栅极导电层。

公开(公告)号：US07835177B2

公开(公告)日：2010-11-16

申请号：US11493595

申请日：2006-07-27

Applicant: Hong-Hui Hsu ,  Chien-Min Lee ,  Wen-Han Wang ,  Min-Hung Lee ,  Te-Sheng Chao ,  Yen Chuo ,  Yi-Chan Chen ,  Wei-Su Chen

Inventor： Hong-Hui Hsu ,  Chien-Min Lee ,  Wen-Han Wang ,  Min-Hung Lee ,  Te-Sheng Chao ,  Yen Chuo ,  Yi-Chan Chen ,  Wei-Su Chen

IPC: G11C11/00

CPC classification number: H01L45/1675 ,  G11C2213/52 ,  H01L45/06 ,  H01L45/1233 ,  H01L45/126 ,  H01L45/144

Abstract: A phase change memory (PCM) cell fabricated by etching a tapered structure into a phase change layer, and planarizing a dielectric layer on the phase change layer until a tip of the tapered structure is exposed for contacting a heating electrode. Therefore, the area of the exposed tip of the phase change layer is controlled to be of an extremely small size, the contact area between the phase change layer and the heating electrode is reduced, thereby lowering the operation current.

Abstract translation: 通过将锥形结构蚀刻成相变层而制造的相变存储器（PCM）单元，并且平坦化相变层上的电介质层直到锥形结构的尖端暴露以接触加热电极。 因此，相变层的露出端的面积被控制为极小的尺寸，相变层和加热电极之间的接触面积减小，从而降低了工作电流。

公开(公告)号：US20090269910A1

公开(公告)日：2009-10-29

申请号：US12398997

申请日：2009-03-05

Applicant: Wei-Su Chen

Inventor： Wei-Su Chen

IPC: H01L47/00

CPC classification number: H01L27/2463 ,  H01L45/06 ,  H01L45/124 ,  H01L45/126 ,  H01L45/1691

Abstract: In a method of fabricating a phase change memory (PCM) device, a substrate having bottom electrodes formed therein is provided. A first dielectric layer having cup-shaped thermal electrodes is formed over the substrate. Second dielectric layers are formed on the substrate. Stacked structures are formed on the substrate. A PC material film is formed over the substrate and covers the stacked structures and the second dielectric layers. The PC material film is anisotropically etched to form PC material spacers on sidewalls of the stacked structures, and each of the PC material spacers physically and electrically contacts each of the cup-shaped thermal electrodes and top electrodes. The PC material spacers include phase change material. The PC material spacers are over-etched to remove the PC material film on the sidewalls of the second dielectric layers.

Abstract translation: 在制造相变存储器（PCM）器件的方法中，提供了形成有底电极的衬底。 在基板上形成具有杯形热电极的第一电介质层。 在基板上形成第二电介质层。 在基板上形成堆叠结构。 PC材料膜形成在衬底上并覆盖堆叠结构和第二介质层。 PC材料膜被各向异性蚀刻以在层叠结构的侧壁上形成PC材料隔离物，并且每个PC材料隔离物物理上和电接触每个杯形热电极和顶部电极。 PC材料间隔物包括相变材料。 PC材料间隔物被过蚀刻以除去第二介电层侧壁上的PC材料膜。

公开(公告)号：US20090008695A1

公开(公告)日：2009-01-08

申请号：US11966726

申请日：2007-12-28

Applicant: Wei-Su Chen ,  Ming-Jinn Tsai

Inventor： Wei-Su Chen ,  Ming-Jinn Tsai

IPC: H01L27/115 ,  H01L21/8247

CPC classification number: H01L27/115 ,  H01L27/11521 ,  H01L27/11568 ,  H01L27/11578 ,  H01L27/11582

Abstract: A semiconductor device is provided. The semiconductor device comprises a substrate. A lamination structure is on the substrate along a first direction. The lamination structure comprises a plurality of conductive layers arranged from bottom to top and separated from each other, and each of the conductive layers has a channel region and an adjacent source/drain doped region along the first direction. A first gate structure is on a sidewall of the channel region of each conductive layer. The first gate structure comprises an inner first gate insulating layer and an outer first gate conductive layer.

Abstract translation: 提供一种半导体器件。 半导体器件包括衬底。 层压结构沿着第一方向在基板上。 层压结构包括从底部到顶部布置并彼此分离的多个导电层，并且每个导电层具有沿着第一方向的沟道区和相邻的源极/漏极掺杂区。 第一栅极结构在每个导电层的沟道区的侧壁上。 第一栅极结构包括内部第一栅极绝缘层和外部第一栅极导电层。

公开(公告)号：US20070148862A1

公开(公告)日：2007-06-28

申请号：US11437661

申请日：2006-05-22

Applicant: Yi-Chan Chen ,  Hong-Hui Hsu ,  Chien-Min Lee ,  Yen Chuo ,  Te-Sheng Chao ,  Wen-Han Wang ,  Wei-Su Chen ,  Min-Hung Lee

Inventor： Yi-Chan Chen ,  Hong-Hui Hsu ,  Chien-Min Lee ,  Yen Chuo ,  Te-Sheng Chao ,  Wen-Han Wang ,  Wei-Su Chen ,  Min-Hung Lee

IPC: H01L21/336

CPC classification number: H01L45/165 ,  H01L45/06 ,  H01L45/1233 ,  H01L45/126 ,  H01L45/144 ,  H01L45/1641

Abstract: A phase-change memory layer and method for manufacturing the same and a phase-change memory cell are provided. The phase-change memory layer is crystallized by adding one or more heterogeneous crystals that do not react with phase-change materials as the crystal nucleus, so as to reduce the time for transforming to the crystalline state from the amorphous state.

Abstract translation: 提供了一种相变存储器层及其制造方法和相变存储单元。 通过加入与相变材料不反应的一种或多种非晶体晶体作为晶核，相变记忆层结晶，从而减少从非晶态转变为结晶态的时间。

公开(公告)号：US08241990B2

公开(公告)日：2012-08-14

申请号：US12649333

申请日：2009-12-30

Applicant: Wei-Su Chen

Inventor： Wei-Su Chen

IPC: H01L21/76

CPC classification number: H01L27/24

Abstract: An air gap fabricating method is provided. A patterned sacrificial layer is formed over a substrate, and the material of the patterned sacrificial layer includes a germanium-antimony-tellurium alloy. A dielectric layer is formed on the patterned sacrificial layer. A reactant is provided to react with the patterned sacrificial layer and the patterned sacrificial layer is removed to form a structure with an air gap disposed at the original position of the patterned sacrificial layer.

Abstract translation: 提供一种气隙制造方法。 图案化的牺牲层形成在衬底上，并且图案化牺牲层的材料包括锗 - 锑 - 碲合金。 在图案化的牺牲层上形成介电层。 提供反应物以与图案化的牺牲层反应并且去除图案化的牺牲层以形成具有设置在图案化牺牲层的原始位置处的气隙的结构。

公开(公告)号：US07989795B2

公开(公告)日：2011-08-02

申请号：US11857396

申请日：2007-09-18

Applicant: Wei-Su Chen ,  Yi-Chan Chen ,  Hong-Hui Hsu ,  Chien-Min Lee ,  Der-Sheng Chao ,  Chih Wei Chen ,  Ming-Jinn Tsai

Inventor： Wei-Su Chen ,  Yi-Chan Chen ,  Hong-Hui Hsu ,  Chien-Min Lee ,  Der-Sheng Chao ,  Chih Wei Chen ,  Ming-Jinn Tsai

IPC: H01L29/04

CPC classification number: H01L27/2409 ,  H01L27/2463 ,  H01L45/06 ,  H01L45/124 ,  H01L45/126 ,  H01L45/144 ,  H01L45/148 ,  H01L45/1691

Abstract: A phase change memory device is provided. The phase change memory device comprises a substrate. An electrode layer is on the substrate. A phase change memory structure is on the electrode layer and electrically connected to the electrode layer, wherein the phase change memory structure comprises a cup-shaped heating electrode on the electrode layer. An insulating layer is on the cup-shaped heating electrode along a first direction covering a portion of the cup-shaped heating electrode. An electrode structure is on the cup-shaped heating electrode along a second direction covering a portion of the insulating layer and the cup-shaped heating electrode. A pair of double spacers is on a pair of sidewalls of the electrode structure covering a portion of the cup-shaped heating electrode, wherein the double spacer comprises a phase change material spacer and an insulating material spacer on a sidewall of the phase change material spacer.

Abstract translation: 提供了相变存储器件。 相变存储器件包括衬底。 电极层位于基板上。 相变存储器结构在电极层上并电连接到电极层，其中相变存储器结构包括在电极层上的杯形加热电极。 绝缘层沿着覆盖杯状加热电极的一部分的第一方向位于杯状加热电极上。 电极结构沿着覆盖绝缘层和杯状加热电极的一部分的第二方向位于杯状加热电极上。 一对双间隔物位于电极结构的一对侧壁上，覆盖杯状加热电极的一部分，其中双间隔物包括相变材料间隔物和在相变材料间隔物的侧壁上的绝缘材料间隔物 。

公开(公告)号：US07868314B2

公开(公告)日：2011-01-11

申请号：US12547744

申请日：2009-08-26

Applicant: Wei-Su Chen ,  Yi-Chan Chen ,  Wen-Han Wang ,  Hong-Hui Hsu ,  Chien-Min Lee ,  Yen Chuo ,  Te-Sheng Chao ,  Min-Hung Lee

Inventor： Wei-Su Chen ,  Yi-Chan Chen ,  Wen-Han Wang ,  Hong-Hui Hsu ,  Chien-Min Lee ,  Yen Chuo ,  Te-Sheng Chao ,  Min-Hung Lee

IPC: H01L47/00

CPC classification number: H01L45/06 ,  H01L45/122 ,  H01L45/126 ,  H01L45/144 ,  H01L45/16

Abstract: A phase change memory device and fabricating method are provided. A disk-shaped phase change layer is buried within the insulating material. A center via and ring via are formed by a lithography. The center via is located in the center of the phase change layer and passes through the phase change layer, and the ring via takes the center via as a center. A heating electrode within the center via performs Joule heating of the phase change layer, and the contact area between the phase change layer and the heating electrode is reduced by controlling the thickness of the phase change layer. Furthermore, a second electrode within the ring via dissipates the heat transmitted to the contact interface between the phase change layers, so as to avoid transmitting the heat to the etching boundary at the periphery of the phase change layer.

Abstract translation: 提供了一种相变存储器件及其制造方法。 盘状相变层被埋在绝缘材料内。 通过光刻形成中心通孔和环形通孔。 中心通孔位于相变层的中心，通过相变层，环形通孔以中心通孔为中心。 中心通孔内的加热电极进行相变层的焦耳加热，通过控制相变层的厚度来降低相变层与加热电极之间的接触面积。 此外，环通孔内的第二电极耗散了传递到相变层之间的接触界面的热量，以避免将热量传递到相变层周围的蚀刻边界。