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    Semiconductor device with semi-insulating substrate portions and method for forming the same
    3.
    发明授权
    Semiconductor device with semi-insulating substrate portions and method for forming the same 失效
    具有半绝缘基板部分的半导体器件及其形成方法

    公开(公告)号：US07622358B2

    公开(公告)日：2009-11-24

    申请号：US11241574

    申请日：2005-09-30

    申请人： Wen-Chin Lin ,  Denny Tang ,  Chuan-Ying Lee ,  Hsu Chen Cheng

    发明人： Wen-Chin Lin ,  Denny Tang ,  Chuan-Ying Lee ,  Hsu Chen Cheng

    IPC分类号： H01L21/76

    CPC分类号： H01L21/76 ,  H01L21/263 ,  H01L21/26506 ,  H01L21/266 ,  H01L21/823481 ,  H01L21/823878 ,  H01L27/08

    摘要： A method for forming semi-insulating portions in a semiconductor substrate provides depositing a hardmask film over a semiconductor substructure to a thickness sufficient to prevent charged particles from passing through the hardmask. The hardmask is patterned creating openings through which charged particles pass and enter the substrate during an implantation process. The semi-insulating portions may extend deep into the semiconductor substrate and electrically insulate devices formed on opposed sides of the semi-insulating portions. The charged particles may advantageously be protons and further substrate portions covered by the patterned hardmask film are substantially free of the charged particles.

    摘要翻译： 在半导体衬底中形成半绝缘部分的方法提供了将半导体衬底上的硬掩模膜沉积到足以防止带电粒子穿过硬掩模的厚度。 硬掩模被图案化以产生开孔，在注入过程中带电粒子通过该开口进入衬底。 半绝缘部分可以深深地延伸到半导体衬底中并且电绝缘形成在半绝缘部分的相对侧上的器件。 带电粒子可以有利地是质子，并且由图案化的硬掩模膜覆盖的另外的基底部分基本上没有带电粒子。

    Advanced MRAM design
    5.
    发明申请
    Advanced MRAM design 有权
    先进的MRAM设计

    公开(公告)号：US20080186757A1

    公开(公告)日：2008-08-07

    申请号：US11743453

    申请日：2007-05-02

    申请人： Wen-Chin Lin ,  Hsu-Chen Cheng ,  Yu-Jen Wang ,  Denny Tang

    发明人： Wen-Chin Lin ,  Hsu-Chen Cheng ,  Yu-Jen Wang ,  Denny Tang

    IPC分类号： G11C11/00

    CPC分类号： G11C11/16 ,  G11C11/005 ,  H01L2924/0002 ,  H01L2924/00

    摘要： Disclosed herein is a technique for created an advanced MRAM array for constructing a memory integrated circuit chip. More specifically, the disclosed principles provide for an integrated circuit memory chip comprised of a combination of at least one of an array of high-speed magnetic memory cells, and at least one of an array of high-density magnetic memory cells. Accordingly, a memory chip constructed as disclosed herein provides the benefit of both high-speed and high-density memory cells on the same memory chip. As a result, applications benefiting from the use of (or perhaps even needing) high-speed memory cells are provided by the memory cells in the high-speed memory cell array.

    摘要翻译： 这里公开了一种用于创建用于构建存储器集成电路芯片的高级MRAM阵列的技术。 更具体地，所公开的原理提供了由高速磁存储器单元的阵列中的至少一个和高密度磁存储单元阵列中的至少一个的组合构成的集成电路存储器芯片。 因此，如本文所公开的构造的存储器芯片提供了在相同存储器芯片上的高速和高密度存储器单元的益处。 结果，受益于使用（或甚至需要的）高速存储器单元的应用由高速存储单元阵列中的存储单元提供。

    Yellow dye compound and the ink composition thereof
    6.
    发明授权
    Yellow dye compound and the ink composition thereof 失效
    黄色染料化合物及其油墨组合物

    公开(公告)号：US07270702B1

    公开(公告)日：2007-09-18

    申请号：US11452909

    申请日：2006-06-15

    申请人： Wen-Chin Lin ,  Tzu-Kwei Sun ,  Jen-Fang Lin

    发明人： Wen-Chin Lin ,  Tzu-Kwei Sun ,  Jen-Fang Lin

    IPC分类号： C09D11/00 ,  C09B29/036 ,  C09B67/22

    CPC分类号： C09D11/32 ,  C09B29/363

    摘要： The present invention discloses a yellow dye compound having a structure of the following formula (I): wherein M is H, Li, NH4 or Na. The dye compound of the present invention is particularly applied to yellow dye compound for paper-printing ink jet ink and can be made into yellow ink jet ink with greenish yellow, wide color gamut, and excellent solubility.

    摘要翻译： 本发明公开了具有下式（I）结构的黄色染料化合物：其中M为H，Li，NH 4或Na。 本发明的染料化合物特别适用于纸张喷墨油墨的黄色染料化合物，并且可以制成具有黄绿色，宽色域和优异溶解性的黄色喷墨油墨。

    ELECTRONIC DEVICE WITH ACCELERATED BOOT PROCESS AND METHOD FOR THE SAME
    7.
    发明申请
    ELECTRONIC DEVICE WITH ACCELERATED BOOT PROCESS AND METHOD FOR THE SAME 审中-公开
    具有加速引导过程的电子设备及其相关方法

    公开(公告)号：US20070162736A1

    公开(公告)日：2007-07-12

    申请号：US11462409

    申请日：2006-08-04

    申请人： Tung-Peng Wu ,  Wei-Te Hsu ,  Wen-Chin Lin

    发明人： Tung-Peng Wu ,  Wei-Te Hsu ,  Wen-Chin Lin

    IPC分类号： G06F15/177 ,  G06F9/00

    CPC分类号： G06F9/4401

    摘要： An electronic device with accelerated boot process and a method for the same are proposed. When the host of the electronic device is in the off mode or standby mode, users can input a normal boot signal or a fast boot signal to activate the host. The boot signal is encoded by an encoder for producing a corresponding code. The host determines whether the input signal is the normal boot signal or the fast boot signal according to the received code. If the received code is the normal boot signal, the host performs a normal boot process. If the received code is the fast boot signal, an instant launcher directly launches application programs specified in the fast boot signal and blocks the start of unnecessary application programs. The boot process of the electronic device can be effectively accelerated, and users can define several boot modes themselves to meet different requirements.

    摘要翻译： 提出了一种具有加速启动过程的电子设备及其方法。 当电子设备的主机处于关闭模式或待机模式时，用户可以输入正常的引导信号或快速引导信号来激活主机。 引导信号由用于产生相应代码的编码器编码。 主机根据接收到的代码确定输入信号是正常引导信号还是快速启动信号。 如果接收到的代码是正常引导信号，则主机执行正常引导过程。 如果接收的代码是快速启动信号，即时启动器将直接启动在快速引导信号中指定的应用程序，并阻止不必要的应用程序的启动。 电子设备的启动过程可以有效加速，用户可以自己定义几种启动模式，以满足不同的需求。

    Magnetic memory cells and manufacturing methods
    8.
    发明申请
    Magnetic memory cells and manufacturing methods 有权
    磁记忆体和制造方法

    公开(公告)号：US20070096230A1

    公开(公告)日：2007-05-03

    申请号：US11610760

    申请日：2006-12-14

    申请人： Yuan-Hung Liu ,  Chih-Ta Wu ,  Lan-Lin Chao ,  Yeur-Luen Tu ,  Wen-Chin Lin ,  Chia-Shiung Tsai

    发明人： Yuan-Hung Liu ,  Chih-Ta Wu ,  Lan-Lin Chao ,  Yeur-Luen Tu ,  Wen-Chin Lin ,  Chia-Shiung Tsai

    IPC分类号： H01L43/00 ,  H01L29/82

    CPC分类号： H01L43/12 ,  H01L27/228

    摘要： An improved magnetoresistive memory device has a reduced distance between the magnetic memory element and a conductive memory line used for writing to the magnetic memory element. The reduced distance is facilitated by forming the improved magnetoresistive memory device according to a method that includes forming a mask over the magnetoresistive memory element and forming an insulating layer over the mask layer, then removing portions of the insulating layer using a planarization process. A conductive via can then be formed in the mask layer, for example using a damascene process. The conductive memory line can then be formed over the mask layer and conductive via.

    摘要翻译： 改进的磁阻存储器件具有减小的磁存储元件与用于写入磁存储器元件的导电存储器线之间的距离。 通过根据包括在磁阻存储元件上形成掩模并在掩模层上形成绝缘层，然后使用平坦化处理去除绝缘层的部分的方法，通过形成改进的磁阻存储器件来简化缩短的距离。 然后可以在掩模层中形成导电通孔，例如使用镶嵌工艺。 然后可以在掩模层和导电通孔上形成导电存储器线。

    Segmented MRAM memory array
    9.
    发明授权
    Segmented MRAM memory array 有权
    分段MRAM存储器阵列

    公开(公告)号：US07203129B2

    公开(公告)日：2007-04-10

    申请号：US10780171

    申请日：2004-02-16

    申请人： Wen-Chin Lin ,  Danny D. Tang ,  Li-Shyue Lai

    发明人： Wen-Chin Lin ,  Danny D. Tang ,  Li-Shyue Lai

    IPC分类号： G11C8/00

    CPC分类号： G11C11/16 ,  G11C2213/72 ,  G11C2213/74

    摘要： In one example, an MRAM memory array includes a plurality of word lines, a plurality of bit lines crossing the word lines, and a plurality of first and second diodes, and magnetic tunnel junction memories. Each first diode includes a cathode, and an anode coupled to each bit line. Each second diode includes an anode, and a cathode coupled to each word line. The magnetic tunnel junction memories include a pinned layer, a free layer, and a non-magnetic layer. The non-magnetic layer is located between the pinned layer and the free layer. Each diode is positioned at crossing points of the bit lines and the word lines and connected between the first diode at the corresponding crossing bit line and the second diode at the corresponding crossing word line.

    摘要翻译： 在一个示例中，MRAM存储器阵列包括多个字线，与字线交叉的多个位线，以及多个第一和第二二极管以及磁性隧道结存储器。 每个第一二极管包括阴极和耦合到每个位线的阳极。 每个第二二极管包括阳极和耦合到每个字线的阴极。 磁性隧道结存储器包括钉扎层，自由层和非磁性层。 非磁性层位于被钉扎层和自由层之间。 每个二极管位于位线和字线的交叉点处，并连接在相应交叉位线处的第一二极管和相应交叉字线处的第二二极管之间。

    Semiconductor device with semi-insulating substrate portions and method for forming the same
    10.
    发明申请
    Semiconductor device with semi-insulating substrate portions and method for forming the same 失效
    具有半绝缘基板部分的半导体器件及其形成方法

    公开(公告)号：US20070077697A1

    公开(公告)日：2007-04-05

    申请号：US11241574

    申请日：2005-09-30

    申请人： Wen-Chin Lin ,  Denny Tang ,  Chuan-Ying Lee ,  H. C. Cheng

    发明人： Wen-Chin Lin ,  Denny Tang ,  Chuan-Ying Lee ,  H. C. Cheng

    IPC分类号： H01L21/8238 ,  H01L21/425 ,  H01L21/31

    CPC分类号： H01L21/76 ,  H01L21/263 ,  H01L21/26506 ,  H01L21/266 ,  H01L21/823481 ,  H01L21/823878 ,  H01L27/08

    摘要： A method for forming semi-insulating portions in a semiconductor substrate provides depositing a hardmask film over a semiconductor substructure to a thickness sufficient to prevent charged particles from passing through the hardmask. The hardmask is patterned creating openings through which charged particles pass and enter the substrate during an implantation process. The semi-insulating portions may extend deep into the semiconductor substrate and electrically insulate devices formed on opposed sides of the semi-insulating portions. The charged particles may advantageously be protons and further substrate portions covered by the patterned hardmask film are substantially free of the charged particles.

    摘要翻译： 在半导体衬底中形成半绝缘部分的方法提供了将半导体衬底上的硬掩模膜沉积到足以防止带电粒子穿过硬掩模的厚度。 硬掩模被图案化以产生开孔，在注入过程中带电粒子通过该开口进入衬底。 半绝缘部分可以深深地延伸到半导体衬底中并且电绝缘形成在半绝缘部分的相对侧上的器件。 带电粒子可以有利地是质子，并且由图案化的硬掩模膜覆盖的另外的基底部分基本上没有带电粒子。