Semiconductor memory devices having strapping contacts
    1.
    发明授权
    Semiconductor memory devices having strapping contacts 有权
    具有捆扎触点的半导体存储器件

    公开(公告)号:US08791448B2

    公开(公告)日:2014-07-29

    申请号:US13630505

    申请日:2012-09-28

    IPC分类号: H01L45/00 H01L23/48

    摘要: Semiconductor memory devices having strapping contacts are provided, the devices include cell regions and strapping regions between adjacent cell regions in a first direction. Active patterns, extending in the first direction throughout the cell regions and strapping regions, are spaced apart from one another in a second direction intersecting the first direction. First interconnection lines, extending in the first direction throughout the cell regions and strapping regions, are spaced apart from one another in the second direction while overlapping with the active patterns. Second interconnection lines, extending in the second direction, intersect the active patterns and first interconnection lines in the cell regions. The second interconnection lines are spaced apart from one another in the first direction. Memory cells are positioned at intersection portions of the first and second interconnection lines in the cell regions. The active patterns contact the first interconnection lines through strapping contacts in the strapping regions.

    摘要翻译: 提供了具有捆扎触点的半导体存储器件,器件包括在第一方向上的相邻单元区域之间的单元区域和绑带区域。 在整个单元区域和捆扎区域中沿着第一方向延伸的活动图案在与第一方向相交的第二方向上彼此间隔开。 在整个单元区域和捆扎区域沿第一方向延伸的第一互连线在第二方向上彼此间隔开,同时与有源图案重叠。 沿第二方向延伸的第二互连线与单元区域中的有源图案和第一互连线相交。 第二互连线在第一方向上彼此间隔开。 存储单元位于单元区域中的第一和第二互连线的交叉部分处。 有源图案通过捆扎区域中的捆扎触点接触第一互连线。

    Semiconductor memory devices having strapping contacts
    2.
    发明申请
    Semiconductor memory devices having strapping contacts 审中-公开
    具有捆扎触点的半导体存储器件

    公开(公告)号:US20080239783A1

    公开(公告)日:2008-10-02

    申请号:US12073661

    申请日:2008-03-07

    IPC分类号: G11C5/06

    摘要: Semiconductor memory devices having strapping contacts with an increased pitch are provided. The semiconductor memory devices include cell regions and strapping regions between adjacent cell regions in a first direction on a semiconductor substrate. Active patterns extend in the first direction throughout the cell regions and strapping regions and are spaced apart from one another in a second direction intersecting the first direction. First interconnection lines extend in the first direction throughout the cell regions and the strapping regions and are spaced apart from one another in the second direction while overlapping with the active patterns. Second interconnection lines extend in the second direction to intersect the active patterns and the first interconnection lines in the cell regions. The second interconnection lines are spaced apart from one another in the first direction. Memory cells are positioned at intersection portions of the first and second interconnection lines in the cell regions. Strapping contacts are in the strapping regions and configured such that the active patterns contact with the first interconnection lines through the strapping contacts.

    摘要翻译: 提供了具有增加的间距的具有捆扎触头的半导体存储器件。 半导体存储器件包括半导体衬底上的第一方向上的相邻单元区域之间的单元区域和绑带区域。 有源图案在整个单元区域和捆扎区域中沿第一方向延伸,并且在与第一方向相交的第二方向上彼此间隔开。 第一互连线在整个单元区域和捆扎区域的第一方向上延伸,并且在与活动图案重叠的同时在第二方向上彼此间隔开。 第二互连线在第二方向上延伸以与单元区域中的有源图案和第一互连线相交。 第二互连线在第一方向上彼此间隔开。 存储单元位于单元区域中的第一和第二互连线的交叉部分处。 绑带触点在捆扎区域中并且被配置成使得有源图案通过捆扎接触件与第一互连线接触。

    Semiconductor Memory Devices Having Strapping Contacts
    4.
    发明申请
    Semiconductor Memory Devices Having Strapping Contacts 有权
    具有捆扎触头的半导体存储器件

    公开(公告)号:US20130187119A1

    公开(公告)日:2013-07-25

    申请号:US13630505

    申请日:2012-09-28

    IPC分类号: H01L45/00

    摘要: Semiconductor memory devices having strapping contacts are provided, the devices include cell regions and strapping regions between adjacent cell regions in a first direction. Active patterns, extending in the first direction throughout the cell regions and strapping regions, are spaced apart from one another in a second direction intersecting the first direction. First interconnection lines, extending in the first direction throughout the cell regions and strapping regions, are spaced apart from one another in the second direction while overlapping with the active patterns. Second interconnection lines, extending in the second direction, intersect the active patterns and first interconnection lines in the cell regions. The second interconnection lines are spaced apart from one another in the first direction. Memory cells are positioned at intersection portions of the first and second interconnection lines in the cell regions. The active patterns contact the first interconnection lines through strapping contacts in the strapping regions.

    摘要翻译: 提供了具有捆扎触点的半导体存储器件,器件包括在第一方向上的相邻单元区域之间的单元区域和绑带区域。 在整个单元区域和捆扎区域中沿着第一方向延伸的活动图案在与第一方向相交的第二方向上彼此间隔开。 在整个单元区域和捆扎区域沿第一方向延伸的第一互连线在第二方向上彼此间隔开,同时与有源图案重叠。 沿第二方向延伸的第二互连线与单元区域中的有源图案和第一互连线相交。 第二互连线在第一方向上彼此间隔开。 存储单元位于单元区域中的第一和第二互连线的交叉部分处。 有源图案通过捆扎区域中的捆扎触头接触第一互连线。