摘要:
An error correction circuit, an error correction method, and a semiconductor memory device including the error correction circuit are provided. The error correction circuit includes a partial syndrome generator, first and second error position detectors, a coefficient calculator, and a determiner. The partial syndrome generator calculates at least two partial syndromes using coded data. The first error position detector calculates a first error position using a part of the partial syndromes. The coefficient calculator calculates coefficients of an error position equation using the at least two partial syndromes. The determiner determines an error type based on the coefficients. The second error position detector optionally calculates a second error position based on the error type.
摘要:
An apparatus and method for controlling content are provided. A memory which stores storage medium information regarding a storage medium, and a main control unit which groups a plurality of contents in the storage medium into a plurality of groups, allocates a group nonce to each group, stores the group nonce in the storage medium, and if a move of at least one content item of the plurality of content items is requested, controls the move of the content item based on whether the storage medium information contains an identifier or a group nonce of a first target group including the requested content item.
摘要:
An electronic device and an encryption method thereof are provided. The electronic device includes a control unit which encrypts an encryption key using an inherent key, and transmits the encrypted encryption key and a key index corresponding to the inherent key to a recording medium. Accordingly, encrypted content stored in a recording medium can be decrypted when an electronic device is malfunctioning or replaced with a new one.
摘要:
Provided is a low power consuming mixed mode amplifier. The power amplifier includes: a low output amplifier circuit generating a power amplified result having high efficiency in a low output mode the most frequently used; a high output amplifier circuit generating an amplified result having
摘要:
Provided is a method of booting an electronic device including a host central processing unit (CPU) and a security module. The method includes: the host CPU starting to boot a system by using boot information in response to a reset or power on event of the electronic device; and when an authentication start instruction is not received by the security module from the host CPU until a first predetermined period elapses after an occurrence of the reset or power on event of the electronic device, controlling an operation of the host CPU by the security module. According to the method, when the authentication start instruction is received before the first predetermined period elapses, the security module authenticates the boot information and controls the operation of the host CPU based on an authentication result. A method of authenticating a boot of the electronic device in the security module is also provided.
摘要:
An apparatus and method to encrypt data having hierarchical information are provided. The apparatus includes an N-th layer key generator, which generates an N-th layer key, an (N+1)-th layer key generator, which generates an (N+1)-th layer key by applying the N-th layer key to a predetermined function, an N-th layer data encryptor, which encrypts N-th layer data using the N-th layer key, and an (N+1)-th layer data encryptor, which encrypts (N+1)-th layer data using the (N+1)-th layer key.
摘要:
Provided are an apparatus and method for storing data. The apparatus includes a directory key generator generating a directory key required for encrypting and decrypting the data by inputting a device-specific key to a key generating function, the device-specific key being unique information allocated to the device and stored in a secure region of the device. The data is stored in at least one directory, and the directory key is used in encrypting and decrypting the data in units of directories. Accordingly, it is possible to minimize consumption of resources required to encrypt and decrypt the data.
摘要:
A synchronous dynamic random access memory capable of accessing data in a memory cell array therein in synchronism with a system clock from an external system such as a central processing unit (CPU). The synchronous DRAM receives an external clock and includes a plurality of memory banks each including a plurality of memory cells and operable in either an active cycle or a precharge cycle, a circuit for receiving a row address strobe signal and latching a logic level of the row address strobe signal in response to the clock, an address input circuit for receiving an externally generated address selecting one of the memory banks, and a circuit for receiving the latched logic level and the address from the address input circuit and for outputting an activation signal to the memory bank selected by the address and an inactivation signals to unselected memory banks when the latched logic level is a first logic level, so that the selected memory bank responsive to the activation signal operates in the active cycle while the unselected memory banks responsive to the inactivation signals operate in the precharge cycle.
摘要:
A method for updating a ROM BIOS includes the following steps: a step for reading an image data of a ROM BIOS which is to be updated; a step for reading a ROM BIOS image data from a ROM BIOS; a step for reading a new ROM BIOS image data from an auxiliary memory; a step for reading a new user information; a step for converting the new user information into an image data; a step for updating the new ROM BIOS image data and user information in the ROM BIOS. Since the user updates a ROM BIOS image data for oneself, the user information displayed during a POST operation can be displayed in the user's characteristic message. Therefore, the user can recognize one's computer through unique characteristics that are displayed on a monitor and easily identify one's computer among many different computers.
摘要:
A semiconductor memory device stably operates over a wide range of the power supply voltage by including a power supply voltage level detector for generating detecting signals according to predetermined levels of the power supply voltage and an oscillator for generating a frequency-controlled oscillation pulse whose frequency is changeable according to the detecting signals. Thus, a boosting ratio of a boosting circuit, the refresh period of a refresh circuit and the substrate voltage of a substrate voltage generator can be adaptively changeable according to the variation of the power supply voltage.