中科微点-全球专利检索

  1. Login
  2. Sign Up

Search Results

10 records (took 0.015 seconds)

    GERMANIUM OXIDE PRE-CLEAN MODULE AND PROCESS
    2.
    发明申请
    GERMANIUM OXIDE PRE-CLEAN MODULE AND PROCESS 有权
    氧化锗预清洁模块和工艺

    公开(公告)号：US20160192502A1

    公开(公告)日：2016-06-30

    申请号：US14586438

    申请日：2014-12-30

    Applicant: ASM IP HOLDING B.V.

    Inventor： John Tolle ,  Matthew G. Goodman

    IPC: H05K3/00

    CPC classification number: H01L21/0206 ,  B05D3/002 ,  B05D3/02 ,  B05D3/04 ,  B05D3/0433 ,  H01L21/02041 ,  H01L21/02046 ,  H01L21/306

    Abstract: In some embodiments, a method for integrated circuit fabrication includes removing oxide material from a surface of a substrate, where the surface includes silicon and germanium. Removing the oxide material includes depositing a halogen-containing pre-clean material on a silicon oxide-containing surface and sublimating a portion of the halogen-containing pre-clean material to expose the silicon on the surface. A passivation film is deposited on the exposed silicon. The passivation film may include chlorine. The passivation film may prevent contamination of the silicon surface by chemical species from the later sublimation, which may be at a higher temperature than the earlier sublimation. Subsequently, a remaining portion of the halogen-containing pre-clean material and the passivation film are sublimated. A target material, such as a conductive material, may subsequently be deposited on the substrate surface.

    Abstract translation: 在一些实施例中，用于集成电路制造的方法包括从衬底的表面去除氧化物材料，其中表面包括硅和锗。 除去氧化物材料包括将含卤素的预清洁材料沉积在含氧化硅的表面上并升华部分含卤素的预清洁材料以暴露表面上的硅。 钝化膜沉积在暴露的硅上。 钝化膜可以包括氯。 钝化膜可以防止来自稍后升华的化学物质对硅表面的污染，其可能处于比先前的升华更高的温度。 随后，将含卤素预清洁材料和钝化膜的剩余部分升华。 可以随后将诸如导电材料的靶材料沉积在衬底表面上。

    Germanium oxide pre-clean module and process
    7.
    发明授权
    Germanium oxide pre-clean module and process 有权
    氧化锗预清洁模块和工艺

    公开(公告)号：US09474163B2

    公开(公告)日：2016-10-18

    申请号：US14586438

    申请日：2014-12-30

    Applicant: ASM IP HOLDING B.V.

    Inventor： John Tolle ,  Matthew G. Goodman

    IPC: B05D3/02 ,  B05D3/04 ,  H05K3/00 ,  H01L21/02 ,  H01L21/306 ,  B05D3/00

    CPC classification number: H01L21/0206 ,  B05D3/002 ,  B05D3/02 ,  B05D3/04 ,  B05D3/0433 ,  H01L21/02041 ,  H01L21/02046 ,  H01L21/306

    Abstract: In some embodiments, a method for integrated circuit fabrication includes removing oxide material from a surface of a substrate, where the surface includes silicon and germanium. Removing the oxide material includes depositing a halogen-containing pre-clean material on a silicon oxide-containing surface and sublimating a portion of the halogen-containing pre-clean material to expose the silicon on the surface. A passivation film is deposited on the exposed silicon. The passivation film may include chlorine. The passivation film may prevent contamination of the silicon surface by chemical species from the later sublimation, which may be at a higher temperature than the earlier sublimation. Subsequently, a remaining portion of the halogen-containing pre-clean material and the passivation film are sublimated. A target material, such as a conductive material, may subsequently be deposited on the substrate surface.

    Abstract translation: 在一些实施例中，用于集成电路制造的方法包括从衬底的表面去除氧化物材料，其中表面包括硅和锗。 除去氧化物材料包括将含卤素的预清洁材料沉积在含氧化硅的表面上并升华部分含卤素的预清洁材料以暴露表面上的硅。 钝化膜沉积在暴露的硅上。 钝化膜可以包括氯。 钝化膜可以防止来自稍后升华的化学物质对硅表面的污染，其可能处于比先前的升华更高的温度。 随后，将含卤素预清洁材料和钝化膜的剩余部分升华。 可以随后将诸如导电材料的靶材料沉积在衬底表面上。

    DOPED SEMICONDUCTOR FILMS AND PROCESSING
    8.
    发明申请
    DOPED SEMICONDUCTOR FILMS AND PROCESSING 有权

    公开(公告)号：US20150014816A1

    公开(公告)日：2015-01-15

    申请号：US14143719

    申请日：2013-12-30

    Applicant: ASM IP Holding B.V.

    Inventor： Keith Doran Weeks ,  John Tolle ,  Matthew G. Goodman ,  Sandeep Mehta

    IPC: H01L21/02 ,  H01L29/167 ,  H01L29/36 ,  H01L21/306

    CPC classification number: H01L29/36 ,  H01L21/02532 ,  H01L21/02576 ,  H01L21/0262 ,  H01L21/30604 ,  H01L21/3065 ,  H01L21/32135

    Abstract: A method of forming a semiconductor material incorporating an electrical dopant is disclosed. In one aspect, a method of incorporating dopant in a semiconductor film comprises forming a first semiconductor material incorporating the dopant at a first dopant concentration and preferentially etching a portion of the first semiconductor material, wherein etching leaves a first etched semiconductor material incorporating the dopant at a second dopant concentration higher than the first dopant concentration.

    Abstract translation: 公开了一种形成掺有电掺杂剂的半导体材料的方法。 在一个方面，一种在半导体膜中掺入掺杂剂的方法包括以第一掺杂剂浓度形成掺入掺杂剂的第一半导体材料，并优先蚀刻第一半导体材料的一部分，其中蚀刻留下掺入掺杂剂的第一蚀刻半导体材料 第二掺杂剂浓度高于第一掺杂剂浓度。

    Doped semiconductor films and processing
    10.
    发明授权
    Doped semiconductor films and processing 有权
    掺杂半导体薄膜和加工

    公开(公告)号：US09099423B2

    公开(公告)日：2015-08-04

    申请号：US14143719

    申请日：2013-12-30

    Applicant: ASM IP HOLDING B.V.

    Inventor： Keith Doran Weeks ,  John Tolle ,  Matthew G. Goodman ,  Sandeep Mehta

    IPC: H01L29/36 ,  H01L21/02 ,  H01L21/306

    CPC classification number: H01L29/36 ,  H01L21/02532 ,  H01L21/02576 ,  H01L21/0262 ,  H01L21/30604 ,  H01L21/3065 ,  H01L21/32135

    Abstract: A method of forming a semiconductor material incorporating an electrical dopant is disclosed. In one aspect, a method of incorporating dopant in a semiconductor film comprises forming a first semiconductor material incorporating the dopant at a first dopant concentration and preferentially etching a portion of the first semiconductor material, wherein etching leaves a first etched semiconductor material incorporating the dopant at a second dopant concentration higher than the first dopant concentration.

    Abstract translation: 公开了一种形成掺有电掺杂剂的半导体材料的方法。 在一个方面，一种在半导体膜中掺入掺杂剂的方法包括以第一掺杂剂浓度形成掺入掺杂剂的第一半导体材料，并优先蚀刻第一半导体材料的一部分，其中蚀刻留下掺入掺杂剂的第一蚀刻半导体材料 第二掺杂剂浓度高于第一掺杂剂浓度。

Patent Agency Ranking