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    Photoelectrochemical etching of P-type semiconductor heterostructures
    1.
    发明授权
    Photoelectrochemical etching of P-type semiconductor heterostructures 有权
    P型半导体异质结构的光电化学蚀刻

    公开(公告)号：US08053264B2

    公开(公告)日：2011-11-08

    申请号：US12464723

    申请日：2009-05-12

    申请人： Adele Tamboli ,  Evelyn Lynn Hu ,  Mathew C. Schmidt ,  Shuji Nakamura ,  Steven P. DenBaars

    发明人： Adele Tamboli ,  Evelyn Lynn Hu ,  Mathew C. Schmidt ,  Shuji Nakamura ,  Steven P. DenBaars

    IPC分类号： H01L21/3213

    CPC分类号： H01L21/30617 ,  H01L29/2003 ,  H01L33/0075

    摘要： A method for photoelectrochemical (PEC) etching of a p-type semiconductor layer simply and efficiently, by providing a driving force for holes to move towards a surface of a p-type cap layer to be etched, wherein the p-type cap layer is on a heterostructure and the heterostructure provides the driving force from an internal bias generated internally in the heterostructure; generating electron-hole pairs in a separate area of the heterostructure than the surface to be etched; and using an etchant solution to etch the surface of the p-type layer.

    摘要翻译： 通过提供用于孔朝向待蚀刻的p型盖层的表面移动的驱动力，简单有效地对p型半导体层进行光电化学（PEC）蚀刻的方法，其中p型覆盖层为 在异质结构上，异质结构从异质结构内部产生的内部偏压提供驱动力; 在异质结构的单独区域中产生电子 - 空穴对，而不是要蚀刻的表面; 并使用蚀刻剂溶液蚀刻p型层的表面。

    PHOTOELECTROCHEMICAL ROUGHENING OF P-SIDE-UP GaN-BASED LIGHT EMITTING DIODES
    2.
    发明申请
    PHOTOELECTROCHEMICAL ROUGHENING OF P-SIDE-UP GaN-BASED LIGHT EMITTING DIODES 审中-公开
    P型GaN基发光二极管的光电化学粗糙化

    公开(公告)号：US20090315055A1

    公开(公告)日：2009-12-24

    申请号：US12464711

    申请日：2009-05-12

    申请人： Adele Tamboli ,  Evelyn Lynn Hu ,  Steven P. DenBaars ,  Shuji Nakamura

    发明人： Adele Tamboli ,  Evelyn Lynn Hu ,  Steven P. DenBaars ,  Shuji Nakamura

    IPC分类号： H01L33/00

    CPC分类号： H01L33/22 ,  H01L33/32

    摘要： A method for photoelectrochemical (PEC) etching of a p-type gallium nitride (GaN) layer of a heterostructure, comprising using an internal bias in a semiconductor structure to prevent electrons from reaching a surface of the p-type layer, and to promote holes reaching the surface of the p-type layer, wherein the semiconductor structure includes the p-type layer, an active layer for absorbing PEC illumination, and an n-type layer.

    摘要翻译： 一种用于对异质结构的p型氮化镓（GaN）层进行光电化学（PEC）蚀刻的方法，包括使用半导体结构中的内部偏压来防止电子到达p型层的表面，并且促进孔 到达p型层的表面，其中半导体结构包括p型层，用于吸收PEC照明的有源层和n型层。

    Photoelectrochemical etching for chip shaping of light emitting diodes
    8.
    发明授权
    Photoelectrochemical etching for chip shaping of light emitting diodes 有权
    光电化学蚀刻用于发光二极管的芯片整形

    公开(公告)号：US08569085B2

    公开(公告)日：2013-10-29

    申请号：US12576946

    申请日：2009-10-09

    申请人： Adele Tamboli ,  Evelyn L. Hu ,  James S. Speck

    发明人： Adele Tamboli ,  Evelyn L. Hu ,  James S. Speck

    IPC分类号： H01L21/00 ,  H01L31/00

    CPC分类号： H01L33/20 ,  H01L33/0062 ,  H01L33/0079

    摘要： A photoelectrochemical (PEC) etch is performed for chip shaping of a device comprised of a III-V semiconductor material, in order to extract light emitted into guided modes trapped in the III-V semiconductor material. The chip shaping involves varying an angle of incident light during the PEC etch to control an angle of the resulting sidewalls of the III-V semiconductor material. The sidewalls may be sloped as well as vertical, in order to scatter the guided modes out of the III-V semiconductor material rather than reflecting the guided modes back into the III-V semiconductor material. In addition to shaping the chip in order to extract light emitted into guided modes, the chip may be shaped to act as a lens, to focus its output light, or to direct its output light in a particular way.

    摘要翻译： 对由III-V族半导体材料构成的器件进行芯片成形，进行光电化学（PEC）蚀刻，以提取被发射到捕获在III-V半导体材料中的引导模式的光。 芯片成形涉及在PEC蚀刻期间改变入射光的角度以控制III-V半导体材料的所得侧壁的角度。 侧壁可以倾斜并且垂直，以便将导模散射出III-V族半导体材料，而不是将引导模式反射回III-V族半导体材料。 除了对芯片进行成形以便将发射的光引导到引导模式之外，芯片可以被成形为用作透镜，聚焦其输出光或以特定方式引导其输出光。

    PHOTOELECTROCHEMICAL ETCHING FOR CHIP SHAPING OF LIGHT EMITTING DIODES
    9.
    发明申请
    PHOTOELECTROCHEMICAL ETCHING FOR CHIP SHAPING OF LIGHT EMITTING DIODES 有权
    光电化学蚀刻用于发光二极管的芯片形状

    公开(公告)号：US20100090240A1

    公开(公告)日：2010-04-15

    申请号：US12576946

    申请日：2009-10-09

    申请人： Adele Tamboli ,  Evelyn L. Hu ,  James S. Speck

    发明人： Adele Tamboli ,  Evelyn L. Hu ,  James S. Speck

    IPC分类号： H01L33/00 ,  H01L21/78 ,  H01L21/306

    CPC分类号： H01L33/20 ,  H01L33/0062 ,  H01L33/0079

    摘要： A photoelectrochemical (PEC) etch is performed for chip shaping of a device comprised of a III-V semiconductor material, in order to extract light emitted into guided modes trapped in the III-V semiconductor material. The chip shaping involves varying an angle of incident light during the PEC etch to control an angle of the resulting sidewalls of the III-V semiconductor material. The sidewalls may be sloped as well as vertical, in order to scatter the guided modes out of the III-V semiconductor material rather than reflecting the guided modes back into the III-V semiconductor material. In addition to shaping the chip in order to extract light emitted into guided modes, the chip may be shaped to act as a lens, to focus its output light, or to direct its output light in a particular way.

    摘要翻译： 对由III-V族半导体材料构成的器件进行芯片成形，进行光电化学（PEC）蚀刻，以提取被发射到捕获在III-V半导体材料中的引导模式的光。 芯片成形涉及在PEC蚀刻期间改变入射光的角度以控制III-V半导体材料的所得侧壁的角度。 侧壁可以倾斜并且垂直，以便将导模散射出III-V族半导体材料，而不是将引导模式反射回III-V族半导体材料。 除了对芯片进行成形以便将发射的光引导到引导模式之外，芯片可以被成形为用作透镜，聚焦其输出光或以特定方式引导其输出光。