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公开(公告)号：US20170031719A1
公开(公告)日：2017-02-02
申请号：US15097859
申请日：2016-04-13
Applicant: Advanced Micro Devices, Inc.
Inventor： Michael T. Clark , Jay Fleischman , Thaddeus S. Fortenberry , Maurice B. Steinman
CPC classification number: G06F9/5016 , G06F9/45558 , G06F9/5077 , G06F12/0811 , G06F12/084 , G06F12/0842 , G06F12/0875 , G06F12/121 , G06F2009/4557 , G06F2009/45579 , G06F2009/45583 , G06F2009/45591 , G06F2209/501 , G06F2209/508 , G06F2212/1041 , G06F2212/152 , G06F2212/283
Abstract: Systems, apparatuses, and methods for tracking system resource utilization of guest virtual machines (VMs). Counters may be maintained to track resource utilization of different system resources by different guest VMs executing on the system. When a guest VM initiates execution, stored values may be loaded into the resource utilization counters. While the guest VM executes, the counters may track the resource utilization of the guest VM. When the guest VM terminates execution, the counter values may be written to a virtual machine control block (VMCB) corresponding to the guest VM. Scaling factors may be applied to the counter values to normalize the values prior to writing the values to the VMCB. A cloud computing environment may utilize the tracking mechanisms to guarantee resource utilization levels in accordance with users' service level agreements.
Abstract translation: 用于跟踪来宾虚拟机（VM）的系统资源利用的系统，设备和方法。 可以维护计数器以跟踪在系统上执行的不同来宾VM的不同系统资源的资源利用。 当guest虚拟机启动执行时，存储的值可能被加载到资源利用率计数器中。 客机虚拟机执行时，计数器可以跟踪来宾虚拟机的资源利用率。 当客人VM终止执行时，可以将计数器值写入到与虚拟机对应的虚拟机控制块（VMCB）。 缩放因子可以应用于计数器值，以便在将值写入VMCB之前规范化值。 云计算环境可以利用跟踪机制来根据用户的服务水平协议来保证资源利用水平。
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公开(公告)号：US20190303230A1
公开(公告)日：2019-10-03
申请号：US15940693
申请日：2018-03-29
Applicant: Advanced Micro Devices, Inc.
Inventor： Dean A. Liberty , Vilas K. Sridharan , Michael T. Clark , Jelena Ilic , David S. Christie , James R. Williamson , Cristian Constantinescu
Abstract: Systems, apparatuses, and methods for implementing a hardware enforcement mechanism to enable platform-specific firmware visibility into an error state ahead of the operating system are disclosed. A system includes at least one or more processor cores, control logic, a plurality of registers, platform-specific firmware, and an operating system (OS). The control logic allows the platform-specific firmware to decide if and when the error state is visible to the OS. In some cases, the platform-specific firmware blocks the OS from accessing the error state. In other cases, the platform-specific firmware allows the OS to access the error state such as when the OS needs to unmap a page. The control logic enables the platform-specific firmware, rather than the OS, to make decisions about the replacement of faulty components in the system.
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公开(公告)号：US10223162B2
公开(公告)日：2019-03-05
申请号：US15097859
申请日：2016-04-13
Applicant: Advanced Micro Devices, Inc.
Inventor： Michael T. Clark , Jay Fleischman , Thaddeus S. Fortenberry , Maurice B. Steinman
IPC: G06F12/12 , G06F9/50 , G06F12/0875 , G06F12/0811 , G06F9/455
Abstract: Systems, apparatuses, and methods for tracking system resource utilization of guest virtual machines (VMs). Counters may be maintained to track resource utilization of different system resources by different guest VMs executing on the system. When a guest VM initiates execution, stored values may be loaded into the resource utilization counters. While the guest VM executes, the counters may track the resource utilization of the guest VM. When the guest VM terminates execution, the counter values may be written to a virtual machine control block (VMCB) corresponding to the guest VM. Scaling factors may be applied to the counter values to normalize the values prior to writing the values to the VMCB. A cloud computing environment may utilize the tracking mechanisms to guarantee resource utilization levels in accordance with users' service level agreements.
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公开(公告)号：US20180181496A1
公开(公告)日：2018-06-28
申请号：US15389955
申请日：2016-12-23
Applicant: Advanced Micro Devices, Inc.
Inventor： John M. King , Michael T. Clark
IPC: G06F12/1027 , G06F12/122
CPC classification number: G06F12/1027 , G06F12/123 , G06F12/127 , G06F2212/1044 , G06F2212/303 , G06F2212/601 , G06F2212/652 , G06F2212/683 , G06F2212/684
Abstract: Methods, devices, and systems for determining an address in a physical memory which corresponds to a virtual address using a skewed-associative translation lookaside buffer (TLB) are described. A virtual address and a configuration indication are received using receiver circuitry. A physical address corresponding to the virtual address is output if a TLB hit occurs. A first subset of a plurality of ways of the TLB is configured to hold a first page size. The first subset includes a number of the ways based on the configuration indication. A physical address corresponding to the virtual address is retrieved from a page table if a TLB miss occurs, and at least a portion of the physical address is installed in a least recently used way of a subset of a plurality of ways the TLB, determined according to a replacement policy based on the configuration indication.
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Patent Agency Ranking
公开(公告)号：US11868777B2
公开(公告)日：2024-01-09
申请号：US17123270
申请日：2020-12-16
Applicant: ADVANCED MICRO DEVICES, INC.
Inventor： John Kalamatianos , Michael T. Clark , Marius Evers , William L. Walker , Paul Moyer , Jay Fleischman , Jagadish B. Kotra
CPC classification number: G06F9/30181 , G06F9/30043 , G06F9/30098 , G06F9/30138 , G06F9/3834 , G06F9/3877 , G06F9/52
Abstract: Processor-guided execution of offloaded instructions using fixed function operations is disclosed. Instructions designated for remote execution by a target device are received by a processor. Each instruction includes, as an operand, a target register in the target device. The target register may be an architected virtual register. For each of the plurality of instructions, the processor transmits an offload request in the order that the instructions are received. The offload request includes the instruction designated for remote execution. The target device may be, for example, a processing-in-memory device or an accelerator coupled to a memory.
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公开(公告)号：US11061753B2
公开(公告)日：2021-07-13
申请号：US15940693
申请日：2018-03-29
Applicant: Advanced Micro Devices, Inc.
Inventor： Dean A. Liberty , Vilas K. Sridharan , Michael T. Clark , Jelena Ilic , David S. Christie , James R. Williamson , Cristian Constantinescu
Abstract: Systems, apparatuses, and methods for implementing a hardware enforcement mechanism to enable platform-specific firmware visibility into an error state ahead of the operating system are disclosed. A system includes at least one or more processor cores, control logic, a plurality of registers, platform-specific firmware, and an operating system (OS). The control logic allows the platform-specific firmware to decide if and when the error state is visible to the OS. In some cases, the platform-specific firmware blocks the OS from accessing the error state. In other cases, the platform-specific firmware allows the OS to access the error state such as when the OS needs to unmap a page. The control logic enables the platform-specific firmware, rather than the OS, to make decisions about the replacement of faulty components in the system.
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公开(公告)号：US12153926B2
公开(公告)日：2024-11-26
申请号：US18393657
申请日：2023-12-21
Applicant: ADVANCED MICRO DEVICES, INC.
Inventor： John Kalamatianos , Michael T. Clark , Marius Evers , William L. Walker , Paul Moyer , Jay Fleischman , Jagadish B. Kotra
Abstract: Processor-guided execution of offloaded instructions using fixed function operations is disclosed. Instructions designated for remote execution by a target device are received by a processor. Each instruction includes, as an operand, a target register in the target device. The target register may be an architected virtual register. For each of the plurality of instructions, the processor transmits an offload request in the order that the instructions are received. The offload request includes the instruction designated for remote execution. The target device may be, for example, a processing-in-memory device or an accelerator coupled to a memory.
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公开(公告)号：US20220091653A1
公开(公告)日：2022-03-24
申请号：US17030324
申请日：2020-09-23
Applicant: Advanced Micro Devices, Inc.
Inventor： Mahesh Subramony , David Suggs , Michael T. Clark , Matthew M. Crum
IPC: G06F1/3206 , G06F1/28 , G06F1/3287
Abstract: A method of operating a processing unit includes, in response to detecting that the processing unit is operating in a voltage limited state, calculating a set of headroom values by calculating a headroom value for each operational constraint in a set of operational constraints of the processing unit, based on the calculated set of headroom values, selecting from a set of performance features a subset of one or more performance features for enabling in the processing unit, and enabling the selected subset of performance features in the processing unit.
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公开(公告)号：US11106596B2
公开(公告)日：2021-08-31
申请号：US15389955
申请日：2016-12-23
Applicant: Advanced Micro Devices, Inc.
Inventor： John M. King , Michael T. Clark
IPC: G06F12/1027 , G06F12/123 , G06F12/127
Abstract: Methods, devices, and systems for determining an address in a physical memory which corresponds to a virtual address using a skewed-associative translation lookaside buffer (TLB) are described. A virtual address and a configuration indication are received using receiver circuitry. A physical address corresponding to the virtual address is output if a TLB hit occurs. A first subset of a plurality of ways of the TLB is configured to hold a first page size. The first subset includes a number of the ways based on the configuration indication. A physical address corresponding to the virtual address is retrieved from a page table if a TLB miss occurs, and at least a portion of the physical address is installed in a least recently used way of a subset of a plurality of ways the TLB, determined according to a replacement policy based on the configuration indication.
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