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公开(公告)号：US20100308296A1
公开(公告)日：2010-12-09
申请号：US12481496
申请日：2009-06-09
CPC分类号： H01L45/06 , H01L27/2445 , H01L27/2463 , H01L45/1233 , H01L45/126 , H01L45/144 , H01L45/1675
摘要： A self-aligned vertical heater element is deposited directly on the silicide of a selection device, and a phase change chalcogenide material is deposited directly on the vertical heater element. The fabrication process allows for self-alignment between the chalcogenide line and vertical heater element. In an embodiment, the vertical heater element is L-shaped, having a vertical wall along the wordline direction and a horizontal base. The vertical wall and the horizontal base may have the same thickness.
摘要翻译： 自对准垂直加热元件直接沉积在选择装置的硅化物上，相变硫族化物材料直接沉积在垂直加热元件上。 制造工艺允许硫族化物管线和垂直加热器元件之间的自对准。 在一个实施例中，垂直加热器元件是L形的，具有沿字线方向的垂直壁和水平底座。 垂直壁和水平底座可以具有相同的厚度。
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2.发明申请公开(公告)号：US20110039391A1
公开(公告)日：2011-02-17
申请号：US12912829
申请日：2010-10-27
IPC分类号： H01L21/331
摘要： A bipolar junction transistor may act as a select device for a semiconductor memory. The bipolar junction transistor may be formed of a stack of base and collector layers. Sets of parallel trenches are formed in a first direction down to the base and in a second direction down to the collector. The trenches may be used to form local enhancement implants into the exposed portion of the base and collector in each trench. As a result of the local enhancement implants, in some embodiments, leakage current may be reduced, active current capability may be higher, gain may be higher, base resistance may be reduced, breakdown voltage may be increased, and parasitic effects with adjacent junctions may be reduced.
摘要翻译： 双极结型晶体管可以用作半导体存储器的选择器件。 双极结晶体管可以由基极和集电极层的堆叠形成。 一组平行的沟槽沿着第一方向下降到底部并且沿着第二方向形成在收集器的下方。 沟槽可以用于在每个沟槽中的基底和收集器的暴露部分中形成局部增强植入物。 作为局部增强植入物的结果，在一些实施例中，泄漏电流可能降低，有效电流能力可能更高，增益可能更高，基极电阻可能降低，击穿电压可能增加，并且具有相邻接点的寄生效应 减少
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3.发明授权公开(公告)号：US08076211B2
公开(公告)日：2011-12-13
申请号：US12912829
申请日：2010-10-27
IPC分类号： H01L21/8222 , H01L21/331
摘要： A bipolar junction transistor may act as a select device for a semiconductor memory. The bipolar junction transistor may be formed of a stack of base and collector layers. Sets of parallel trenches are formed in a first direction down to the base and in a second direction down to the collector. The trenches may be used to form local enhancement implants into the exposed portion of the base and collector in each trench. As a result of the local enhancement implants, in some embodiments, leakage current may be reduced, active current capability may be higher, gain may be higher, base resistance may be reduced, breakdown voltage may be increased, and parasitic effects with adjacent junctions may be reduced.
摘要翻译： 双极结型晶体管可以用作半导体存储器的选择器件。 双极结晶体管可以由基极和集电极层的堆叠形成。 一组平行的沟槽沿着第一方向下降到底部并且沿着第二方向形成在收集器的下方。 沟槽可以用于在每个沟槽中的基底和收集器的暴露部分中形成局部增强植入物。 作为局部增强植入物的结果，在一些实施例中，泄漏电流可能降低，有效电流能力可能更高，增益可能更高，基极电阻可能降低，击穿电压可能增加，并且具有相邻接点的寄生效应 减少
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4.发明授权公开(公告)号：US07847373B2
公开(公告)日：2010-12-07
申请号：US12341027
申请日：2008-12-22
IPC分类号： H01L27/082 , H01L27/102 , H01L29/70
摘要： A bipolar junction transistor may act as a select device for a semiconductor memory. The bipolar junction transistor may be formed of a stack of base and collector layers. Sets of parallel trenches are formed in a first direction down to the base and in a second direction down to the collector. The trenches may be used to form local enhancement implants into the exposed portion of the base and collector in each trench. As a result of the local enhancement implants, in some embodiments, leakage current may be reduced, active current capability may be higher, gain may be higher, base resistance may be reduced, breakdown voltage may be increased, and parasitic effects with adjacent junctions may be reduced.
摘要翻译： 双极结型晶体管可以用作半导体存储器的选择器件。 双极结晶体管可以由基极和集电极层的堆叠形成。 一组平行的沟槽沿着第一方向下降到底部并且沿着第二方向形成在收集器的下方。 沟槽可以用于在每个沟槽中的基底和收集器的暴露部分中形成局部增强植入物。 作为局部增强植入物的结果，在一些实施例中，泄漏电流可能降低，有效电流能力可能更高，增益可能更高，基极电阻可能降低，击穿电压可能增加，并且具有相邻接点的寄生效应 减少
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公开(公告)号：US08243497B1
公开(公告)日：2012-08-14
申请号：US12628153
申请日：2009-11-30
申请人： Fabio Pellizzer , Agostino Pirovano , Augusto Benvenuti , Daniele Vimercati , Andrea Redaelli , Gerald Barkley
发明人： Fabio Pellizzer , Agostino Pirovano , Augusto Benvenuti , Daniele Vimercati , Andrea Redaelli , Gerald Barkley
IPC分类号： G11C11/00
CPC分类号： G11C8/14 , G11C13/0004 , G11C13/0023 , G11C13/0026 , G11C13/0033 , G11C13/0038 , G11C13/0069 , G11C2013/0071 , G11C2013/008 , G11C2213/79
摘要： A Phase Change Memory device with reduced programming disturbance and its operation are described. The Phase Change Memory includes an array with word lines and bit lines and voltage controlling elements coupled to bit lines adjacent to an addressed bit line to maintain the voltage of the adjacent bit lines within an allowed range.
摘要翻译： 描述了具有减少的编程干扰及其操作的相变存储器件。 相变存储器包括具有字线和位线的阵列，以及耦合到与寻址位线相邻的位线的电压控制元件，以将相邻位线的电压维持在允许的范围内。
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公开(公告)号：US08908414B2
公开(公告)日：2014-12-09
申请号：US13512006
申请日：2009-12-18
CPC分类号： G11C13/0069 , G11C13/0004 , G11C13/0064 , G11C13/0097 , G11C2013/009 , G11C2013/0092
摘要： Subject matter disclosed herein relates to techniques involving a structural relaxation (SR) phenomenon for increasing resistance of a Reset state of phase change memory.
摘要翻译： 本文公开的主题涉及涉及用于增加相变存储器的复位状态的电阻的结构松弛（SR）现象的技术。
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公开(公告)号：US08358532B2
公开(公告)日：2013-01-22
申请号：US12621933
申请日：2009-11-19
CPC分类号： G11C8/08 , G11C13/0004 , G11C13/0028 , G11C13/003 , G11C16/08 , G11C2213/79 , Y10T29/49002
摘要： Embodiments include but are not limited to apparatuses and systems including a plurality of memory cells, each memory cell including a selector and a storage element coupled to the selector. A word-line may be coupled to the memory cells and may have a word-line driver including a pull-up resistor coupled to the selectors for the memory cells to access respective storage elements of the memory cells. Other embodiments may be described and claimed.
摘要翻译： 实施例包括但不限于包括多个存储单元的装置和系统，每个存储单元包括选择器和耦合到选择器的存储元件。 字线可以耦合到存储器单元，并且可以具有字线驱动器，其包括耦合到用于存储器单元的选择器的上拉电阻以访问存储器单元的相应存储元件。 可以描述和要求保护其他实施例。
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公开(公告)号：US20100165724A1
公开(公告)日：2010-07-01
申请号：US12621933
申请日：2009-11-19
CPC分类号： G11C8/08 , G11C13/0004 , G11C13/0028 , G11C13/003 , G11C16/08 , G11C2213/79 , Y10T29/49002
摘要： Embodiments include but are not limited to apparatuses and systems including a plurality of memory cells, each memory cell including a selector and a storage element coupled to the selector. A word-line may be coupled to the memory cells and may have a word-line driver including a pull-up resistor coupled to the selectors for the memory cells to access respective storage elements of the memory cells. Other embodiments may be described and claimed.
摘要翻译： 实施例包括但不限于包括多个存储单元的装置和系统，每个存储单元包括选择器和耦合到选择器的存储元件。 字线可以耦合到存储器单元，并且可以具有字线驱动器，其包括耦合到用于存储器单元的选择器的上拉电阻以访问存储器单元的相应存储元件。 可以描述和要求保护其他实施例。
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公开(公告)号：US20130107618A1
公开(公告)日：2013-05-02
申请号：US13512006
申请日：2009-12-18
IPC分类号： G11C13/00
CPC分类号： G11C13/0069 , G11C13/0004 , G11C13/0064 , G11C13/0097 , G11C2013/009 , G11C2013/0092
摘要： Subject matter disclosed herein relates to techniques involving a structural relaxation (SR) phenomenon for increasing resistance of a Reset state of phase change memory.
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10.发明申请公开(公告)号：US20100078619A1
公开(公告)日：2010-04-01
申请号：US12570256
申请日：2009-09-30
CPC分类号： H01L27/24
摘要： A resistive memory cell includes a structural layer, a pore in the structural layer, a selector, having a coupling terminal accommodated in the pore, and a storage element of a resistive memory material, arranged in the pore and electrically coupled to the coupling terminal of the selector. The storage element has a tubular portion, extending transversely to an electrical coupling interface of the coupling terminal.
摘要翻译： 电阻式存储单元包括结构层，结构层中的孔，具有容纳在孔中的耦合端的选择器和电阻式存储材料的存储元件，布置在孔中并电耦合到 选择器。 存储元件具有管状部分，横向于耦合端子的电耦合接口延伸。
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