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公开(公告)号：US06635947B2
公开(公告)日：2003-10-21
申请号：US09934979
申请日：2001-08-21
申请人： Alexander Benedix , Georg Braun , Helmut Fischer , Bernd Klehn , Sebastian Kuhne
发明人： Alexander Benedix , Georg Braun , Helmut Fischer , Bernd Klehn , Sebastian Kuhne
IPC分类号： H01L2900
摘要： A monolithically integrable inductor containing a layer sequence of conductive layers and insulating layers that are stacked mutually alternately above one another is described. The conductive layers are configured in such a way that they form a coil-type structure around a central region, in which giant magnetic resistance materials can be provided.
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公开(公告)号：US06665228B2
公开(公告)日：2003-12-16
申请号：US10166962
申请日：2002-06-11
IPC分类号： G11C800
CPC分类号： G11C11/4087 , G11C8/14
摘要： An integrated memory has a memory cell array, which is subdivided into a plurality of separate segments. A first and a second local word line in different segments together form a common global word line. The global word line is decoded via a row decoder. The first and second local word lines are connected to a column decoder in such a way that they can be decoded individually and segment by segment in a manner dependent on a column address. The memory thus allows fast and current-saving activation of a word line.
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公开(公告)号：US07127553B2
公开(公告)日：2006-10-24
申请号：US10717337
申请日：2003-11-19
申请人： Alexander Benedix , Georg Braun , Bernd Klehn
发明人： Alexander Benedix , Georg Braun , Bernd Klehn
IPC分类号： H01L27/108
CPC分类号： G06F11/3409
摘要： A configuration for executing data processing processes has an operating system and various system resources that are accessed by the operating system using an access strategy for the execution of system processes. When there are different applications, different access strategies to the system resources are used. A method is also provided for determining the optimum access strategy to the system resources.
摘要翻译： 用于执行数据处理过程的配置具有由操作系统使用用于执行系统进程的访问策略来访问的操作系统和各种系统资源。 当有不同的应用程序时，使用与系统资源不同的访问策略。 还提供了一种用于确定对系统资源的最佳访问策略的方法。
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公开(公告)号：US06820197B2
公开(公告)日：2004-11-16
申请号：US10000690
申请日：2001-11-15
申请人： Alexander Benedix , Georg Braun , Bernd Klehn
发明人： Alexander Benedix , Georg Braun , Bernd Klehn
IPC分类号： G06F15177
CPC分类号： G06F9/4411 , G06F15/177
摘要： The data processing system has configurable components, which each have a configuration register for storing configuration data. A serial bus couples the configuration registers to a non-volatile memory so that a serial transmission of data from the non-volatile memory to the configuration registers is made possible, for example when the system is booted up. The system already functions even if complex bus systems, such as extensively parallel high-speed buses, for example, are not yet available in a configuration process of the system. The system can be used in all data processing systems, in particular in mobile applications.
摘要翻译： 数据处理系统具有可配置的组件，每个组件具有用于存储配置数据的配置寄存器。 串行总线将配置寄存器耦合到非易失性存储器，使得可以例如当系统启动时将数据从非易失性存储器串行传输到配置寄存器。 即使在系统的配置过程中，诸如广泛并行的高速总线之类的复杂总线系统尚不可用，该系统也已经起作用。 该系统可用于所有数据处理系统，特别是在移动应用中。
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5.发明授权DDR to SDR conversion that decodes read and write accesses and forwards delayed commands to first and second memory modules 失效DDR到SDR转换，其解码读取和写入访问，并将延迟的命令转发到第一和第二存储器模块公开(公告)号：US06971039B2
公开(公告)日：2005-11-29
申请号：US10075539
申请日：2002-02-14
申请人： Gunnar Krause , Sebastian Kuhne , Bernd Klehn
发明人： Gunnar Krause , Sebastian Kuhne , Bernd Klehn
IPC分类号： G11C7/10 , G11C7/22 , G11C11/4093 , G06F5/00
CPC分类号： G11C7/1084 , G11C7/1012 , G11C7/1051 , G11C7/1066 , G11C7/1072 , G11C7/1078 , G11C7/22 , G11C11/4093
摘要： A memory module is described which, externally, has the functionality of DDR SDRAMs and contains two groups of conventional SDRAMs. A conversion device provides for the conversion of clock signals, commands, and data. The conversion device contains a changeover switch, a delay locked loop and buffer memory for addresses and commands and also for the data, which are driven in a suitable manner by the delay locked loop.
摘要翻译： 描述了一种存储器模块，其在外部具有DDR SDRAM的功能并且包含两组常规SDRAM。 转换装置提供时钟信号，命令和数据的转换。 转换装置包含用于地址和命令的转换开关，延迟锁定环路和缓冲存储器，并且还包括以适当方式由延迟锁定环路驱动的数据。
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公开(公告)号：US20060146593A1
公开(公告)日：2006-07-06
申请号：US11293880
申请日：2005-12-02
申请人： Bernd Klehn , Hermann Fischer , Eckhard Brass , Ralf Klein , Thomas Schumann
发明人： Bernd Klehn , Hermann Fischer , Eckhard Brass , Ralf Klein , Thomas Schumann
IPC分类号： G11C11/24
CPC分类号： G11C7/1069 , G11C7/065 , G11C11/4091 , G11C11/4096 , G11C2207/002 , G11C2207/005
摘要： A method for reading data from a dynamic memory circuit is provided, wherein at least one memory cell can be addressed via a word line and a bit line, wherein the memory cell is connected to a first reading amplifier via the bit line, and wherein a switching element, which in the off state isolates the first reading amplifier from the bit line, is provided. The method comprises: a) turning on the switching element to connect the first reading amplifier to the bit line, b) activating the word line to activate the memory cell for reading, c) activating the first reading amplifier to initiate assessment of the information on the bit line, d) turning off the switching element to isolate the first reading amplifier from the bit line, and e) transferring the information which has been read to a data bus.
摘要翻译： 提供了一种用于从动态存储器电路读取数据的方法，其中至少一个存储单元可以经由字线和位线寻址，其中存储单元经由位线连接到第一读取放大器，并且其中 提供了在关断状态下将第一读取放大器与位线隔离的开关元件。 该方法包括：a）打开开关元件以将第一读取放大器连接到位线，b）激活字线以激活用于读取的存储器单元，c）激活第一读取放大器以开始对信息进行评估 位线，d）关断开关元件以将第一读取放大器与位线隔离，以及e）将已经读取的信息传送到数据总线。
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公开(公告)号：US06700426B2
公开(公告)日：2004-03-02
申请号：US10302864
申请日：2002-11-25
申请人： Martin Brox , Bernd Klehn , Joachim Schnabel
发明人： Martin Brox , Bernd Klehn , Joachim Schnabel
IPC分类号： H03L500
摘要： Programmable voltage pump for producing an output voltage includes a trim input configured to set the output voltage, an output configured to emit the output voltage therefrom, and an activation/deactivation input configured to at least one of activate and deactivate the voltage pump. The activation/deactivation input includes a switch connected to the output, the switch configured to selectively connect a network to ground, the network being connected to the output.
摘要翻译： 用于产生输出电压的可编程电压泵包括配置为设置输出电压的调整输入，被配置为从其发射输出电压的输出以及被配置为激活和去激活电压泵中的至少一个的激活/去激活输入。 激活/去激活输入包括连接到输出的交换机，交换机被配置为选择性地将网络连接到地，网络连接到输出。
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公开(公告)号：US07307869B2
公开(公告)日：2007-12-11
申请号：US11293880
申请日：2005-12-02
申请人： Bernd Klehn , Hermann Fischer , Eckhard Brass , Ralf Klein , Thomas Schumann
发明人： Bernd Klehn , Hermann Fischer , Eckhard Brass , Ralf Klein , Thomas Schumann
IPC分类号： G11C11/24
CPC分类号： G11C7/1069 , G11C7/065 , G11C11/4091 , G11C11/4096 , G11C2207/002 , G11C2207/005
摘要： A method for reading data from a dynamic memory circuit is provided, wherein at least one memory cell can be addressed via a word line and a bit line, wherein the memory cell is connected to a first reading amplifier via the bit line, and wherein a switching element, which in the off state isolates the first reading amplifier from the bit line, is provided. The method comprises: a) turning on the switching element to connect the first reading amplifier to the bit line, b) activating the word line to activate the memory cell for reading, c) activating the first reading amplifier to initiate assessment of the information on the bit line, d) turning off the switching element to isolate the first reading amplifier from the bit line, and e) transferring the information which has been read to a data bus.
摘要翻译： 提供了一种用于从动态存储器电路读取数据的方法，其中至少一个存储单元可以经由字线和位线寻址，其中存储单元经由位线连接到第一读取放大器，并且其中 提供了在关断状态下将第一读取放大器与位线隔离的开关元件。 该方法包括：a）打开开关元件以将第一读取放大器连接到位线，b）激活字线以激活用于读取的存储器单元，c）激活第一读取放大器以开始对信息进行评估 位线，d）关断开关元件以将第一读取放大器与位线隔离，以及e）将已经读取的信息传送到数据总线。
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9.发明授权公开(公告)号：US06737895B2
公开(公告)日：2004-05-18
申请号：US10196566
申请日：2002-07-16
IPC分类号： H03K1722
CPC分类号： G11C7/109 , G11C7/1078
摘要： A method for driving a plurality of circuit units to be controlled includes applying a control signal to a control signal connection unit and an activation signal to an activation connection unit. A hold signal is the generated on the in response to the activation signal. This hold signal is combined with the control signal to obtain a modified control signal, which is then made available at an output.
摘要翻译： 用于驱动要控制的多个电路单元的方法包括将控制信号施加到控制信号连接单元和激活信号到激活连接单元。 保持信号是响应于激活信号产生的。 该保持信号与控制信号组合以获得经修改的控制信号，然后在输出端使其可用。
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公开(公告)号：US07113024B2
公开(公告)日：2006-09-26
申请号：US10202914
申请日：2002-07-24
申请人： Franz Freimuth , Bernd Klehn , Ulrich Menczigar
发明人： Franz Freimuth , Bernd Klehn , Ulrich Menczigar
CPC分类号： G05F1/465
摘要： The invention relates to a circuit module with high-frequency input/output interfaces, and in particular to a circuit realized on a chip, principally a monolithic integrated circuit having a phase-regulated circuit which is fed by externally applied voltages and an internal operating voltage generated on the basis of a trimmable internal reference voltage. According to the invention, each further internal operating voltage is derived from an individual reference voltage on the basis of an external voltage. An adjusting circuit is provided which adjusts the individual reference voltage using the trimmable internal reference voltage and then freezes it.
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