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    Semiconductor device
    1.
    发明授权
    Semiconductor device 有权
    半导体器件

    公开(公告)号：US09202937B2

    公开(公告)日：2015-12-01

    申请号：US13321960

    申请日：2010-05-14

    申请人： Alexander Dietrich Hölke ,  Deb Kumar Pal ,  Kia Yaw Kee ,  Hao Yang

    发明人： Alexander Dietrich Hölke ,  Deb Kumar Pal ,  Kia Yaw Kee ,  Hao Yang

    IPC分类号： H01L29/861 ,  H01L29/40

    CPC分类号： H01L29/868 ,  H01L29/405 ,  H01L29/407 ,  H01L29/8611

    摘要： A semiconductor device comprising: a p or p+ doped portion; an n or n+ doped portion separated from the p or p+ doped portion by a semiconductor drift portion; an insulating portion provided adjacent the drift portion and at least one of the doped portions in a region where the drift portion and said at least one doped portion meet; and at least one additional portion which is arranged for significantly reducing the variation of the electric field strength in said region when a voltage difference is applied between the doped portions.

    摘要翻译： 一种半导体器件，包括：p或p +掺杂部分; 通过半导体漂移部分从p或p +掺杂部分分离的n或n +掺杂部分; 在所述漂移部分和所述至少一个掺杂部分相遇的区域中邻近所述漂移部分设置的绝缘部分和所述掺杂部分中的至少一个; 以及至少一个附加部分，其被设置为当在掺杂部分之间施加电压差时，显着地减小所述区域中的电场强度的变化。

    SEMICONDUCTOR DEVICE
    3.
    发明申请
    SEMICONDUCTOR DEVICE 有权
    半导体器件

    公开(公告)号：US20120126377A1

    公开(公告)日：2012-05-24

    申请号：US13321960

    申请日：2010-05-14

    申请人： Alexander Dietrich Holke ,  Deb Kumar Pal ,  Kia Yaw Kee ,  Hao Yang

    发明人： Alexander Dietrich Holke ,  Deb Kumar Pal ,  Kia Yaw Kee ,  Hao Yang

    IPC分类号： H01L29/02

    CPC分类号： H01L29/868 ,  H01L29/405 ,  H01L29/407 ,  H01L29/8611

    摘要： A semiconductor device comprising: a p or p+ doped portion; an n or n+ doped portion separated from the p or p+ doped portion by a semiconductor drift portion; an insulating portion provided adjacent the drift portion and at least one of the doped portions in a region where the drift portion and said at least one doped portion meet; and at least one additional portion which is arranged for significantly reducing the variation of the electric field strength in said region when a voltage difference is applied between the doped portions.

    摘要翻译： 一种半导体器件，包括：p或p +掺杂部分; 通过半导体漂移部分从p或p +掺杂部分分离的n或n +掺杂部分; 在所述漂移部分和所述至少一个掺杂部分相遇的区域中邻近所述漂移部分设置的绝缘部分和所述掺杂部分中的至少一个; 以及至少一个附加部分，其被设置为当在掺杂部分之间施加电压差时，显着地减小所述区域中的电场强度的变化。

    SEMICONDUCTOR DEVICE
    6.
    发明申请
    SEMICONDUCTOR DEVICE 审中-公开
    半导体器件

    公开(公告)号：US20130320485A1

    公开(公告)日：2013-12-05

    申请号：US13483569

    申请日：2012-05-30

    申请人： Elizabeth Kho Ching Tee ,  Alexander Dietrich Hölke ,  Steven John Pilkington ,  Deb Kumar Pal

    发明人： Elizabeth Kho Ching Tee ,  Alexander Dietrich Hölke ,  Steven John Pilkington ,  Deb Kumar Pal

    IPC分类号： H01L29/06

    CPC分类号： H01L29/861 ,  H01L21/76283 ,  H01L27/1203 ,  H01L29/0634 ,  H01L29/0653 ,  H01L29/7317 ,  H01L29/7322 ,  H01L29/7394 ,  H01L29/7824 ,  H01L29/7833

    摘要： An SOI or PSOI device including a device structure having a plurality of doped semiconductor regions. One or more of the doped semiconductor regions is in electrical communication with one or more electrical terminals. The device further includes an insulator layer located between a bottom surface of the device structure and a handle wafer. The device has an insulator trench structure located between a side surface of the device structure and a lateral semiconductor region located laterally with respect to the device structure. The insulator layer and the insulator trench structure are configured to insulate the device structure from the handle wafer and the lateral semiconductor region, and the insulator trench structure includes a plurality of insulator trenches.

    摘要翻译： 包括具有多个掺杂半导体区域的器件结构的SOI或PSOI器件。 一个或多个掺杂半导体区域与一个或多个电端子电连通。 该器件还包括位于器件结构的底表面和处理晶片之间的绝缘体层。 该器件具有位于器件结构的侧表面和相对于器件结构横向定位的侧向半导体区域之间的绝缘体沟槽结构。 绝缘体层和绝缘体沟槽结构被配置为使器件结构与处理晶片和横向半导体区域绝缘​​，并且绝缘体沟槽结构包括多个绝缘体沟槽。

    HIGH VOLTAGE MOS TRANSISTOR
    7.
    发明申请
    HIGH VOLTAGE MOS TRANSISTOR 审中-公开
    高压MOS晶体管

    公开(公告)号：US20130093015A1

    公开(公告)日：2013-04-18

    申请号：US13581769

    申请日：2010-03-01

    申请人： Deb Kumar Pal ,  Elizabeth Ching Tee Kho ,  Alexander Dietrich Hölke

    发明人： Deb Kumar Pal ,  Elizabeth Ching Tee Kho ,  Alexander Dietrich Hölke

    IPC分类号： H01L29/78 ,  H01L29/66

    CPC分类号： H01L29/7816 ,  H01L21/26506 ,  H01L29/165 ,  H01L29/66659 ,  H01L29/66681 ,  H01L29/7835 ,  H01L29/7848

    摘要： A high voltage metal oxide semiconductor (HVMOS) transistor (1) comprises a drift region (8) comprising a material having a mobility which is higher than a mobility of Si. There is also provided a method of manufacturing said transistor, the method comprising forming a drift region comprising a material having a mobility which is higher than a mobility of Silicon. The material can be a Si—Ge strained material. The on- resistance is reduced compared to a transistor with a drift region made of Si, so that the trade-off between breakdown voltage and on-resistance is improved.

    摘要翻译： 高电压金属氧化物半导体（HVMOS）晶体管（1）包括漂移区（8），其包括迁移率高于Si迁移率的材料。 还提供了一种制造所述晶体管的方法，所述方法包括形成漂移区，其包括具有高于硅的迁移率的迁移率的材料。 该材料可以是Si-Ge应变材料。 与具有由Si制成的漂移区域的晶体管相比，导通电阻降低，从而提高了击穿电压和导通电阻之间的折衷。

    SEMICONDUCTOR DEVICE
    8.
    发明申请
    SEMICONDUCTOR DEVICE 有权
    半导体器件

    公开(公告)号：US20160056305A1

    公开(公告)日：2016-02-25

    申请号：US14932538

    申请日：2015-11-04

    申请人： Alexander Dietrich Holke ,  Deb Kumar Pal ,  Kia Yaw Kee ,  Yang Hao

    发明人： Alexander Dietrich Holke ,  Deb Kumar Pal ,  Kia Yaw Kee ,  Yang Hao

    IPC分类号： H01L29/868 ,  H01L29/40

    CPC分类号： H01L29/868 ,  H01L29/405 ,  H01L29/407 ,  H01L29/8611

    摘要： A semiconductor device including a p or p+ doped portion and an n or n+ doped portion separated from the p or p+ doped portion by a semiconductor drift portion. The device further includes an insulating portion provided adjacent the drift portion and at least one of the doped portions in a region where the drift portion and the at least one doped portion meet. The device further includes at least one additional portion, wherein the at least one additional portion is located such that, when the doped portions and the at least one additional portion are biased, the electrical potential lines leave the semiconductor drift portion homogeneously.

    摘要翻译： 一种包括p或p +掺杂部分和通过半导体漂移部分从p或p +掺杂部分分离的n或n +掺杂部分的半导体器件。 该装置还包括邻近漂移部分设置的绝缘部分和漂移部分和至少一个掺杂部分相交的区域中的至少一个掺杂部分。 器件还包括至少一个附加部分，其中至少一个附加部分被定位成使得当掺杂部分和至少一个附加部分被偏置时，电势线均匀地离开半导体漂移部分。

    TRANSISTOR
    10.
    发明申请
    TRANSISTOR 有权
    晶体管

    公开(公告)号：US20110198690A1

    公开(公告)日：2011-08-18

    申请号：US12867257

    申请日：2009-02-12

    申请人： Yong Hai Hu ,  Elizabeth Ching Tee Kho ,  Zheng Chao Liu ,  Deb Kumar Pal ,  Michael Mee Gouh Tiong ,  Jian Liu ,  Kia Yaw Kee ,  William Siang Lim Lau

    发明人： Yong Hai Hu ,  Elizabeth Ching Tee Kho ,  Zheng Chao Liu ,  Deb Kumar Pal ,  Michael Mee Gouh Tiong ,  Jian Liu ,  Kia Yaw Kee ,  William Siang Lim Lau

    IPC分类号： H01L29/78

    CPC分类号： H01L29/7834 ,  H01L29/0653 ,  H01L29/42368 ,  H01L29/7835

    摘要： A Metal Oxide Semiconductor (MOS) transistor comprising: a source; a gate; and a drain, the source, gate and drain being located in or on a well structure of a first doping polarity located in or on a substrate; wherein at least one of the source and the drain comprises a first structure comprising: a first region forming a first drift region, the first region being of a second doping polarity opposite the first doping polarity; a second region of the second doping polarity in or on the first region, the second region being a well region and having a doping concentration which is higher than the doping concentration of the first region; and a third region of the second doping polarity in or on the second region. Due to the presence of the second region the transistor may have a lower ON resistance when compared with a similar transistor which does not have the second region. The breakdown voltage may be influenced only to a small extent.

    摘要翻译： 一种金属氧化物半导体（MOS）晶体管，包括：源极; 一个门 以及漏极，源极，栅极和漏极位于位于衬底中或衬底上的第一掺杂极性的阱结构中或其上; 其中所述源极和漏极中的至少一个包括第一结构，所述第一结构包括：形成第一漂移区的第一区，所述第一区具有与所述第一掺杂极性相反的第二掺杂极性; 所述第二区域是所述第二区域中的第二掺杂极性的第二区域，所述第二区域是阱区域，并且具有高于所述第一区域的掺杂浓度的掺杂浓度; 以及在第二区域中或第二区域上的第二掺杂极性的第三区域。 由于存在第二区域，与不具有第二区域的类似晶体管相比，晶体管可能具有较低的导通电阻。 击穿电压可能仅在很小程度上受到影响。