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公开(公告)号：US20150303170A1
公开(公告)日：2015-10-22
申请号：US14255726
申请日：2014-04-17
发明人： Keun Soo Kim , Byoung Jun Ahn , Choon Heung Lee , Jin Young Kim , Dae Byoung Kang , Roger St. Amand
IPC分类号： H01L23/00 , H01L21/56 , H01L21/78 , H01L23/522 , H01L23/31
CPC分类号： H01L21/78 , H01L21/56 , H01L21/561 , H01L21/568 , H01L23/3128 , H01L23/3135 , H01L23/49816 , H01L23/49827 , H01L24/13 , H01L24/16 , H01L24/32 , H01L24/81 , H01L24/83 , H01L24/95 , H01L2224/131 , H01L2224/13147 , H01L2224/16227 , H01L2224/32225 , H01L2224/73204 , H01L2224/81005 , H01L2224/83005 , H01L2224/83104 , H01L2224/92125 , H01L2224/95 , H01L2224/95001 , H01L2924/15311 , H01L2224/81 , H01L2224/83 , H01L2924/00014 , H01L2924/014
摘要： A singulated substrate for a semiconductor device may include a singulated unit substrate comprising circuit patterns on a top surface and a bottom surface of the singulated unit substrate. A semiconductor die may be bonded to the top surface of the singulated unit substrate. An encapsulation layer may encapsulate the semiconductor die and cover the top surface of the singulated unit substrate. The side surfaces of the singulated unit substrate between the top surface and bottom surface of the singulated unit substrate may be coplanar with side surfaces of the encapsulation layer. The semiconductor die may be electrically coupled to the singulated unit substrate utilizing solder bumps. Solder balls may be formed on the circuit patterns on the bottom surface of the singulated unit substrate. An underfill material may be formed between the semiconductor die and the top surface of the singulated unit substrate.
摘要翻译： 用于半导体器件的单片化衬底可以包括单片化单元衬底，其包括在单个化单元衬底的顶表面和底表面上的电路图案。 半导体管芯可以结合到单个化单元衬底的顶表面。 封装层可以封装半导体管芯并覆盖单个化单元衬底的顶表面。 单片基板的上表面和底表面之间的单个单元基板的侧表面可以与封装层的侧表面共面。 半导体管芯可以使用焊料凸块电耦合到单个化的单元衬底。 焊球可以形成在单片化单元基板的底表面上的电路图案上。 可以在半导体管芯和单个化单元衬底的顶表面之间形成底部填充材料。
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公开(公告)号：US20180096928A1
公开(公告)日：2018-04-05
申请号：US15832027
申请日：2017-12-05
发明人： Keun Soo Kim , Jae Yun Kim , Byoung Jun Ahn , Dong Soo Ryu , Dae Byoung Kang , Chel Woo Park
IPC分类号： H01L23/498 , H01L23/42 , H01L23/31 , H01L23/433 , H01L25/10
CPC分类号： H01L23/49894 , H01L23/3121 , H01L23/42 , H01L23/433 , H01L23/49811 , H01L23/49816 , H01L23/49827 , H01L23/49833 , H01L23/5389 , H01L25/105 , H01L2224/16227 , H01L2224/32225 , H01L2224/48091 , H01L2224/48227 , H01L2224/73204 , H01L2224/73253 , H01L2224/73265 , H01L2224/92225 , H01L2225/1023 , H01L2225/1041 , H01L2225/1058 , H01L2225/107 , H01L2924/00014 , H01L2924/15311 , H01L2924/1533 , H01L2924/18161 , H01L2924/3511 , H01L2924/00012 , H01L2924/00
摘要： A semiconductor device structure, for example a 3D structure, and a method for fabricating a semiconductor device. As non-limiting examples, various aspects of this disclosure provide various semiconductor package structures, and methods for manufacturing thereof, that comprise interposer, interlayer, and/or heat dissipater configurations that provide for low cost, increased manufacturability, and high reliability.
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公开(公告)号：US20160225692A1
公开(公告)日：2016-08-04
申请号：US14694269
申请日：2015-04-23
发明人： Keun Soo Kim , Jae Yun Kim , Byoung Jun Ahn , Dong Soo Ryu , Dae Byoung Kang , Chel Woo Park
IPC分类号： H01L23/373 , H01L23/31 , H01L23/498
CPC分类号： H01L23/49894 , H01L23/3121 , H01L23/42 , H01L23/433 , H01L23/49811 , H01L23/49816 , H01L23/49827 , H01L23/49833 , H01L23/5389 , H01L25/105 , H01L2224/16227 , H01L2224/32225 , H01L2224/48091 , H01L2224/48227 , H01L2224/73204 , H01L2224/73253 , H01L2224/73265 , H01L2224/92225 , H01L2225/1023 , H01L2225/1041 , H01L2225/1058 , H01L2225/107 , H01L2924/00014 , H01L2924/15311 , H01L2924/1533 , H01L2924/18161 , H01L2924/3511 , H01L2924/00012 , H01L2924/00
摘要： A semiconductor device structure, for example a 3D structure, and a method for fabricating a semiconductor device. As non-limiting examples, various aspects of this disclosure provide various semiconductor package structures, and methods for manufacturing thereof, that comprise interposer, interlayer, and/or heat dissipater configurations that provide for low cost, increased manufacturability, and high reliability.
摘要翻译： 半导体器件结构，例如3D结构，以及半导体器件的制造方法。 作为非限制性示例，本公开的各个方面提供了各种半导体封装结构及其制造方法，其包括提供低成本，增加的可制造性和高可靠性的插入件，中间层和/或散热器配置。
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公开(公告)号：US20160211221A1
公开(公告)日：2016-07-21
申请号：US14995806
申请日：2016-01-14
发明人： Jin Young Kim , Keun Soo Kim , Byong Jin Kim , Jae Yoon Kim , Do Hyun Na , Hyun Il Moon , Dae Byong Kang
IPC分类号： H01L23/552 , H01L23/498 , H01L23/31
CPC分类号： H01L23/552 , H01L21/486 , H01L23/3121 , H01L23/49816 , H01L23/49861 , H01L23/5384 , H01L23/5389 , H01L24/97 , H01L2223/6677 , H01L2224/04105 , H01L2224/12105 , H01L2224/16227 , H01L2224/19 , H01L2224/32225 , H01L2224/32245 , H01L2224/73267 , H01L2224/92244 , H01L2224/97 , H01L2924/0002 , H01L2924/15311 , H01L2924/181 , H01L2924/19011 , H01L2924/3025 , H01L2924/00012 , H01L2224/83 , H01L2224/81 , H01L2224/83005
摘要： A selectively shielded and/or three-dimensional semiconductor device and a method of manufacturing thereof. For example and without limitation, various aspects of this disclosure provide a semiconductor device that comprises a composite plate for selective shielding and/or a three-dimensional embedded component configuration.
摘要翻译： 选择性屏蔽和/或三维半导体器件及其制造方法。 例如但不限于，本公开的各个方面提供了一种半导体器件，其包括用于选择性屏蔽的复合板和/或三维嵌入式部件配置。
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公开(公告)号：US10586761B2
公开(公告)日：2020-03-10
申请号：US15832027
申请日：2017-12-05
发明人： Keun Soo Kim , Jae Yun Kim , Byoung Jun Ahn , Dong Soo Ryu , Dae Byoung Kang , Chel Woo Park
IPC分类号： H01L23/498 , H01L23/31 , H01L25/10 , H01L23/42 , H01L23/433 , H01L23/538
摘要： A semiconductor device structure, for example a 3D structure, and a method for fabricating a semiconductor device. As non-limiting examples, various aspects of this disclosure provide various semiconductor package structures, and methods for manufacturing thereof, that comprise interposer, interlayer, and/or heat dissipater configurations that provide for low cost, increased manufacturability, and high reliability.
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公开(公告)号：US09859203B2
公开(公告)日：2018-01-02
申请号：US14694269
申请日：2015-04-23
发明人： Keun Soo Kim , Jae Yun Kim , Byoung Jun Ahn , Dong Soo Ryu , Dae Byoung Kang , Chel Woo Park
IPC分类号： H01L23/373 , H01L23/498 , H01L23/31 , H01L25/10 , H01L23/42 , H01L23/433 , H01L23/538
CPC分类号： H01L23/49894 , H01L23/3121 , H01L23/42 , H01L23/433 , H01L23/49811 , H01L23/49816 , H01L23/49827 , H01L23/49833 , H01L23/5389 , H01L25/105 , H01L2224/16227 , H01L2224/32225 , H01L2224/48091 , H01L2224/48227 , H01L2224/73204 , H01L2224/73253 , H01L2224/73265 , H01L2224/92225 , H01L2225/1023 , H01L2225/1041 , H01L2225/1058 , H01L2225/107 , H01L2924/00014 , H01L2924/15311 , H01L2924/1533 , H01L2924/18161 , H01L2924/3511 , H01L2924/00012 , H01L2924/00
摘要： A semiconductor device structure, for example a 3D structure, and a method for fabricating a semiconductor device. As non-limiting examples, various aspects of this disclosure provide various semiconductor package structures, and methods for manufacturing thereof, that comprise interposer, interlayer, and/or heat dissipater configurations that provide for low cost, increased manufacturability, and high reliability.
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公开(公告)号：US20200350241A1
公开(公告)日：2020-11-05
申请号：US16813368
申请日：2020-03-09
发明人： Keun Soo Kim , Jae Yun Kim , Byoung Jun Ahn , Dong Soo Ryu , Dae Byoung Kang , Chel Woo Park
IPC分类号： H01L23/498 , H01L23/31 , H01L25/10 , H01L23/42 , H01L23/433
摘要： A semiconductor device structure, for example a 3D structure, and a method for fabricating a semiconductor device. As non-limiting examples, various aspects of this disclosure provide various semiconductor package structures, and methods for manufacturing thereof, that comprise interposer, interlayer, and/or heat dissipater configurations that provide for low cost, increased manufacturability, and high reliability.
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