公开(公告)号：US08618274B2

公开(公告)日：2013-12-31

申请号：US13281224

申请日：2011-10-25

Applicant: Lawren Wu ,  Mercedesz Balazs ,  Hans Brightbill ,  Andy Chan ,  Yvonne Chen ,  Anan Chuntharapai ,  Mark Dennis ,  Terence Wong

Inventor： Lawren Wu ,  Mercedesz Balazs ,  Hans Brightbill ,  Andy Chan ,  Yvonne Chen ,  Anan Chuntharapai ,  Mark Dennis ,  Terence Wong

IPC: C07H21/04

CPC classification number: C07K16/4291 ,  A01K67/0278 ,  A01K2217/072 ,  A01K2227/105 ,  A01K2267/0387 ,  A61K2039/505 ,  C07K2317/21 ,  C07K2317/24 ,  C07K2317/41 ,  C07K2317/73

Abstract: The present application relates to apoptotic anti-IgE antibodies, nucleic acid encoding the same, therapeutic compositions thereof, and their use in the treatment of IgE-mediated disorders.

Abstract translation: 本申请涉及凋亡性抗IgE抗体，编码它的核酸，其治疗组合物及其在治疗IgE介导的病症中的用途。

公开(公告)号：US07197684B2

公开(公告)日：2007-03-27

申请号：US10839635

申请日：2004-05-05

Applicant: Wayne Fang ,  Andy Chan ,  Kuek-Hock Lee

Inventor： Wayne Fang ,  Andy Chan ,  Kuek-Hock Lee

IPC: G01R31/28

CPC classification number: G11C29/1201 ,  G01R31/3172 ,  G11C29/48

Abstract: An integrated circuit, among other embodiments, includes an output circuit to provide a differential signal on first and second contacts during a first mode of operation, such as in a read or write mode of operation, and a single-ended signal on the first contact during a second mode of operation, such as a test mode of operation. A first variable resistor, responsive to a first control signal, is coupled to a first voltage source and the first contact. A second variable resistor, responsive to a second control signal, is coupled to a second voltage source and the second contact. A first transistor has a first electrode coupled to the first contact, a second electrode coupled to the current source and a gate to receive a first input signal. A second transistor has a first electrode coupled to the second contact, a second electrode coupled to the current source and a gate to receive a second input signal.

Abstract translation: 除其他实施例之外，集成电路包括输出电路，以在第一操作模式（例如在读取或写入操作模式下）在第一和第二触点上提供差分信号，以及在第一触点上的单端信号 在第二操作模式下，例如测试操作模式。 响应于第一控制信号的第一可变电阻器耦合到第一电压源和第一触点。 响应于第二控制信号的第二可变电阻器耦合到第二电压源和第二触点。 第一晶体管具有耦合到第一触点的第一电极，耦合到电流源的第二电极和用于接收第一输入信号的栅极。 第二晶体管具有耦合到第二触点的第一电极，耦合到电流源的第二电极和用于接收第二输入信号的栅极。

公开(公告)号：US20060022724A1

公开(公告)日：2006-02-02

申请号：US11237276

申请日：2005-09-27

Applicant: Jared Zerbe ,  Michael Ching ,  Abhijit Abhyankar ,  Richard Barth ,  Andy Chan ,  Paul Davis ,  William Stonecypher

Inventor： Jared Zerbe ,  Michael Ching ,  Abhijit Abhyankar ,  Richard Barth ,  Andy Chan ,  Paul Davis ,  William Stonecypher

IPC: H03L7/00

CPC classification number: G06F1/12 ,  G06F13/423 ,  H03L7/085 ,  H04L7/0012 ,  H04L7/0045 ,  H04L7/0054 ,  H04L7/02 ,  H04L7/0337

Abstract: A method and circuit for achieving minimum latency data transfer between two mesochronous (same frequency, different phase) clock domains is disclosed. This circuit supports arbitrary phase relationships between two clock domains and is tolerant of temperature and voltage shifts after initialization while maintaining the same output data latency. In one embodiment, this circuit is used on a bus-system to re-time data from receive-domain, clocks to transmit-domain clocks. In such a system the phase relationships between these two clocks is set by the device bus location and thus is not precisely known. By supporting arbitrary phase resynchronization, this disclosure allows for theoretically infinite bus-length and thus no limitation on device count, as well as arbitrary placement of devices along the bus. This ultimately allows support of multiple latency-domains for very long buses.

公开(公告)号：US08518237B2

公开(公告)日：2013-08-27

申请号：US13119990

申请日：2009-09-14

Applicant: Andy Chan ,  Lawrence Milesky

Inventor： Andy Chan ,  Lawrence Milesky

IPC: G01N27/26 ,  G01N27/404

CPC classification number: G01N27/404

Abstract: The service life of amperometric electrochemical oxygen sensors is increased by operating the electrodes of such sensors at a polarization voltage suitable for measuring the oxygen content of samples only during calibration or when measuring such samples and thereafter modulating the polarization voltage to a lower voltage such that substantially no electrical current is produced by the electrodes.

Abstract translation: 电流型电化学氧传感器的使用寿命通过以适于仅在校准期间或在测量这些样品时测量样品的氧含量的极化电压操作这些传感器的电极而增加，此后将极化电压调制到较低电压，使得基本上 电极不产生电流。

公开(公告)号：US20080117679A1

公开(公告)日：2008-05-22

申请号：US11679108

申请日：2007-02-26

Applicant: Pramila Srinivasan ,  John Princen ,  Andy Chan ,  Paul Mielke ,  Rob Wheeler

Inventor： Pramila Srinivasan ,  John Princen ,  Andy Chan ,  Paul Mielke ,  Rob Wheeler

IPC: G11C16/22

CPC classification number: G06F21/79

Abstract: A technique for securing a flash memory block in a secure device system involves cryptographic techniques including the generation of a Message Authentication Code (MAC). The MAC may be generated each time a file is saved to one or more data blocks of a flash memory device and stored with the file's metadata and to each of the data blocks. A technique for reading and storing versioned files may be employed when applications utilize versioning.

Abstract translation: 用于将闪存块保护在安全设备系统中的技术涉及包括生成消息认证码（MAC）的密码技术。 每当将文件保存到闪存设备的一个或多个数据块并且与文件的元数据一起存储并存储到每个数据块时，可以生成MAC。 当应用程序利用版本控制时，可以采用读取和存储版本化文件的技术。

公开(公告)号：US20060227927A1

公开(公告)日：2006-10-12

申请号：US11448259

申请日：2006-06-06

Applicant: Kueck Lee ,  Andy Chan

Inventor： Kueck Lee ,  Andy Chan

IPC: G06M1/00

CPC classification number: H03K17/167 ,  H03K19/00384

Abstract: An integrated circuit device having an output driver circuit and a control circuit. The output driver circuit outputs a first signal having a signal level according to a control value. The control circuit is coupled to receive the first signal from the output driver and adjusts the control value by a first increment until a transition event is detected. After the transition event is detected, the control circuit adjusts the control value by a second increment, the second increment being smaller than the first increment.

Abstract translation: 一种具有输出驱动电路和控制电路的集成电路装置。 输出驱动电路根据控制值输出具有信号电平的第一信号。 控制电路被耦合以从输出驱动器接收第一信号，并且通过第一增量调整控制值，直到检测到转换事件。 在检测到转换事件之后，控制电路将控制值调整第二增量，第二增量小于第一增量。

公开(公告)号：US20050083104A1

公开(公告)日：2005-04-21

申请号：US10981808

申请日：2004-11-05

Applicant: Billy Garrett ,  John Dillon ,  Michael Ching ,  William Stonecynther ,  Andy Chan ,  Matthew Griffin ,  Nancy Dillon

Inventor： Billy Garrett ,  John Dillon ,  Michael Ching ,  William Stonecynther ,  Andy Chan ,  Matthew Griffin ,  Nancy Dillon

IPC: G06F13/40 ,  G11C7/10 ,  H03K19/003 ,  H03K19/0185 ,  H04L25/02 ,  H03B1/00

CPC classification number: H04L25/028 ,  G06F13/4077 ,  G11C7/1051 ,  G11C7/1057 ,  G11C7/106 ,  G11C29/02 ,  G11C29/021 ,  G11C29/028 ,  H03K19/00384 ,  H03K19/018585 ,  H04L25/0266 ,  H04L25/0272 ,  H04L25/0282 ,  H04L25/0298

Abstract: A method of operating a memory system that includes an integrated circuit memory device is provided. A value representing an output voltage setting of an output driver of the memory device is stored in a register. The output driver outputs the drive voltage. A signal derived from the drive voltage is compared to a reference signal to generate a signal that indicates an adjustment to the output voltage setting. The output voltage setting of the output driver is adjusted using a counter that holds a count value representing an update to the output voltage setting. The count value is updated in accordance with a signal that indicates the adjustment to the output voltage setting.

公开(公告)号：US06412079B1

公开(公告)日：2002-06-25

申请号：US09169838

申请日：1998-10-09

Applicant: Paul Edmonds ,  Yi Zhang ,  Chang Xu ,  Priyen Doshi ,  Stephen Co ,  Michael P. Tel ,  Andy Chan

Inventor： Paul Edmonds ,  Yi Zhang ,  Chang Xu ,  Priyen Doshi ,  Stephen Co ,  Michael P. Tel ,  Andy Chan

IPC: H02H305

CPC classification number: H04L12/2898 ,  G06F11/2007 ,  H04L12/2856 ,  H04L29/06 ,  H04L67/1002 ,  H04L67/1034 ,  H04L2029/06054

Abstract: A computer system includes a plurality of interdependent processors for operating a common set of applications. Each interdependent processor executes an independent operating system image without sharing file system state information. Each interdependent processor has a network access card with a first network connection and a second network connection. The computer system includes a first active backplane coupled to each first network connection of each processor; a second active backplane coupled to each second network connection of each processor, the second active backplane operating in lieu of the first active backplane in case of a fail-over; and one or more directors coupled to the first and second active backplanes, each of the one or more directors load-balancing requests directed at a plurality of servers.

Abstract translation: 计算机系统包括用于操作公共应用集合的多个相互依赖的处理器。 每个相互依赖的处理器执行独立的操作系统映像，而不共享文件系统状态信息。 每个相互依赖的处理器具有具有第一网络连接和第二网络连接的网络访问卡。 计算机系统包括耦合到每个处理器的每个第一网络连接的第一有源底板; 耦合到每个处理器的每个第二网络连接的第二有源背板，在故障转移的情况下第二主动背板代替第一有源背板操作; 以及耦合到所述第一和第二活动背板的一个或多个导向器，所述一个或多个导向器中的每一个导向到多个服务器的负载平衡请求。

公开(公告)号：US08586040B2

公开(公告)日：2013-11-19

申请号：US13281209

申请日：2011-10-25

Applicant: Lawren Wu ,  Mercedesz Balazs ,  Hans Brightbill ,  Andy Chan ,  Yvonne Chen ,  Anan Chuntharapai ,  Mark Dennis ,  Terence Wong

Inventor： Lawren Wu ,  Mercedesz Balazs ,  Hans Brightbill ,  Andy Chan ,  Yvonne Chen ,  Anan Chuntharapai ,  Mark Dennis ,  Terence Wong

IPC: A61K39/00

CPC classification number: C07K16/4291 ,  A01K67/0278 ,  A01K2217/072 ,  A01K2227/105 ,  A01K2267/0387 ,  A61K2039/505 ,  C07K2317/21 ,  C07K2317/24 ,  C07K2317/41 ,  C07K2317/73

Abstract: The present application relates to apoptotic anti-IgE antibodies, nucleic acid encoding the same, therapeutic compositions thereof, and their use in the treatment of IgE-mediated disorders.

Abstract translation: 本申请涉及凋亡性抗IgE抗体，编码它的核酸，其治疗组合物及其在治疗IgE介导的病症中的用途。

公开(公告)号：US08292689B2

公开(公告)日：2012-10-23

申请号：US11865620

申请日：2007-10-01

Applicant: Mark Hardin ,  Andy Chan ,  Eric Skifstrom ,  Jack Millerick

Inventor： Mark Hardin ,  Andy Chan ,  Eric Skifstrom ,  Jack Millerick

IPC: A63F3/52

CPC classification number: A63H3/52 ,  A63H33/26

Abstract: The present disclosure provides for electronic playsets and components thereof. An electronic playset of the present disclosure may include a see-through monitor having a transparent screen configured to display an animated image superimposed over one or more regions. The see-through monitor may be moveable by rotation or translation between one or more positions, the one or more positions being adjacent to the one or more regions. Some embodiments including a see-through monitor with a light source configured to illuminate the one or more regions. Another aspect of the present disclosure provides for a removable toy having an identifiable accessory that may be provided to an electronic playset. The playset may be configured to identify the toy and display an animated character based on the identity.

Abstract translation: 本公开提供电子乐曲及其组件。 本公开的电子乐曲集可以包括透视监视器，其具有被配置为显示叠加在一个或多个区域上的动画图像的透明屏幕。 透视监视器可以通过一个或多个位置之间的旋转或平移来移动，该一个或多个位置与一个或多个区域相邻。 一些实施例包括具有被配置为照亮一个或多个区域的光源的透视监视器。 本公开的另一方面提供了一种可移除的玩具，其具有可被提供给电子游戏装置的可识别的附件。 玩具可以被配置为识别玩具并基于身份显示动画角色。