公开(公告)号：US20080169534A1

公开(公告)日：2008-07-17

申请号：US11622204

申请日：2007-01-11

申请人： Anthony Dip ,  John Gumpher ,  Allen John Leith ,  Seungho Oh

发明人： Anthony Dip ,  John Gumpher ,  Allen John Leith ,  Seungho Oh

IPC分类号： H01L21/36 ,  H01L29/06

CPC分类号： H01L21/02532 ,  H01L21/02381 ,  H01L21/0245 ,  H01L21/0262 ,  H01L21/02639

摘要： A method is provided for reduced defect such as void free or reduced void Si or SiGe deposition in a micro-feature on a patterned substrate. The micro-feature includes a sidewall and the patterned substrate contains an isolation layer on the field area and on the sidewall and bottom of the micro-feature. The method includes forming a Si or SiGe seed layer at the bottom of the micro-feature, and at least partially filling the micro-feature from the bottom up by selectively growing Si or SiGe onto the Si or SiGe seed layer. According to one embodiment, the Si or SiGe seed layer is formed by depositing a conformal Si or SiGe layer onto the patterned substrate, removing the Si or SiGe layer from the field area, heat treating the Si or SiGe layer in the presence of H2 gas to transfer at least a portion of the Si or SiGe layer from the sidewall to the bottom of the micro-feature, and etching Si or SiGe residue from the field area and the sidewall.

摘要翻译： 提供了一种减少缺陷的方法，例如在图案化衬底上的微特征中的无空隙或减少的空隙Si或SiGe沉积。 微型特征包括侧壁，并且图案化衬底在场区域和微特征的侧壁和底部上包含隔离层。 该方法包括在微特征的底部形成Si或SiGe种子层，并且通过在Si或SiGe种子层上选择性地生长Si或SiGe，从底部至少部分地填充微特征。 根据一个实施例，Si或SiGe种子层通过将沉积的Si或SiGe层沉积在图案化的衬底上，从场区去除Si或SiGe层而形成，在H区存在下热处理Si或SiGe层， 从而将Si或SiGe层的至少一部分从侧壁传递到微特征的底部，并且从场区域和侧壁蚀刻Si或SiGe残留物。

公开(公告)号：US08263474B2

公开(公告)日：2012-09-11

申请号：US11622204

申请日：2007-01-11

申请人： Anthony Dip ,  John Gumpher ,  Allen John Leith ,  Seungho Oh

发明人： Anthony Dip ,  John Gumpher ,  Allen John Leith ,  Seungho Oh

IPC分类号： H01L21/76

CPC分类号： H01L21/02532 ,  H01L21/02381 ,  H01L21/0245 ,  H01L21/0262 ,  H01L21/02639

摘要： A method is provided for reduced defect such as void free or reduced void Si or SiGe deposition in a micro-feature on a patterned substrate. The micro-feature includes a sidewall and the patterned substrate contains an isolation layer on the field area and on the sidewall and bottom of the micro-feature. The method includes forming a Si or SiGe seed layer at the bottom of the micro-feature, and at least partially filling the micro-feature from the bottom up by selectively growing Si or SiGe onto the Si or SiGe seed layer. According to one embodiment, the Si or SiGe seed layer is formed by depositing a conformal Si or SiGe layer onto the patterned substrate, removing the Si or SiGe layer from the field area, heat treating the Si or SiGe layer in the presence of H2 gas to transfer at least a portion of the Si or SiGe layer from the sidewall to the bottom of the micro-feature, and etching Si or SiGe residue from the field area and the sidewall.

摘要翻译： 提供了一种减少缺陷的方法，例如在图案化衬底上的微特征中的无空隙或减少的空隙Si或SiGe沉积。 微型特征包括侧壁，并且图案化衬底在场区域和微特征的侧壁和底部上包含隔离层。 该方法包括在微特征的底部形成Si或SiGe种子层，并且通过在Si或SiGe种子层上选择性地生长Si或SiGe，从底部至少部分地填充微特征。 根据一个实施例，Si或SiGe种子层通过将沉积Si或SiGe层保护到图案化衬底上而形成，从场区去除Si或SiGe层，在H 2气体存在下热处理Si或SiGe层 以将Si或SiGe层的至少一部分从侧壁传递到微特征的底部，并且从场区域和侧壁蚀刻Si或SiGe残留物。

公开(公告)号：US08466045B2

公开(公告)日：2013-06-18

申请号：US12830210

申请日：2010-07-02

申请人： John Gumpher ,  Seungho Oh ,  Anthony Dip

发明人： John Gumpher ,  Seungho Oh ,  Anthony Dip

IPC分类号： H01L21/20

CPC分类号： H01L21/02661 ,  H01L21/02381 ,  H01L21/02447 ,  H01L21/02532 ,  H01L21/0262 ,  H01L21/02636 ,  H01L21/02664

摘要： A method for forming strained epitaxial carbon-doped silicon (Si) films, for example as raised source and drain regions for electronic devices. The method includes providing a structure having an epitaxial Si surface and a patterned film, non-selectively depositing a carbon-doped Si film onto the structure, the carbon-doped Si film containing an epitaxial carbon-doped Si film deposited onto the epitaxial Si surface and a non-epitaxial carbon-doped Si film deposited onto the patterned film, and non-selectively depositing a Si film on the carbon-doped Si film, the Si film containing an epitaxial Si film deposited onto the epitaxial carbon-doped Si film and a non-epitaxial Si film deposited onto the non-epitaxial carbon-doped Si film. The method further includes dry etching away the non-epitaxial Si film, the non-epitaxial carbon-doped Si film, and less than the entire epitaxial Si film to form a strained epitaxial carbon-doped Si film on the epitaxial Si surface.

摘要翻译： 用于形成应变外延碳掺杂硅（Si）膜的方法，例如用于电子器件的升高的源极和漏极区域。 该方法包括提供具有外延Si表面和图案化膜的结构，在结构上非选择性地沉积掺杂碳的Si膜，所述掺杂碳的Si膜含有沉积到外延Si表面上的外延碳掺杂的Si膜 以及沉积到图案化膜上的非外延碳掺杂Si膜，并且在掺碳的Si膜上非选择性地沉积Si膜，所述Si膜含有沉积到外延碳掺杂的Si膜上的外延Si膜，以及 沉积在非外延碳掺杂Si膜上的非外延Si膜。 该方法还包括干蚀刻去除非外延Si膜，非外延碳掺杂Si膜，并且小于整个外延Si膜以在外延Si表面上形成应变外延碳掺杂Si膜。

公开(公告)号：US20050221001A1

公开(公告)日：2005-10-06

申请号：US10814713

申请日：2004-03-31

申请人： Raymond Joe ,  John Gumpher ,  Anthony Dip

发明人： Raymond Joe ,  John Gumpher ,  Anthony Dip

IPC分类号： C23C16/34 ,  C23C16/44 ,  H01L21/318 ,  C23C16/00 ,  B32B9/00

CPC分类号： C23C16/4404 ,  H01L21/3185

摘要： A method for extending time between chamber cleaning processes in a process chamber of a processing system. A particle-reducing film is formed on a chamber component in the process chamber to reduce particle formation in the process chamber during substrate processing, at least one substrate is introduced into the process chamber, a manufacturing process is performed in the process chamber, and the at least one substrate is removed from the process chamber. The particle-reducing film may be deposited on a clean chamber component or on a material deposit formed on a chamber component. Alternatively, the particle-reducing film may be formed by chemically modifying at least a portion of a material deposit on a chamber component. The particle-reducing film may be formed after each manufacturing process or at selected intervals after multiple manufacturing processes.

摘要翻译： 一种用于在处理系统的处理室中延长室清洁过程之间的时间的方法。 在处理室中的腔室部件上形成颗粒减少膜，以减少衬底处理期间处理室中的颗粒形成，至少一个衬底被引入到处理室中，在处理室中执行制造工艺， 从处理室移除至少一个基板。 颗粒减少膜可以沉积在清洁室部件上或者形成在室部件上的材料沉积物上。 或者，可以通过化学改变室内部件上的材料沉积物的至少一部分来形成颗粒减少膜。 减少颗粒的膜可以在每个制造过程之后形成，或者在多个制造过程之后以选定的间隔形成。

公开(公告)号：US07604841B2

公开(公告)日：2009-10-20

申请号：US10814713

申请日：2004-03-31

申请人： Raymond Joe ,  John Gumpher ,  Anthony Dip

发明人： Raymond Joe ,  John Gumpher ,  Anthony Dip

IPC分类号： C23C16/30

CPC分类号： C23C16/4404 ,  H01L21/3185

摘要： A method for extending time between chamber cleaning processes in a process chamber of a processing system. A particle-reducing film is formed on a chamber component in the process chamber to reduce particle formation in the process chamber during substrate processing, at least one substrate is introduced into the process chamber, a manufacturing process is performed in the process chamber, and the at least one substrate is removed from the process chamber. The particle-reducing film may be deposited on a clean chamber component or on a material deposit formed on a chamber component. Alternatively, the particle-reducing film may be formed by chemically modifying at least a portion of a material deposit on a chamber component. The particle-reducing film may be formed after each manufacturing process or at selected intervals after multiple manufacturing processes.

摘要翻译： 一种用于在处理系统的处理室中延长室清洁过程之间的时间的方法。 在处理室中的腔室部件上形成颗粒减少膜，以减少衬底处理期间处理室中的颗粒形成，至少一个衬底被引入到处理室中，在处理室中执行制造工艺， 从处理室移除至少一个基板。 颗粒减少膜可以沉积在清洁室部件上或者形成在室部件上的材料沉积物上。 或者，可以通过化学改变室内部件上的材料沉积物的至少一部分来形成颗粒减少膜。 减少颗粒的膜可以在每个制造过程之后形成，或者在多个制造过程之后以选定的间隔形成。

公开(公告)号：US08187971B2

公开(公告)日：2012-05-29

申请号：US12873573

申请日：2010-09-01

申请人： Noel Russell ,  John J. Hautala ,  John Gumpher

发明人： Noel Russell ,  John J. Hautala ,  John Gumpher

IPC分类号： H01L21/20

CPC分类号： H01L21/28506 ,  C23C14/02 ,  C23C14/024 ,  C23C14/16 ,  C23C14/5833 ,  H01J37/08 ,  H01J37/317 ,  H01J2237/0812 ,  H01J2237/3165 ,  H01L21/02063 ,  H01L21/28518 ,  H01L21/3205

摘要： A method of manufacturing a semiconductor device is described. The method comprises performing a gas cluster ion beam (GCIB) pre-treatment and/or post-treatment of at least a portion of a silicon-containing substrate during formation of a silicide region.

摘要翻译： 对半导体装置的制造方法进行说明。 该方法包括在形成硅化物区域期间对含硅衬底的至少一部分进行气体簇离子束（GCIB）的预处理和/或后处理。

公开(公告)号：US20120252222A1

公开(公告)日：2012-10-04

申请号：US13073540

申请日：2011-03-28

申请人： John Gumpher

发明人： John Gumpher

IPC分类号： H01L21/26 ,  H01L21/3105

CPC分类号： H01L21/26566 ,  H01L21/26506 ,  H01L21/26513 ,  H01L21/2658

摘要： A method for amorphizing a layer on a substrate is described. In one embodiment, the method includes treating the substrate with a first gas cluster ion beam (GCIB) using a first beam energy selected to yield an amorphous sub-layer within the substrate of a desired thickness, which produces a first interfacial roughness of an amorphous-crystal interface between the amorphous sub-layer and a crystalline sub-layer of the substrate. The method further includes treating the substrate with a second GCIB using a second beam energy, less than the first beam energy, to reduce the first interfacial roughness of the amorphous-crystal interface to a second interfacial roughness.

摘要翻译： 描述了在基板上非晶化层的方法。 在一个实施方案中，该方法包括使用选择的第一束能量利用第一气体团簇离子束（GCIB）处理衬底，以产生所需厚度的衬底内的无定形子层，其产生无定形的第一界面粗糙度 非晶子层和基底的结晶子层之间的晶体界面。 该方法还包括使用小于第一光束能量的第二光束能量利用第二GCIB处理衬底，以将非晶 - 晶界面的第一界面粗糙度减小到第二界面粗糙度。

公开(公告)号：US20120238092A1

公开(公告)日：2012-09-20

申请号：US13482550

申请日：2012-05-29

申请人： Noel Russell ,  John J. Hautala ,  John Gumpher

发明人： Noel Russell ,  John J. Hautala ,  John Gumpher

IPC分类号： H01L21/283

CPC分类号： H01L21/28506 ,  C23C14/02 ,  C23C14/024 ,  C23C14/16 ,  C23C14/5833 ,  H01J37/08 ,  H01J37/317 ,  H01J2237/0812 ,  H01J2237/3165 ,  H01L21/02063 ,  H01L21/28518 ,  H01L21/3205

摘要： A method of manufacturing a semiconductor device is described. The method comprises performing a gas cluster ion beam (GCIB) pre-treatment and/or post-treatment of at least a portion of a silicon-containing substrate during formation of a silicide region.

摘要翻译： 对半导体装置的制造方法进行说明。 该方法包括在形成硅化物区域期间对含硅衬底的至少一部分进行气体簇离子束（GCIB）的预处理和/或后处理。

公开(公告)号：US07498270B2

公开(公告)日：2009-03-03

申请号：US11239318

申请日：2005-09-30

申请人： John Gumpher

发明人： John Gumpher

IPC分类号： H01L21/469

CPC分类号： H01L21/3144 ,  C23C16/308 ,  C23C16/36 ,  C23C16/56 ,  H01L21/0214 ,  H01L21/0217 ,  H01L21/02203 ,  H01L21/02219 ,  H01L21/02271 ,  H01L21/02332 ,  H01L21/02337 ,  H01L21/0234 ,  H01L21/3145 ,  H01L21/31695 ,  H01L29/78 ,  H01L29/7843

摘要： A method for forming a densified silicon oxynitride film with tensile stress and a semiconductor device including the densified silicon oxynitride film. The densified silicon oxynitride film can be formed by depositing a porous SiNC:H film on a substrate in a LPCVD process, and exposing the porous SiNC:H film to an oxygen-containing gas to incorporate oxygen into the SiNC:H film, thereby forming a densified SiONC:H film having a greater density than the porous SiNC:H film. The densified silicon oxynitride film can be included on a substrate including the semiconductor device.

摘要翻译： 用于形成具有拉伸应力的致密化氮氧化硅膜的方法和包括致密化的氮氧化硅膜的半导体器件。 致密化的氮氧化硅膜可以通过在LPCVD工艺中在衬底上沉积多孔SiNC：H膜并将多孔SiNC：H膜暴露于含氧气体以将氧掺入到SiNC：H膜中而形成，从而形成 具有比多孔SiNC：H膜更大密度的致密SiONC：H膜。 致密化的氮氧化硅膜可以包括在包括半导体器件的衬底上。

公开(公告)号：US20070077777A1

公开(公告)日：2007-04-05

申请号：US11239318

申请日：2005-09-30

申请人： John Gumpher

发明人： John Gumpher

IPC分类号： H01L21/31 ,  H01L21/469

CPC分类号： H01L21/3144 ,  C23C16/308 ,  C23C16/36 ,  C23C16/56 ,  H01L21/0214 ,  H01L21/0217 ,  H01L21/02203 ,  H01L21/02219 ,  H01L21/02271 ,  H01L21/02332 ,  H01L21/02337 ,  H01L21/0234 ,  H01L21/3145 ,  H01L21/31695 ,  H01L29/78 ,  H01L29/7843

摘要： A method for forming a densified silicon oxynitride film with tensile stress and a semiconductor device including the densified silicon oxynitride film. The densified silicon oxynitride film can be formed by depositing a porous SiNC:H film on a substrate in a LPCVD process, and exposing the porous SiNC:H film to an oxygen-containing gas to incorporate oxygen into the SiNC:H film, thereby forming a densified SiONC:H film having a greater density than the porous SiNC:H film. The densified silicon oxynitride film can be included on a substrate including the semiconductor device.

摘要翻译： 用于形成具有拉伸应力的致密化氮氧化硅膜的方法和包括致密化的氮氧化硅膜的半导体器件。 致密化的氮氧化硅膜可以通过在LPCVD工艺中在衬底上沉积多孔SiNC：H膜并将多孔SiNC：H膜暴露于含氧气体以将氧掺入到SiNC：H膜中而形成，从而形成 具有比多孔SiNC：H膜更大密度的致密SiONC：H膜。 致密化的氮氧化硅膜可以包括在包括半导体器件的衬底上。