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    Disabling unused IO resources in platform-based integrated circuits
    2.
    发明申请
    Disabling unused IO resources in platform-based integrated circuits 失效
    在基于平台的集成电路中禁用未使用的IO资源

    公开(公告)号：US20060022687A1

    公开(公告)日：2006-02-02

    申请号：US10909603

    申请日：2004-08-02

    申请人： Anwar Ali ,  Julie Beatty ,  Kalyan Doddapaneni

    发明人： Anwar Ali ,  Julie Beatty ,  Kalyan Doddapaneni

    IPC分类号： G01R31/02

    CPC分类号： G01R31/31712 ,  G01R31/31704

    摘要： The present invention is directed to methods for disabling unused IO resources in a platform-based integrated circuit. A slice is received from a vendor. The slice includes an IO circuit unused by a customer. The IO circuit is disabled. For example, when the IO circuit is desired to be tied to a power source, a primary input/output pin of the IO circuit is shorted to a power bus of the IO circuit. When the IO circuit is desired to be tied to a ground source, a primary input/output pin of the IO circuit is shorted to a ground bus of the IO circuit. When the IO circuit is desired to be left floated, a primary input/output pin of the IO circuit is not connected to any bonding pad cell of the slice. Next, the IO circuit is removed from the customer's logic design netlist. The IO circuit is inserted in the vendor's physical design database.

    摘要翻译： 本发明涉及用于在基于平台的集成电路中禁用未使用的IO资源的方法。 从供应商接收到一个切片。 该片包括客户未使用的IO电路。 IO电路被禁止。 例如，当IO电路需要连接到电源时，IO电路的主输入/输出引脚与IO电路的电源总线短路。 当IO电路需要连接到接地源时，IO电路的主输入/输出引脚短接到IO电路的接地总线。 当IO电路需要悬浮时，IO电路的主输入/输出引脚不连接到片的任何焊盘单元。 接下来，IO电路从客户的逻辑设计网表中删除。 IO电路插入供应商的物理设计数据库。

    Disabling unused IO resources in platform-based integrated circuits
    3.
    发明授权
    Disabling unused IO resources in platform-based integrated circuits 失效
    在基于平台的集成电路中禁用未使用的IO资源

    公开(公告)号：US08151237B2

    公开(公告)日：2012-04-03

    申请号：US12229446

    申请日：2008-08-22

    申请人： Anwar Ali ,  Julie Beatty ,  Kalyan Doddapaneni

    发明人： Anwar Ali ,  Julie Beatty ,  Kalyan Doddapaneni

    IPC分类号： G06F17/50 ,  G06F7/38 ,  H03K19/00 ,  H03K19/173 ,  H03K19/177 ,  H01L25/00

    CPC分类号： G01R31/31712 ,  G01R31/31704

    摘要： The present invention is directed to methods for disabling unused IO resources in a platform-based integrated circuit. A slice is received from a vendor. The slice includes an IO circuit unused by a customer. The IO circuit is disabled. For example, when the IO circuit is desired to be tied to a power source, a primary input/output pin of the IO circuit is shorted to a power bus of the IO circuit. When the IO circuit is desired to be tied to a ground source, a primary input/output pin of the IO circuit is shorted to a ground bus of the IO circuit. When the IO circuit is desired to be left floated, a primary input/output pin of the IO circuit is not connected to any bonding pad cell of the slice. Next, the IO circuit is removed from the customer's logic design netlist. The IO circuit is inserted in the vendor's physical design database.

    摘要翻译： 本发明涉及用于在基于平台的集成电路中禁用未使用的IO资源的方法。 从供应商接收到一个切片。 该片包括客户未使用的IO电路。 IO电路被禁止。 例如，当IO电路需要连接到电源时，IO电路的主输入/输出引脚与IO电路的电源总线短路。 当IO电路需要连接到接地源时，IO电路的主输入/输出引脚短接到IO电路的接地总线。 当IO电路需要悬浮时，IO电路的主输入/输出引脚不连接到片的任何焊盘单元。 接下来，IO电路从客户的逻辑设计网表中删除。 IO电路插入供应商的物理设计数据库。

    Pad current splitting
    4.
    发明授权
    Pad current splitting 有权
    垫电流分流

    公开(公告)号：US07554133B1

    公开(公告)日：2009-06-30

    申请号：US12119575

    申请日：2008-05-13

    申请人： Anwar Ali ,  Nenad Miladinovic ,  Kalyan Doddapaneni

    发明人： Anwar Ali ,  Nenad Miladinovic ,  Kalyan Doddapaneni

    IPC分类号： H01L27/10 ,  H01L29/73 ,  H01L23/52

    CPC分类号： H01L23/5286 ,  H01L24/05 ,  H01L24/06 ,  H01L2224/05554 ,  H01L2924/01014 ,  H01L2924/01023 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/14

    摘要： An integrated circuit with a monolithic semiconducting substrate formed in a chip, where the chip has a peripheral edge, a backside, and an opposing top on which circuitry is formed. A first ring of bonding pads is formed along at least a portion of the peripheral edge. At least one of the bonding pads is configured as a power pad, and at least one of the bonding pads is configured as a ground pad. An intermediate power bus is disposed interior to the first ring of bonding pads on the chip, and forms no direct electrical connections to any core devices. An intermediate ground bus is also disposed interior to the first ring of bonding pads on the chip, and forms no direct electrical connections to any core devices. A power pad wire forms an exclusive electrical connection between the power pad and the intermediate power bus. A ground pad wire forms an exclusive electrical connection between the ground pad and the intermediate ground bus. A power strap forms an electrical connection between the intermediate power bus and a power mesh. A ground strap forms an electrical connection between the intermediate ground bus and a ground mesh.

    摘要翻译： 一种具有形成在芯片中的单片半导体衬底的集成电路，其中芯片具有外围边缘，背面和形成有电路的相对顶部。 沿周边边缘的至少一部分形成第一接合焊盘。 至少一个接合焊盘被配置为电源焊盘，并且至少一个焊盘被配置为接地焊盘。 中间电源总线设置在芯片上的第一环焊盘的内部，并且不形成与任何核心器件的直接电连接。 中间接地母线也设置在芯片上的第一环焊盘的内部，并且不形成与任何核心器件的直接电连接。 电源焊盘线在电源板和中间电源总线之间形成专用电气连接。 接地焊盘线在接地焊盘和中间接地总线之间形成专用电气连接。 电源带形成中间电源总线和电源网之间的电连接。 接地线在中间接地母线和地面网之间形成电气连接。