公开(公告)号：US20040087054A1

公开(公告)日：2004-05-06

申请号：US10274403

申请日：2002-10-18

Applicant: Applied Materials, Inc.

Inventor： Jeffrey D. Chinn ,  Rolf A. Guenther ,  Michael B. Rattner ,  James A. Cooper

IPC: H01L021/46 ,  H01L021/301 ,  H01L021/00 ,  H01L021/78

CPC classification number: B81C99/0065 ,  B81C1/00896 ,  B81C2201/0132

Abstract: Disclosed are methods of plasma etching through a substrate while preventing rapid leakage of heat transfer fluid during the etch process, protecting process chamber hardware underlying said substrate, and separating components within said substrate while maintaining said components in a position relative to other components within said substrate. The method involves application of a disposable protective barrier layer to the backside of the substrate prior to etching and then removing the barrier layer subsequent to etching.

Abstract translation: 公开了等离子体蚀刻通过衬底的方法，同时防止在蚀刻过程期间传热流体的快速泄漏，保护所述衬底下面的处理室硬件，以及分离所述衬底内的部件，同时将所述部件保持在相对于所述衬底内的其它部件的位置 。 该方法包括在蚀刻之前将一次性保护性阻挡层施加到衬底的背面，然后在蚀刻之后去除阻挡层。

公开(公告)号：US20040033639A1

公开(公告)日：2004-02-19

申请号：US10435757

申请日：2003-05-09

Applicant: APPLIED MATERIALS, INC.

Inventor： Jeffrey D. Chinn ,  Rolf A. Guenther ,  Michael B. Rattner ,  James A. Cooper ,  Toi Yue Becky Leung ,  Claes H. Bjorkman

IPC: H01L021/00

CPC classification number: B81C1/0096 ,  B81B3/0005 ,  B81C2201/0176 ,  B81C2201/112 ,  B82Y30/00

Abstract: Disclosed herein is a method of improving the adhesion of a hydrophobic self-assembled monolayer (SAM) coating to a surface of a MEMS structure, for the purpose of preventing stiction. The method comprises treating surfaces of the MEMS structure with a plasma generated from a source gas comprising oxygen and, optionally, hydrogen. The treatment oxidizes the surfaces, which are then reacted with hydrogen to form bonded OH groups on the surfaces. The hydrogen source may be present as part of the plasma source gas, so that the bonded OH groups are created during treatment of the surfaces with the plasma. Also disclosed herein is an integrated method for release and passivation of MEMS structures which may be adjusted to be carried out in a either a single chamber processing system or a multi-chamber processing system.

Abstract translation: 本文公开了一种改进疏水性自组装单层（SAM）涂层到MEMS结构表面的粘附性的方法，以防止粘结。 该方法包括用包含氧气和任选的氢气的源气体产生的等离子体处理MEMS结构的表面。 处理氧化表面，然后与氢气反应以在表面上形成键合的OH基团。 氢源可以作为等离子体源气体的一部分存在，使得在用等离子体处理表面期间产生结合的OH基团。 本文还公开了一种用于MEMS结构的释放和钝化的集成方法，其可以被调整为在单室处理系统或多室处理系统中进行。

公开(公告)号：US20030166342A1

公开(公告)日：2003-09-04

申请号：US10300970

申请日：2002-11-20

Applicant: APPLIED MATERIALS, INC.

Inventor： Jeffrey D. Chinn ,  Rolf A. Guenther ,  Michael B. Rattner ,  James A. Cooper ,  Toi Yue Becky Leung

IPC: H01L021/461 ,  H01L021/31 ,  H01L021/302 ,  H01L021/469

CPC classification number: B81C1/0096 ,  B81B3/0005 ,  B81C2201/0176 ,  B81C2201/112 ,  B82Y30/00

Abstract: Disclosed herein is a method of improving the adhesion of a hydrophobic self-assembled monolayer (SAM) coating to a surface of a MEMS structure, for the purpose of preventing stiction. The method comprises pretreating surfaces of the MEMS structure with a plasma generated from a source gas comprising oxygen and, optionally, hydrogen. The treatment oxidizes the surfaces, which are then reacted with hydrogen to form bonded OH groups on the surfaces. The hydrogen source may be present as part of the plasma source gas, so that the bonded OH groups are created during treatment of the surfaces with the plasma. Also disclosed herein is an integrated method for release and passivation of MEMS structures.

Abstract translation: 本文公开了一种改进疏水性自组装单层（SAM）涂层到MEMS结构表面的粘附性的方法，以防止粘结。 该方法包括用包含氧气和任选的氢气的源气体产生的等离子体来预处理MEMS结构的表面。 处理氧化表面，然后与氢气反应以在表面上形成键合的OH基团。 氢源可以作为等离子体源气体的一部分存在，使得在用等离子体处理表面期间产生结合的OH基团。 本文还公开了一种用于MEMS结构的释放和钝化的集成方法。

公开(公告)号：US20020164879A1

公开(公告)日：2002-11-07

申请号：US09850923

申请日：2001-05-07

Applicant: Applied Materials, Inc.

Inventor： Toi Yue Becky Leung ,  Jeffrey D. Chinn

IPC: H01L021/302 ,  H01L021/461 ,  H01L021/31 ,  H01L021/469

CPC classification number: B81C1/0096 ,  B81B3/0005 ,  B81C2201/0176 ,  B81C2201/112 ,  B82Y30/00

Abstract: The invention includes methods of forming microstructure devices. In an exemplary method, a substrate is provided which includes a first material and a second material. At least one of the first and second materials is exposed to vapor-phase alkylsilane-containing molecules to form a coating over the at least one of the first and second materials.

Abstract translation: 本发明包括形成微结构器件的方法。 在示例性方法中，提供了包括第一材料和第二材料的基底。 将第一和第二材料中的至少一种暴露于含气相烷基硅烷的分子，以在第一和第二材料中的至少一种材料上形成涂层。

公开(公告)号：US20030071015A1

公开(公告)日：2003-04-17

申请号：US10265598

申请日：2002-10-08

Applicant: APPLIED MATERIALS, INC.

Inventor： Jeffrey D. Chinn ,  Sofiane Soukane

IPC: C03C015/00

CPC classification number: B81C1/00928 ,  B81C2201/112 ,  G02B6/122 ,  G02B6/3692 ,  G02B2006/12176

Abstract: A two-step method of releasing microelectromechanical devices from a substrate is disclosed. The first step comprises isotropically etching a silicon oxide layer sandwiched between two silicon-containing layers with a gaseous hydrogen fluoride-water mixture, the overlying silicon layer to be separated from the underlying silicon layer or substrate for a time sufficient to form an opening but not to release the overlying layer, and the second step comprises adding a drying agent to substitute for moisture remaining in the opening and to dissolve away any residues in the opening that can cause stiction.

Abstract translation: 公开了一种从基板释放微机电装置的两步法。 第一步包括用夹杂在两个含硅层之间的氧化硅层与氟化氢 - 水气体混合物进行各向同性蚀刻，所述上层硅层将从底层硅层或衬底分离足以形成开口但不 以释放上覆层，第二步骤包括加入干燥剂以代替残留在开口中的水分，并溶解开口中可能导致静电的残留物。

公开(公告)号：US20010051439A1

公开(公告)日：2001-12-13

申请号：US09864705

申请日：2001-05-23

Applicant: Applied Materials, Inc.

Inventor： Anisul Khan ,  Ajay Kumar ,  Jeffrey D. Chinn ,  Dragan Podlesnik

IPC: H01L021/302

CPC classification number: H01L21/67069 ,  H01L21/3065 ,  H01L21/76232 ,  H01L27/1087 ,  Y10S156/916

Abstract: This invention is directed to a method for etching films on semiconductor substrates and cleaning etch chambers. The method includes an improved processing sequence and cleaning method where residue formed from processing a previous substrate are cleaned by the etching process used to remove an exposed layer of material from the present substrate. The process provides improved substrate throughput by combining the step to clean residue from a previous substrate with an etch step conducted on the present substrate. Applicants have found the method particularly useful in processing structures such as DRAM stacks, especially where the residue is formed by a trench etched in the previous silicon substrate and the exposed layer etched from the present substrate is silicon nitride.

公开(公告)号：US20010019897A1

公开(公告)日：2001-09-06

申请号：US09853847

申请日：2001-05-11

Applicant: Applied Materials, Inc.

Inventor： Ajay Kumar ,  Anisul Khan ,  Jeffrey D. Chinn ,  Dragan V. Podlesnik

IPC: H01L021/302 ,  C23F003/00 ,  H01L021/461 ,  C23F001/02

CPC classification number: H01L21/67069 ,  H01J37/321 ,  H01J37/32935 ,  H01L21/3065

Abstract: This invention is directed to a method for plasma etching difficult to etch materials at a high etch rate. The method is particularly useful in plasma etching silicon nitride layers more than five microns thick. The method includes a plasma formed by energy provided from two separate power sources and a gaseous mixture that includes only an etchant gas and a sputtering gas. The power levels from the separate power sources and the ratio between the flow rates of the etchant gas and a sputtering gas can be advantageously adjusted to obtain etch rates of silicon nitride greater than two microns per minute. Additionally, an embodiment of the method of the invention provides a two etch step process which combines a high etch rate process with a low etch rate process to achieve high throughput while minimizing the likelihood of damage to underlying layers. The first etch step of the two-step method provides a high etch rate of about two microns per minute to remove substantially all of a layer to be etched the. In the second step, a low etch rate process having an etch rate below about two microns per minute is used remove any residual material not removed by the first etch step.

Abstract translation: 本发明涉及一种用于等离子体蚀刻的方法，其难以以高蚀刻速率蚀刻材料。 该方法在等离子体蚀刻中超过5微米厚的氮化硅层特别有用。 该方法包括通过由两个单独的电源提供的能量形成的等离子体和仅包括蚀刻剂气体和溅射气体的气体混合物。 可以有利地调节来自分离的电源的功率水平以及蚀刻剂气体和溅射气体的流量之间的比率，以获得大于每分钟2微米的氮化硅的蚀刻速率。 另外，本发明的方法的一个实施例提供了两个蚀刻步骤方法，其将高蚀刻速率工艺与低蚀刻速率工艺组合以实现高通量，同时最小化对下层的损伤的可能性。 两步法的第一蚀刻步骤提供了大约每分钟2微米的高蚀刻速率，以便基本上去除所有待蚀刻的层。 在第二步骤中，使用蚀刻速率低于每分钟约2微米的低蚀刻速率工艺去除通过第一蚀刻步骤未被去除的任何残留材料。

公开(公告)号：US20030124848A1

公开(公告)日：2003-07-03

申请号：US10265620

申请日：2002-10-08

Applicant: APPLIED MATERIALS, INC.

Inventor： Jeffrey D. Chinn ,  Robert Z. Bachrach

IPC: H01L021/302 ,  H01L021/461

CPC classification number: B81C1/00476 ,  B81C99/0065 ,  B81C2201/0142

Abstract: A method of determining the time to release of a movable feature in a multilayer substrate of silicon-containing materials including alternate layers of polysilicon and silicon oxide wherein a mass monitoring device determines the mass of a released feature, and the substrate is etched with anhydrous hydrogen fluoride until the substrate mass is equivalent to that of the released movable feature when the etch time is noted. A suitable mass monitoring device is a quartz crystal microbalance.

Abstract translation: 一种确定在包含多晶硅和氧化硅的交替层的含硅材料的多层衬底中释放可移动特征的时间的方法，其中质量监测装置确定释放特征的质量，并且用无水氢氧化物蚀刻衬底 氟化物，直到当注意到蚀刻时间时，衬底质量等于释放的可移动特征的质量。 合适的质量监测装置是石英晶体微量天平。

公开(公告)号：US20040023508A1

公开(公告)日：2004-02-05

申请号：US10210929

申请日：2002-08-02

Applicant: Applied Materials, Inc.

Inventor： Jeffrey D. Chinn ,  Michael Rattner ,  Nicholas Pornsin-Sirirak ,  Yanping Li

IPC: H01L021/302

CPC classification number: H01L21/30655

Abstract: We have developed an uncomplicated method of plasma etching deeply recessed features such as deep trenches, of at least 5 nullm in depth, in a silicon-containing substrate, in a manner which generates smooth sidewalls, having a roughness of less than about 1 nullm, typically less than about 500 nm, and even more typically between about 100 nm and 20 nm. Features having a sidewall taper angle, relative to an underlying substrate, typically ranges from about 85null to about 92null and exhibiting the smooth sidewalls are produced by the method. In one embodiment, a stabilizing etchant species is used constantly during the plasma etch process, while at least one other etchant species and at least one polymer depositing species are applied intermittently, typically periodically, relative to each other. In another embodiment, the stabilizing etchant species is used constantly and a mixture of the other etchant species and polymer depositing species is used intermittently.

Abstract translation: 我们已经开发出一种不复杂的方法，其以产生平滑侧壁，粗糙度小于约1μm的方式，在含硅衬底中等深度蚀刻深凹陷特征，例如至少5μm深的深沟槽， 通常小于约500nm，甚至更典型地在约100nm和20nm之间。 具有相对于下面的基底的侧壁锥角的特征通常在约85°至约92°的范围内，并且通过该方法产生了平滑的侧壁。 在一个实施例中，在等离子体蚀刻过程期间不断地使用稳定蚀刻剂物质，而至少一种其它蚀刻剂物质和至少一种聚合物沉积物质相对于彼此间歇地，典型地周期性地施加。 在另一个实施方案中，稳定化蚀刻剂物质被不断使用，并且间歇地使用其它蚀刻剂物质和聚合物沉积物质的混合物。

公开(公告)号：US20030219986A1

公开(公告)日：2003-11-27

申请号：US10267824

申请日：2002-10-08

Applicant: Applied Materials, Inc.

Inventor： Michael B. Rattner ,  Rolf A. Guenther ,  Jeffrey D. Chinn

IPC: H01L021/302 ,  H01L021/461

CPC classification number: H01L21/68735 ,  H01L21/67103 ,  H01L21/67109 ,  H01L21/68757

Abstract: A substrate carrier for carrying one or more substrates comprises a bottom surface, a top surface opposed to the bottom surface, one or more recesses formed into the top surface, each of the one or more recesses having a support surface that defines a support region for a substrate. The support region is adapted to contact a bottom of the substrate. The support region may have a thickness less than a depth of the one or more recesses. The support region may comprise a porous material to permit thermal fluid to percolate through the support region.

Abstract translation: 用于承载一个或多个衬底的衬底载体包括底表面，与底表面相对的顶表面，形成在顶表面中的一个或多个凹槽，所述一个或多个凹槽中的每一个具有支撑表面，该支撑表面限定用于 底物。 支撑区域适于接触基底的底部。 支撑区域可以具有小于一个或多个凹部的深度的厚度。 支撑区域可以包括多孔材料，以允许热流体渗透通过支撑区域。