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公开(公告)号:US20230187204A1
公开(公告)日:2023-06-15
申请号:US17844189
申请日:2022-06-20
Applicant: Applied Materials, Inc.
Inventor: Xiaodong Wang , Kevin Kashefi , Rongjun Wang , Shi You , Keith T. Wong , Yuchen Liu , Ya-Hsi Hwang , Jean Lu
IPC: H01L21/02 , H01L21/285
CPC classification number: H01L21/0234 , H01L21/28568
Abstract: Provided are methods for pre-cleaning a substrate. A substrate having tungsten oxide (WOx) thereon is soaked in tungsten fluoride (WF6), which reduces the tungsten oxide (WOx) to tungsten (W). Subsequently, the substrate is treated with hydrogen, e.g., plasma treatment or thermal treatment, to reduce the amount of fluorine present so that fluorine does not invade the underlying insulating layer.
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公开(公告)号:US11515200B2
公开(公告)日:2022-11-29
申请号:US17110826
申请日:2020-12-03
Applicant: Applied Materials, Inc.
IPC: H01L21/768
Abstract: Embodiments of the disclosure provide methods which reduce or eliminate lateral growth of a selective tungsten layer. Further embodiments provide an integrated clean and deposition method which improves the selectivity of selectively deposited tungsten on trench structures. Additional embodiments provide methods for forming a more uniform and selective bottom-up gap fill for trench structures with improved film properties.
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公开(公告)号:US20240234209A1
公开(公告)日:2024-07-11
申请号:US18544812
申请日:2023-12-19
Applicant: Applied Materials, Inc.
Inventor: Avgerinos V. Gelatos , Yang Hu , Thomas Anthony Empante , Gaurav Thareja , Joung Joo Lee , Shi You , Pranav Ramesh , Chi H. Ching , Nicolas Breil
IPC: H01L21/768 , H01L21/8238 , H01L23/528 , H01L23/532 , H01L27/092 , H01L29/417 , H01L29/45
CPC classification number: H01L21/76889 , H01L21/823871 , H01L23/5283 , H01L23/53266 , H01L27/0922 , H01L29/41725 , H01L29/456
Abstract: Methods for forming a semiconductor structure and semiconductor structures are described. The method comprises patterning a substrate to form a first opening and a second opening, the substrate comprising an n transistor and a p transistor, the first opening over the n transistor and the second opening over the p transistor. The substrate is pre-cleaned. A molybdenum silicide (MoSi) layer is deposited on one or more of the p transistor and the n transistor. A titanium silicide (TiSi) layer is formed on the n transistor and the p transistor. A capping layer may be formed on the titanium silicide (TiSi) layer. The method may be an integrated method performed in a processing chamber without breaking vacuum.
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公开(公告)号:US11615984B2
公开(公告)日:2023-03-28
申请号:US16848784
申请日:2020-04-14
Applicant: APPLIED MATERIALS, INC.
Inventor: Shi You , He Ren , Naomi Yoshida , Nikolaos Bekiaris , Mehul Naik , Martin Jay Seamons , Jingmei Liang , Mei-Yee Shek
IPC: H01L21/768 , H01L21/02 , H01L21/67
Abstract: Embodiments herein provide for oxygen based treatment of low-k dielectric layers deposited using a flowable chemical vapor deposition (FCVD) process. Oxygen based treatment of the FCVD deposited low-k dielectric layers desirably increases the Ebd to capacitance and reliability of the devices while removing voids. Embodiments include methods and apparatus for making a semiconductor device including: etching a metal layer disposed atop a substrate to form one or more metal lines having a top surface, a first side, and a second side; depositing a passivation layer atop the top surface, the first side, and the second side under conditions sufficient to reduce or eliminate oxygen contact with the one or more metal lines; depositing a flowable layer of low-k dielectric material atop the passivation layer in a thickness sufficient to cover the one or more metal lines; and contacting the flowable layer of low-k dielectric material with oxygen under conditions sufficient to anneal and increase a density of the low-k dielectric material.
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公开(公告)号:US11923244B2
公开(公告)日:2024-03-05
申请号:US17193994
申请日:2021-03-05
Applicant: Applied Materials, Inc.
Inventor: He Ren , Hao Jiang , Shi You , Mehul B. Naik
IPC: H01L21/768
CPC classification number: H01L21/76843 , H01L21/76879
Abstract: Embodiments of the present disclosure generally relate to subtractive metals, subtractive metal semiconductor structures, subtractive metal interconnects, and to processes for forming such semiconductor structures and interconnects. In an embodiment, a process for fabricating a semiconductor structure is provided. The process includes performing a degas operation on the semiconductor structure and depositing a liner layer on the semiconductor structure. The process further includes performing a sputter operation on the semiconductor structure, and depositing, by physical vapor deposition, a metal layer on the liner layer, wherein the liner layer comprises Ti, Ta, TaN, or combinations thereof, and a resistivity of the metal layer is about 30 μΩ·cm or less.
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公开(公告)号:US11164780B2
公开(公告)日:2021-11-02
申请号:US16435121
申请日:2019-06-07
Applicant: APPLIED MATERIALS, INC.
Inventor: Shi You , He Ren , Mehul Naik , Yi Xu , Feng Chen
IPC: H01L21/768 , H01L21/311 , H01L21/02
Abstract: Methods and apparatus for an interconnect formed on a substrate and a method of forming the interconnect thereon. In embodiments, the methods include etching through a hard mask disposed atop a low-k dielectric layer to form a via through the low-k dielectric layer and expose a conductive surface; contacting the conductive surface with dilute hydrofluoric acid to remove contaminants therefrom; removing the hard mask disposed atop the low-k dielectric layer; and applying a remote hydrogen plasma to the conductive surface to form an exposed portion of the conductive surface.
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公开(公告)号:US12046508B2
公开(公告)日:2024-07-23
申请号:US18108338
申请日:2023-02-10
Applicant: APPLIED MATERIALS, INC.
Inventor: Shi You , He Ren , Naomi Yoshida , Nikolaos Bekiaris , Mehul Naik , Martin Jay Seamons , Jingmei Liang , Mei-Yee Shek
IPC: H01L21/768 , H01L21/02 , H01L21/67
CPC classification number: H01L21/76837 , H01L21/02323 , H01L21/02337 , H01L21/67103 , H01L21/76825 , H01L21/76826 , H01L21/76828 , H01L21/76834 , H01L21/02326
Abstract: Embodiments herein provide for oxygen based treatment of low-k dielectric layers deposited using a flowable chemical vapor deposition (FCVD) process. Oxygen based treatment of the FCVD deposited low-k dielectric layers desirably increases the Ebd to capacitance and reliability of the devices while removing voids. Embodiments include methods and apparatus for making a semiconductor device including: etching a metal layer disposed atop a substrate to form one or more metal lines having a top surface, a first side, and a second side; depositing a passivation layer atop the top surface, the first side, and the second side under conditions sufficient to reduce or eliminate oxygen contact with the one or more metal lines; depositing a flowable layer of low-k dielectric material atop the passivation layer in a thickness sufficient to cover the one or more metal lines; and contacting the flowable layer of low-k dielectric material with oxygen under conditions sufficient to anneal and increase a density of the low-k dielectric material.
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公开(公告)号:US11094588B2
公开(公告)日:2021-08-17
申请号:US16562091
申请日:2019-09-05
Applicant: Applied Materials, Inc.
Inventor: Shi You , He Ren , Mehul B. Naik
IPC: H01L21/768 , H01L23/522 , H01L23/532 , H01L21/285
Abstract: Embodiments of the present disclosure generally relate an interconnect structure formed on a substrate and a method of forming the interconnect structure thereon. In one embodiment, a method of forming an interconnect structure includes forming an opening comprising a via and a trench in an insulating structure formed on a substrate, forming a first passivation layer in the opening, removing a portion of the first passivation layer from the opening, and selectively depositing a first metal containing material in the via.
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