High breakdown voltage semiconductor device
    1.
    发明授权
    High breakdown voltage semiconductor device 失效
    高击穿电压半导体器件

    公开(公告)号:US4388635A

    公开(公告)日:1983-06-14

    申请号:US164946

    申请日:1980-07-01

    IPC分类号: H01L29/06 H01L29/40 H01L29/74

    摘要: A novel structure of a high breakdown voltage semiconductor device has a pair of major surfaces on which a pair of main electrodes are formed and a PN junction formed between the pair of major surfaces with a side surface to which the PN junction is exposed being covered with a passivation material. An auxiliary electrode of a conductive member is provided, which is disposed externally of the peripheral edge of the major surface of the semiconductor substrate, and which contacts to the passivation material and is electrically connected to the main electrode. When a voltage for reverse biasing the PN junction is applied between the pair of main electrodes, ions in the passivation material are collected by an electric field established in the passivation material so that the deterioration of the breakdown on the surface of the semiconductor substrate is prevented.

    摘要翻译: 高击穿电压半导体器件的新颖结构具有一对主表面,其上形成有一对主电极,并且在一对主表面之间形成有PN结被暴露的侧表面覆盖的PN结 钝化材料。 提供了一种导电构件的辅助电极,其设置在半导体衬底的主表面的外围边缘的外侧,并与钝化材料接触并与主电极电连接。 当在一对主电极之间施加用于反向偏置PN结的电压时,通过在钝化材料中建立的电场来收集钝化材料中的离子,从而防止半导体衬底的表面上的击穿劣化 。

    High voltage thyristor with optimized doping, thickness, and sheet
resistivity for cathode base layer
    2.
    发明授权
    High voltage thyristor with optimized doping, thickness, and sheet resistivity for cathode base layer 失效
    具有优化的阴极基底层的掺杂,厚度和薄层电阻率的高压晶闸管

    公开(公告)号:US4682199A

    公开(公告)日:1987-07-21

    申请号:US489505

    申请日:1983-04-28

    IPC分类号: H01L29/10 H01L29/74

    CPC分类号: H01L29/7428 H01L29/102

    摘要: In a high-voltage thyristor comprising a semiconductor body having contiguous pnpn four layers, and opposed anode and cathode electrodes and a gate electrode provided for the semiconductor body, one of p-base and n-base regions having an impurity concentration higher than the other has an impurity concentration which is no more than 8.times.10.sup.15 atoms/cm.sup.3 in the vicinity of a junction between the one base region and an adjacent emitter region and which has a gradually decreasing gradient toward the other contiguous base region. The one base region has a sheet resistance of 500 to 1500 ohms/.quadrature.. The realization of a high-voltage, large-diameter and large-current thyristor can be ensured.

    摘要翻译: 在包括具有相邻pnpn四层的半导体本体和相对的阳极和阴极电极以及为半导体本体提供的栅电极的高压晶闸管中,杂质浓度高于另一半导体的p基极和n基区中的一个 在一个基极区域和相邻的发射极区域之间的结的附近具有不大于8×10 15原子/ cm 3的杂质浓度,并且朝向另一个连续的基极区域具有逐渐降低的梯度。 一个基本区域的薄层电阻为500至1500欧姆/平方厘米。 可以确保高电压,大直径和大电流晶闸管的实现。

    Light activated semiconductor device
    4.
    发明授权
    Light activated semiconductor device 失效
    光激活半导体器件

    公开(公告)号:US4404580A

    公开(公告)日:1983-09-13

    申请号:US172072

    申请日:1980-07-24

    CPC分类号: H01L31/1113 H01L29/74

    摘要: A light activated thyristor with high dv/dt capability is provided by disposing first and second thyristors, one a primary and the other a pilot thyristor, in a semiconductor body having first and second major surface. The two thyristors have common first emitter, first base, and second base regions, and have spaced apart second emitter regions adjoining the second major surface of the body. The second emitter region of the second thyristor consists of first and second portions, first portion abutting the second base region of the second thyristor to create a ratarded electrical field. An exposed portion of the second major surface at the second emitter region of the second thyristor activates the second thyristor when electromagnetic radiation of wavelengths corresponding substantially to the energy bandgap of the semiconductor body strikes this exposed portion. The cathode electrode makes ohmic contact with the second emitter region of the first thyristor, and the anode electrode makes ohmic contact with the common first emitter regions. A floating contact also makes ohmic contact to the second emitter region of the second thyristor and the common second base region between the thyristors.

    摘要翻译: 具有高dv / dt能力的光激活晶闸管通过在具有第一和第二主表面的半导体本体中设置第一和第二晶闸管,一个一个导电晶闸管和另一个晶闸管。 两个晶闸管具有共同的第一发射极,第一基极和第二基极区域,并且具有邻接主体的第二主表面的间隔开的第二发射极区域。 第二晶闸管的第二发射极区域由第一和第二部分组成,第一部分邻接第二晶闸管的第二基极区域以产生经过电压的电场。 当第二晶闸管的第二发射极区域处的第二主表面的暴露部分激活第二晶闸管,当基本上对应于半导体主体的能带隙的波长的电磁辐射撞击该暴露部分时。 阴极电极与第一晶闸管的第二发射极区域欧姆接触,并且阳极电极与共同的第一发射极区域欧姆接触。 浮动接触还使第二晶闸管的第二发射极区域和晶闸管之间的公共第二基极区域欧姆接触。

    Semiconductor controlled rectifier device with small area dV/dt
self-protecting means
    6.
    发明授权
    Semiconductor controlled rectifier device with small area dV/dt self-protecting means 失效
    具有小面积dV / dt自保护装置的半导体可控整流器件

    公开(公告)号:US4240091A

    公开(公告)日:1980-12-16

    申请号:US68571

    申请日:1979-08-22

    IPC分类号: H01L29/74

    CPC分类号: H01L29/7424 H01L29/7428

    摘要: A main thyristor region is formed which comprises four continuous layers of alternately different conductivities consisting of first, second, third and fourth layers, PNPN for example. The main thyristor region constitutes a main thyristor section together with a couple of main electrodes in ohmic contact with the outside ones of the four layers. A pilot thyristor section and an auxiliary pilot thyristor section are constituted by employing the first, second and third layers of the main thyristor section and the main electrode in ohmic contact with the outside of the first layer and further by introducing fifth and sixth layers for forming PH junctions with the third layer. Further, there are provided a gate means for turning on the pilot thyristor section and an auxiliary gate means being in contact with the fifth or sixth layer. The auxiliary pilot thyristor section, main thyristor section and pilot thyristor section are formed in such a way that the respective triggering voltages satisfy the following relation:.vertline.dV/dt.vertline.aux

    摘要翻译: 形成主晶闸管区域,其包括由例如PNPN组成的由第一层,第二层,第三层和第四层构成的交替不同导电性的四个连续层。 主晶闸管区域与与四层中的外层电阻欧姆接触的一对主电极构成主晶闸管部分。 通过使用主晶闸管部分的第一层,第二层和第三层与主电极与第一层的外部欧姆接触并进一步通过引入第五层和第六层来形成导引晶闸管部分和辅助导频晶闸管部分 PH结点与第三层。 此外,提供了用于导通导频晶闸管部分的栅极装置和与第五或第六层接触的辅助栅极装置。 辅助导频晶闸管部分,主晶闸管部分和导频晶闸管部分形成为使得各个触发电压满足以下关系:| dV / dt|aux <| dV / dt | main,| dV / dt | pil 形成在辅助先导晶闸管部分和第三层之间的PN结的整个外围区域被辅助导频晶闸管部分的栅极装置完全短路。

    Bidirectional light-activated thyristor having substrate optical
isolation
    7.
    发明授权
    Bidirectional light-activated thyristor having substrate optical isolation 失效
    具有基板光学隔离的双向光激活晶闸管

    公开(公告)号:US4216487A

    公开(公告)日:1980-08-05

    申请号:US879758

    申请日:1978-02-21

    摘要: Disclosed is a bidirectional light-activated thyristor which comprises a first and a second thyristor portion arranged in inverse-parallel with each other with a predetermined positional relation, an isolation section for electrically isolating the first and second thyristor portions from each other, a first and a second main electrode for connecting the first and second thyristor portions with each other in inverse-parallel, and a first and a second photo-trigger means for triggering the first and second thyristor portions respectively, wherein the photo-trigger signal from the first photo-trigger means is prevented by the first thyristor portion from reaching the second thyristor portion and the photo-trigger signal from the second photo-trigger means is prevented by the second thyristor portion from reaching the first thyristor portion.

    摘要翻译: 公开了一种双向光激活晶闸管,其包括以预定的位置关系彼此相反并联布置的第一和第二晶闸管部分,用于将第一和第二晶闸管部分彼此电隔离的隔离部分,第一和第二晶体管 用于将第一和第二晶闸管部分彼此并联连接的第二主电极和分别触发第一和第二晶闸管部分的第一和第二光触发装置,其中来自第一照片的光触发信号 通过第一晶闸管部分防止触发装置到达第二晶闸管部分,并且通过第二晶闸管部分防止来自第二光触发装置的光触发信号到达第一晶闸管部分。

    Bidirectional photothyristor device
    9.
    发明授权
    Bidirectional photothyristor device 失效
    双向光闸晶体管

    公开(公告)号:US4016593A

    公开(公告)日:1977-04-05

    申请号:US583406

    申请日:1975-06-03

    CPC分类号: H01L31/0203 H01L31/1113

    摘要: A bidirectional photothyristor device comprises a semiconductive substrate including an NPNPN quintuple layer in which projections of both the outer layers Ns in the stacking direction are not overlapped so as to define two quadruple layer regions each having either one of the outer layers Ns as an end layer, a pair of main electrodes connecting the two quadruple layer regions in parallel relationship, a recess formed between the two quadruple layer regions within the semiconductive substrate and to which two intermediate P-N junctions are exposed, and means for applying a light trigger signal to the recess.

    摘要翻译: 双向光闸晶体管装置包括一个包括NPNPN五元组的半导体衬底,其中层叠方向上的两个外层Ns的突起不重叠,以便限定两个四层层,每层具有外层Ns中的任一层作为端层 一对主电极并联连接两个四重层区域,形成在半导体衬底内的两个四重层区域之间并且两个中间PN结露出的凹部和用于将光触发信号施加到凹部的装置 。

    SILICON CARBIDE MOS FIELD EFFECT TRANSISTOR WITH BUILT-IN SCHOTTKY DIODE AND METHOD FOR MANUFACTURING SUCH TRANSISTOR
    10.
    发明申请
    SILICON CARBIDE MOS FIELD EFFECT TRANSISTOR WITH BUILT-IN SCHOTTKY DIODE AND METHOD FOR MANUFACTURING SUCH TRANSISTOR 有权
    具有内置肖特基二极管的硅碳化物磁场效应晶体管及其制造方法

    公开(公告)号:US20090173949A1

    公开(公告)日:2009-07-09

    申请号:US12281391

    申请日:2006-12-27

    IPC分类号: H01L29/24 H01L21/336

    摘要: This invention has a cell incorporating a built-in Schottky diode region disposed in at least part of an elementary cell that constitutes an SiC vertical MOSFET provided in a low-density p-type deposit film with a channel region and a base region inverted to an n-type by ion implantation. This built-in Schottky diode region has built therein a Schottky diode of low on-resistance that is formed of a second deficient pan disposed in a high-density gate layer, a second n-type base layer penetrating a low-density p-type deposit layer formed thereon, reaching an n-type drift layer of the second deficient part and attaining its own formation in consequence of inversion of the p-type deposit layer into an n-type by the ion implantation of an n-type impurity from the surface, and a source electrode connected in the manner of forming a Schottky barrier to the surface-exposed part of the second n-type base layer.

    摘要翻译: 本发明具有一个电池,该电池结合了内置的肖特基二极管区域,该区域设置在构成在具有沟道区域和基极区域的低密度p型沉积膜中提供的SiC垂直MOSFET的基本单元的至少一部分中 n型离子注入。 该内置的肖特基二极管区域内置有低导通电阻的肖特基二极管,该二极管由设置在高密度栅极层中的第二缺陷盘形成,第二n型基极层穿透低密度p型 沉积层形成在其上,到达第二缺陷部分的n型漂移层,并且由于p型沉积层通过从n型杂质离子注入n型杂质而转变为n型,从而形成其自身的形成 表面以及以与第二n型基底层的表面暴露部分形成肖特基势垒的方式连接的源电极。