DISPLAY PANEL AND METHOD OF FABRICATING SAME

    公开(公告)号:US20220376150A1

    公开(公告)日:2022-11-24

    申请号:US17519556

    申请日:2021-11-04

    Abstract: A display panel including a pixel circuit substrate, a planarization layer, a plurality of bonding pads, a plurality of light-emitting devices, a plurality of auxiliary electrodes, and a reflective structure layer is provided. The pixel circuit substrate has a plurality of signal lines. The planarization layer covers the signal lines. The bonding pads are disposed on the planarization layer and are electrically connected to the signal lines. The light-emitting devices are electrically bonded to the bonding pads. The auxiliary electrodes are disposed between the bonding pads. The reflective structure layer is disposed between the light-emitting devices and overlaps at least part of the auxiliary electrodes and the bonding pads. A method of fabricating the display panel is also provided.

    Manufacturing method of display panel

    公开(公告)号:US11444107B2

    公开(公告)日:2022-09-13

    申请号:US17037666

    申请日:2020-09-30

    Abstract: A manufacturing method of a display panel includes providing a substrate having a first surface and a second surface opposite to the first surface; forming a high-shielding position layer on the first surface, wherein the light-shielding positioning layer has at least one first alignment pattern; forming a transparent material layer on the second surface; forming a photoresist layer on the transparent material layer; performing an exposure process, such that a light beam passes through the at least one first alignment pattern to penetrate through the substrate and the transparent material layer to the photoresist layer; performing a developing process to pattern the photoresist layer and form a patterned photoresist layer; and performing an etching process to pattern the transparent positioning layer having at least one second alignment pattern. In a direction perpendicular to the substrate, at least one first alignment pattern overlaps with at least one second alignment pattern.

    DISPLAY APPARATUS AND MANUFACTURING METHOD THEREOF

    公开(公告)号:US20210217807A1

    公开(公告)日:2021-07-15

    申请号:US17105410

    申请日:2020-11-25

    Abstract: A display apparatus, including a substrate, a conductive structure, a pixel unit, a signal line, a transmission line, and a repair structure, is provided. The substrate has a first surface, a second surface, and a through hole. The conductive structure is disposed in the through hole. The pixel unit is disposed on the first surface. The pixel unit includes first, second, third, and fourth connection pads, a driving element, and a light-emitting element. The light-emitting element is electrically connected to the first and second connection pads. The signal line is disposed on the first surface. The driving element is electrically connected to the first and third connection pads through the signal line. The transmission line is disposed on the second surface and electrically connected to the second or fourth connection pad at least through the conductive structure. The repair structure is disposed between the transmission line and the conductive structure.

    SEMICONDUCTOR SUBSTRATE
    4.
    发明申请

    公开(公告)号:US20210005750A1

    公开(公告)日:2021-01-07

    申请号:US16783045

    申请日:2020-02-05

    Abstract: A semiconductor substrate includes a substrate, a first metal oxide semiconductor layer, a first insulating layer, a first conductive layer, a second insulating layer, a second conductive layer, and a second metal oxide semiconductor layer. The first transistor includes a first metal oxide semiconductor pattern of the first metal oxide semiconductor layer, a first gate of the first conductive layer, a first source of the second conductive layer, and a first drain of the second conductive layer. The second transistor includes a second metal oxide semiconductor pattern of the first metal oxide semiconductor layer, a second gate of the first conductive layer, a second source of the second conductive layer, a second drain of the second conductive layer, and a third metal oxide semiconductor pattern of the second metal oxide semiconductor layer.

    METHOD FOR FABRICATING THIN FILM TRANSISTOR AND APPARATUS THEREOF
    5.
    发明申请
    METHOD FOR FABRICATING THIN FILM TRANSISTOR AND APPARATUS THEREOF 审中-公开
    用于制造薄膜晶体管的方法及其装置

    公开(公告)号:US20160071961A1

    公开(公告)日:2016-03-10

    申请号:US14622929

    申请日:2015-02-16

    CPC classification number: H01L29/66969 H01L21/441 H01L29/24

    Abstract: A method for fabricating a thin film transistor (TFT) is provided, and the method includes following steps. A gate and an insulation layer are sequentially formed on a substrate. A source electrode and a drain electrode are formed on the insulation layer. A solution type metal oxide precursor is coated on the insulation layer above the gate. A gas is provided, and the gas does not react with the solution type metal oxide precursor. An illumination process is performed on the solution type metal oxide precursor, so as to form a metal oxide semiconductor material through a photo cross-linking reaction of the solution type metal oxide precursor.

    Abstract translation: 提供了制造薄膜晶体管(TFT)的方法,该方法包括以下步骤。 在衬底上依次形成栅极和绝缘层。 源电极和漏电极形成在绝缘层上。 溶液型金属氧化物前体被涂覆在栅极上方的绝缘层上。 提供气体,并且气体不与溶液型金属氧化物前体反应。 对溶液型金属氧化物前体进行照射处理,以通过溶液型金属氧化物前体的光交换反应形成金属氧化物半导体材料。

    Array substrate
    6.
    发明授权

    公开(公告)号:US11605652B2

    公开(公告)日:2023-03-14

    申请号:US16726846

    申请日:2019-12-25

    Abstract: An array substrate includes a substrate as well as a first insulating layer, a first conductive layer, a second insulating layer, a second conductive layer and a conductive structure sequentially formed thereon. The first insulating layer has a first opening communicated with a through hole of the substrate. The first conductive layer includes a first ring pattern extending from top of the first insulating layer into the first opening. The second insulating layer has a second opening communicated with the first opening. The second conductive layer includes a second ring pattern extending from top of the second insulating layer into the second opening. The first ring pattern laterally protrudes toward an axis of the through hole from the second ring pattern. The conductive structure extends from above the second insulating layer to a bottom surface of the substrate through the first and second openings and the through hole.

    Flexible electronic device
    7.
    发明授权

    公开(公告)号:US11500433B2

    公开(公告)日:2022-11-15

    申请号:US17111482

    申请日:2020-12-03

    Abstract: A flexible electronic device including a flexible substrate, a plurality of first signal lines, a plurality of first transmission lines, a plurality of first through holes, and a plurality of first conductive structures is provided. The flexible substrate has a first surface and a second surface opposite to the first surface. The first signal lines are located on the first surface and have a first extending direction. The first transmission lines are located on the second surface and have a second extending direction. A first included angle is provided between the first extending direction and the second extending direction. An angle of the first included angle is between 10° and 80°. The first through holes penetrate through the flexible substrate. The first conductive structures are located in the first through holes and are electrically connected to the first signal lines and the first transmission lines.

    Device substrate with asymmetrical fan-out lines and spliced electronic apparatus using the same

    公开(公告)号:US11495646B2

    公开(公告)日:2022-11-08

    申请号:US16439722

    申请日:2019-06-13

    Abstract: A device substrate includes a carrier, a device array, first fan-out lines, and second fan-out lines. The carrier has a first side, a second side, a third side, and a fourth side. The first side is opposite to the second side. The third side is opposite to the fourth side. The device array is disposed on a first surface of the carrier. The device array includes sub-pixels. Each of the sub-pixels includes a switching element and an optoelectronic element electrically connected with the switching element. The first fan-out lines are extending from the first side to the first surface and electrically connected with the device array. The second fan-out lines are extending from the second side to the first surface and electrically connected with the device array. The first fan-out lines and the second fan-out lines are asymmetrically disposed on the first side and the second side, respectively.

    DEVICE SUBSTRATE AND SPLICED ELECTRONIC APPARATUS

    公开(公告)号:US20200295107A1

    公开(公告)日:2020-09-17

    申请号:US16439722

    申请日:2019-06-13

    Abstract: A device substrate includes a carrier, a device array, first fan-out lines, and second fan-out lines. The carrier has a first side, a second side, a third side, and a fourth side. The first side is opposite to the second side. The third side is opposite to the fourth side. The device array is disposed on a first surface of the carrier. The device array includes sub-pixels. Each of the sub-pixels includes a switching element and an optoelectronic element electrically connected with the switching element. The first fan-out lines are extending from the first side to the first surface and electrically connected with the device array. The second fan-out lines are extending from the second side to the first surface and electrically connected with the device array. The first fan-out lines and the second fan-out lines are asymmetrically disposed on the first side and the second side, respectively.

    Thin film transistor and photoelectric device thereof

    公开(公告)号:US10475826B2

    公开(公告)日:2019-11-12

    申请号:US15971086

    申请日:2018-05-04

    Abstract: A thin film transistor includes a gate electrode, a semiconductor layer, a gate dielectric layer, a first dielectric layer, a source electrode, and a drain electrode. The gate electrode is disposed on a substrate. The semiconductor layer is disposed on the substrate and overlaps with the gate electrode. The gate dielectric layer is disposed between the gate electrode and the semiconductor layer. The first dielectric layer is disposed on the substrate and covers two sides of the gate electrode or the semiconductor layer. The dielectric constant of the first dielectric layer is less than the dielectric constant of the gate dielectric layer, and the dielectric constant of the first dielectric layer is less than 4. The source electrode and the drain electrode are disposed on the substrate. The source electrode is separated from the drain electrode, and the source electrode and the drain electrode separately contact the semiconductor layer.

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