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公开(公告)号：US20130080804A1
公开(公告)日：2013-03-28
申请号：US13247580
申请日：2011-09-28
IPC分类号： G06F1/32
CPC分类号： G06F1/3234 , G06F1/206 , G06F1/324 , Y02D10/16
摘要： In one embodiment, the present invention includes a method for determining, in a controller of a multi-domain processor, whether a temperature of a second domain of the multi-domain processor is greater than a sum of a throttle threshold and a cross-domain margin, and if so, reducing a frequency of a first domain of the multi-domain processor by a selected amount. In this way, a temperature of the second domain can be allowed to reduce, given a thermal coupling of the domains. Other embodiments are described and claimed.
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2.发明授权Controlling temperature of multiple domains of a multi-domain processor using a cross domain margin 有权使用跨域边距来控制多域处理器的多个域的温度公开(公告)号：US08954770B2
公开(公告)日：2015-02-10
申请号：US13247580
申请日：2011-09-28
CPC分类号： G06F1/3234 , G06F1/206 , G06F1/324 , Y02D10/16
摘要： In one embodiment, the present invention includes a method for determining, in a controller of a multi-domain processor, whether a temperature of a second domain of the multi-domain processor is greater than a sum of a throttle threshold and a cross-domain margin, and if so, reducing a frequency of a first domain of the multi-domain processor by a selected amount. In this way, a temperature of the second domain can be allowed to reduce, given a thermal coupling of the domains. Other embodiments are described and claimed.
摘要翻译： 在一个实施例中，本发明包括一种用于在多域处理器的控制器中确定多域处理器的第二域的温度是否大于节流阀阈值和跨域之和的方法 余量，如果是，则将多域处理器的第一域的频率降低所选择的量。 以这种方式，由于域的热耦合，可以允许第二域的温度降低。 描述和要求保护其他实施例。
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公开(公告)号：US20130173941A1
公开(公告)日：2013-07-04
申请号：US13780087
申请日：2013-02-28
IPC分类号： G06F1/32
CPC分类号： G06F1/3234 , G06F1/206 , G06F1/324 , Y02D10/16
摘要： In one embodiment, the present invention includes a method for determining, in a controller of a multi-domain processor, whether a temperature of a second domain of the multi-domain processor is greater than a sum of a throttle threshold and a cross-domain margin, and if so, reducing a frequency of a first domain of the multi-domain processor by a selected amount. In this way, a temperature of the second domain can be allowed to reduce, given a thermal coupling of the domains. Other embodiments are described and claimed.
摘要翻译： 在一个实施例中，本发明包括一种用于在多域处理器的控制器中确定多域处理器的第二域的温度是否大于节流阀阈值和跨域之和的方法 余量，如果是，则将多域处理器的第一域的频率降低所选择的量。 以这种方式，由于域的热耦合，可以允许第二域的温度降低。 描述和要求保护其他实施例。
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公开(公告)号：US20130080803A1
公开(公告)日：2013-03-28
申请号：US13247564
申请日：2011-09-28
申请人： Avinash N. Ananthakrishnan , Efraim Rotem , Itai Feit , Tomer Ziv , Doron Rajwan , Nadav Shulman , Alon Naveh
发明人： Avinash N. Ananthakrishnan , Efraim Rotem , Itai Feit , Tomer Ziv , Doron Rajwan , Nadav Shulman , Alon Naveh
CPC分类号： G01K7/42 , G06F1/206 , G06F1/3243 , Y02D10/152 , Y02D10/16 , Y02D50/20
摘要： In one embodiment, the present invention includes a method for determining if a core of a multicore processor is in a low power state, and if so, estimating a temperature of the core and storing the estimated temperature in a thermal storage area for the first core. By use of this estimated temperature, an appropriate voltage at which to operate the core when it exits the low power state can be determined. Other embodiments are described and claimed.
摘要翻译： 在一个实施例中，本发明包括一种用于确定多核处理器的核心是否处于低功率状态的方法，如果是，则估计核心的温度并将估计的温度存储在第一核心的热存储区域中 。 通过使用该估计的温度，可以确定当其离开低功率状态时操作芯的适当电压。 描述和要求保护其他实施例。
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5.发明授权Estimating temperature of a processor core in a low power state without thermal sensor information 有权在没有热传感器信息的低功率状态下估计处理器内核的温度公开(公告)号：US09074947B2
公开(公告)日：2015-07-07
申请号：US13247564
申请日：2011-09-28
申请人： Avinash N. Ananthakrishnan , Efraim Rotem , Itai Feit , Tomer Ziv , Doron Rajwan , Nadav Shulman , Alon Naveh
发明人： Avinash N. Ananthakrishnan , Efraim Rotem , Itai Feit , Tomer Ziv , Doron Rajwan , Nadav Shulman , Alon Naveh
CPC分类号： G01K7/42 , G06F1/206 , G06F1/3243 , Y02D10/152 , Y02D10/16 , Y02D50/20
摘要： In one embodiment, the present invention includes a method for determining if a core of a multicore processor is in a low power state, and if so, estimating a temperature of the core and storing the estimated temperature in a thermal storage area for the first core. By use of this estimated temperature, an appropriate voltage at which to operate the core when it exits the low power state can be determined. Other embodiments are described and claimed.
摘要翻译： 在一个实施例中，本发明包括一种用于确定多核处理器的核心是否处于低功率状态的方法，如果是，则估计核心的温度并将估计的温度存储在第一核心的热存储区域中 。 通过使用该估计的温度，可以确定当其离开低功率状态时操作芯的适当电压。 描述和要求保护其他实施例。
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6.发明申请公开(公告)号：US20140115351A1
公开(公告)日：2014-04-24
申请号：US14143939
申请日：2013-12-30
IPC分类号： G06F1/26
CPC分类号： G06F1/26 , G06F1/3243 , G06F9/5094 , Y02D10/152
摘要： In one embodiment, the present invention includes a method for determining a power budget for a multi-domain processor for a current time interval, determining a portion of the power budget to be allocated to first and second domains of the processor, and controlling a frequency of the domains based on the allocated portions. Such determinations and allocations can be dynamically performed during runtime of the processor. Other embodiments are described and claimed.
摘要翻译： 在一个实施例中，本发明包括一种用于当前时间间隔确定多域处理器的功率预算的方法，确定要分配给处理器的第一和第二域的功率预算的一部分，以及控制频率 基于所分配的部分的域。 这样的确定和分配可以在处理器的运行期间动态地执行。 描述和要求保护其他实施例。
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公开(公告)号：US08707060B2
公开(公告)日：2014-04-22
申请号：US12263431
申请日：2008-10-31
申请人： Efraim Rotem , Doron Rajwan , Lev Finkelstein
发明人： Efraim Rotem , Doron Rajwan , Lev Finkelstein
IPC分类号： G06F1/00
CPC分类号： G06F1/3203 , G06F1/206 , Y02D10/16
摘要： Methods and apparatus relating to deterministic management of dynamic thermal response of processors are described. In one embodiment, available thermal headroom may be used to extract the performance potential in a deterministic way, e.g., such that it reduces or even eliminates the product-to-product variations. Other embodiments are also disclosed and claimed.
摘要翻译： 描述与处理器的动态热响应的确定性管理有关的方法和装置。 在一个实施例中，可用的热余量可用于以确定性方式提取性能潜力，例如使其减少甚至消除产品与产品的变化。 还公开并要求保护其他实施例。
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公开(公告)号：US20130111120A1
公开(公告)日：2013-05-02
申请号：US13282896
申请日：2011-10-27
申请人： Avinash N. Ananthakrishnan , Inder M. Sodhi , Efraim Rotem , Doron Rajwan , Eliezer Wiessman , Ryan Wells
发明人： Avinash N. Ananthakrishnan , Inder M. Sodhi , Efraim Rotem , Doron Rajwan , Eliezer Wiessman , Ryan Wells
CPC分类号： G06F1/324 , G06F1/3203 , G06F1/3293 , G06F1/3296 , G06F13/4068 , G06F13/4282 , G11C7/22 , Y02D10/122 , Y02D10/126 , Y02D10/151
摘要： In one embodiment, the present invention includes a processor having multiple domains including at least a core domain and a non-core domain that is transparent to an operating system (OS). The non-core domain can be controlled by a driver. In turn, the processor further includes a memory interconnect to interconnect the core domain and the non-core domain to a memory coupled to the processor. Still further, a power controller, which may be within the processor, can control a frequency of the memory interconnect based on memory boundedness of a workload being executed on the non-core domain. Other embodiments are described and claimed.
摘要翻译： 在一个实施例中，本发明包括具有多个域的处理器，至少包括对于操作系统（OS）是透明的核心域和非核心域。 非核心域可以由驱动程序控制。 反过来，处理器还包括将核心域和非核心域互连到耦合到处理器的存储器的存储器互连。 此外，可以在处理器内的功率控制器可以基于在非核域上执行的工作负载的存储器有界性来控制存储器互连的频率。 描述和要求保护其他实施例。
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公开(公告)号：US20100115304A1
公开(公告)日：2010-05-06
申请号：US12263421
申请日：2008-10-31
申请人： Lev Finkelstein , Efraim Rotem , Aviad Cohen , Ronny Ronen , Doron Rajwan
发明人： Lev Finkelstein , Efraim Rotem , Aviad Cohen , Ronny Ronen , Doron Rajwan
CPC分类号： G06F1/26 , G06F1/206 , G06F1/3203 , G06F1/324 , G06F1/3296 , Y02D10/126 , Y02D10/16 , Y02D10/172
摘要： Methods and apparatus relating to power management for multiple processor cores are described. In one embodiment, one or more techniques may be utilized locally (e.g., on a per core basis) to manage power consumption in a processor. In another embodiment, power may be distributed among different power planes of a processor based on energy-based considerations. Other embodiments are also disclosed and claimed.
摘要翻译： 描述与多个处理器核心的电源管理相关的方法和装置。 在一个实施例中，本地可以利用一个或多个技术（例如，基于每个核心）来管理处理器中的功率消耗。 在另一个实施例中，功率可以基于能量考虑而分布在处理器的不同功率层之间。 还公开并要求保护其他实施例。
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公开(公告)号：US20190004582A1
公开(公告)日：2019-01-03
申请号：US15635307
申请日：2017-06-28
申请人： Efraim Rotem , Eliezer Weissmann , Doron Rajwan , Nir Rosenzweig , Yoni Aizik
发明人： Efraim Rotem , Eliezer Weissmann , Doron Rajwan , Nir Rosenzweig , Yoni Aizik
IPC分类号： G06F1/32
CPC分类号： G06F1/324 , G06F1/3296
摘要： In one embodiment, a processor includes a plurality of cores, at least two of which may execute redundantly, a configuration register to store a first synchronization domain indicator to indicate that a first core and a second core are associated with a first synchronization domain, and a power controller having a synchronization circuit to cause a dynamic adjustment to a frequency of at least one of the first and second cores to cause these cores to operate at a common frequency, based at least in part on the first synchronization domain indicator. Other embodiments are described and claimed.
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