Organic transistor and manufacturing method thereof, array substrate, display device

    公开(公告)号:US10985320B2

    公开(公告)日:2021-04-20

    申请号:US16484150

    申请日:2018-12-26

    摘要: The present disclosure provides an organic transistor and a manufacturing method thereof, an array substrate, and a display device. The method for manufacturing the organic transistor includes: applying a photoresist on a side of an organic insulating layer; patterning the photoresist to form a confinement well; adding a solution of an organic semiconductor material and an orthogonal solvent to the confinement well; volatilizing the orthogonal solvent by an annealing process to induce directional growth of single crystal of the organic semiconductor material in the confinement well, thereby obtaining an organic single crystal layer; and removing remaining photoresist and using the organic single crystal layer as an active layer. The embodiment of the present disclosure produces an organic single crystal in a flexible display device at a low temperature, and the organic single crystal can be used as an active layer, resulting in an organic transistor having high mobility and stability.

    Manufacturing method of array substrate, array substrate and display device

    公开(公告)号:US10141352B2

    公开(公告)日:2018-11-27

    申请号:US15325402

    申请日:2016-03-09

    IPC分类号: H01L27/12 H01L21/77

    摘要: A manufacturing method of an array substrate is provided. The method includes sequentially depositing a first electrode layer and a gate metal layer on a base substrate, the first electrode layer including at least two conductive layers, formation materials of the at least two conductive layers having different etching rates. The method also includes forming a photoresist layer on the gate metal layer, exposing and developing the photoresist layer using a halftone mask plate, performing a first etching process on the gate metal layer, etching the first electrode layer, and ashing the photoresist layer, performing a second etching process on the gate metal layer by using remaining photoresist layer as a mask, stripping the remaining photoresist layer, and sequentially forming a semiconductor layer, a source and drain electrode layer, a via-hole and a second electrode layer on the gate metal layer on which the second etching process has been performed.