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公开(公告)号：US07014887B1
公开(公告)日：2006-03-21
申请号：US09388989
申请日：1999-09-02
IPC分类号： B05D3/06 , B08B7/00 , C23C14/02 , H05H1/46 , H01L21/3205
CPC分类号： C23C14/022 , B08B7/0035 , H01J37/321 , H01L21/02063 , H01L21/2855 , H01L21/76814 , H01L21/76826 , H01L21/76843
摘要： The present invention generally provides a method for improving fill and electrical performance of metals deposited on patterned dielectric layers. Apertures such as vias and trenches in the patterned dielectric layer are etched to enhance filling and then cleaned in the same chamber to reduce metal oxides within the aperture. The invention also provides cleaning the patterned dielectric layer in a processing chamber with a first plasma consisting essentially of argon, wherein the first plasma is generated by supplying power to a coil surrounding the processing chamber and supplying bias to a substrate support member supporting the substrate, cleaning the patterned dielectric layer in the processing chamber with a second plasma consisting essentially of hydrogen and helium, wherein the second plasma is generated by increasing the supply of power to the coil surrounding the processing chamber and reducing the supply of bias to the substrate support member supporting the substrate, depositing a barrier layer on the patterned dielectric layer after exposing the dielectric layer to the first plasma and the second plasma, and depositing a metal on the barrier layer. Furthermore, the sequential plasma treatments can be practiced in a variety of plasma processing chambers of an integrated process sequence, including pre-clean chambers, physical vapor deposition chambers, etch chambers, and other plasma processing chambers.
摘要翻译： 本发明通常提供了一种改善沉积在图案化电介质层上的金属的填充和电性能的方法。 蚀刻图案化电介质层中诸如过孔和沟槽的孔，以增强填充，然后在相同的室中进行清洗以减少孔内的金属氧化物。 本发明还提供了在具有基本上由氩组成的第一等离子体的处理室中清洁图案化的介电层，其中通过向围绕处理室的线圈供电并且向支撑衬底的衬底支撑构件提供偏压来产生第一等离子体， 用基本上由氢和氦组成的第二等离子体清洁处理室中的图案化电介质层，其中通过增加对处理室周围的线圈的功率供给并减少对衬底支撑构件的偏压供应来产生第二等离子体 支撑衬底，在将介电层暴露于第一等离子体和第二等离子体之后，在图案化的介电层上沉积阻挡层，以及在阻挡层上沉积金属。 此外，顺序等离子体处理可以在包括预清洁室，物理气相沉积室，蚀刻室和其它等离子体处理室的综合工艺顺序的各种等离子体处理室中实施。
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2.发明授权Precleaning process for metal plug that minimizes damage to low-&kgr; dielectric 有权金属插塞的预清洗工艺可最大限度地降低对低kappa电介质的损伤公开(公告)号：US06346489B1
公开(公告)日：2002-02-12
申请号：US09388991
申请日：1999-09-02
IPC分类号： H01L21469
CPC分类号： H01L21/02063 , H01L21/3105 , H01L21/76814
摘要： The invention is a precleaning process suitable for fabricating metal plugs in a low-&kgr;, carbon-containing dielectric. More specifically, the invention is a process for cleaning a contact area of a metal conductor on a semiconductor workpiece so as to minimize damage to a low-&kgr;, carbon-containing dielectric overlying the metal. After forming contact openings in the low-&kgr; dielectric so as to expose contact areas on the underlying metal conductor, the contact areas are cleaned by exposing the workpiece to an atmosphere formed by plasma decomposition of a mixture of hydrogen-containing and helium gases. Surprisingly, our preclean process can repair damage to the dielectric caused by preceding process steps, such as oxygen plasma ashing processes for removing photoresist.
摘要翻译： 本发明是适用于制造低κ，含碳电介质中的金属塞的预清洗方法。 更具体地，本发明是一种用于清洁半导体工件上的金属导体的接触面积的方法，以便使对覆盖金属的低κ，含碳电介质的损伤最小化。 在低k电介质中形成接触开口以暴露下面的金属导体上的接触区域之后，通过将工件暴露于由含氢和氦气的混合物的等离子体分解形成的气氛中来清洁接触区域。 令人惊讶的是，我们的预清洗工艺可以修复由先前的工艺步骤引起的介电损坏，例如用于除去光致抗蚀剂的氧等离子体灰化处理。
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公开(公告)号：US06589890B2
公开(公告)日：2003-07-08
申请号：US10075510
申请日：2002-02-12
IPC分类号： H01L21597
CPC分类号： H01L21/02063 , H01L21/3105 , H01L21/76814
摘要： The invention is a precleaning process suitable for fabricating metal plugs in a low-&kgr;, carbon-containing dielectric. More specifically, the invention is a process for cleaning a contact area of a metal conductor on a semiconductor workpiece so as to minimize damage to a low-&kgr;, carbon-containing dielectric overlying the metal. After forming contact openings in the low-&kgr; dielectric so as to expose contact areas on the underlying metal conductor, the contact areas are cleaned by exposing the workpiece to an atmosphere formed by plasma decomposition of a mixture of hydrogen-containing and helium gases. Surprisingly, our preclean process can repair damage to the dielectric caused by preceding process steps, such as oxygen plasma ashing processes for removing photoresist.
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公开(公告)号：US07053002B2
公开(公告)日：2006-05-30
申请号：US09206027
申请日：1998-12-04
IPC分类号： H01L21/302
CPC分类号： H01L21/76814 , H01L21/31116 , H01L21/76877
摘要： The present invention provides a method and apparatus for precleaning a patterned substrate with a plasma comprising a mixture of argon, helium, and hydrogen. Addition of helium to the gas mixture of argon and hydrogen surprisingly increases the etch rate in comparison to argon/hydrogen mixtures. Etch rates are improved for argon concentrations below about 75% by volume. RF power is capacitively and inductively coupled to the plasma to enhance control of the etch properties. Argon, helium, and hydrogen can be provided as separate gases or as mixtures.
摘要翻译： 本发明提供了一种用包含氩，氦和氢的混合物的等离子体预清洗图案化衬底的方法和装置。 与氩气/氢气混合物相比，向氩气和氢气的气体混合物中添加氦气令人惊奇地增加了蚀刻速率。 对于低于约75体积％的氩浓度，蚀刻速率得到改善。 RF功率是电容性地和电感耦合到等离子体以增强对蚀刻性能的控制。 氩，氦和氢可以作为单独的气体或混合物提供。
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公开(公告)号：US06313042B1
公开(公告)日：2001-11-06
申请号：US09390135
申请日：1999-09-03
申请人： Barney M. Cohen , Jingang Su , Kenny King-Tai Ngan , Jr-Jyan Chen
发明人： Barney M. Cohen , Jingang Su , Kenny King-Tai Ngan , Jr-Jyan Chen
IPC分类号： H01L21302
CPC分类号： H01L21/02063 , H01L21/76814 , H01L21/76843 , H01L21/76844 , Y10S438/906
摘要： A method of cleaning a contact area of a semiconductor or metal region on a substrate of an electronic device. First, the contact area is cleaned by exposing the substrate to a plasma that includes fluorine-containing species. Second, the substrate is exposed to a second atmosphere that scavenges fluorine, preferably formed by plasma decomposition of a hydrogen-containing gas. The second atmosphere removes any fluorine residue remaining on the contact area and overcomes any need to include argon sputtering in the cleaning process. Another aspect of the invention is a method of depositing a refractory metal over a contact area of a semiconductor region on a substrate. The contact area is cleaned according to the two-step process of the preceding paragraph. Then a refractory metal is deposited over the contact area. The two-step cleaning process can reduce the electrical resistance between the refractory metal and the semiconductor region. Furthermore, if the substrate is annealed to interdiffuse atoms of the semiconductor material and the refractory metal, the two-step cleaning process can reduce the anneal temperature required to achieve a desired low electrical resistance.
摘要翻译： 一种清洁电子设备的基板上的半导体或金属区域的接触区域的方法。 首先，通过将衬底暴露于包含含氟物质的等离子体来清洁接触区域。 其次，将基板暴露于清除氟的第二气氛，优选通过含氢气体的等离子体分解形成。 第二个气氛除去残留在接触区域上的任何氟残余物，并且克服了在清洗过程中包括氩气溅射的任何需要。 本发明的另一方面是在基板上的半导体区域的接触区域上沉积难熔金属的方法。 接触面积按前款两步法清洗。 然后在接触区域上沉积难熔金属。 两步清洁工艺可以降低难熔金属和半导体区域之间的电阻。 此外，如果衬底对半导体材料和难熔金属的相互扩散原子退火，则两步清洁工艺可以降低实现期望的低电阻所需的退火温度。
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公开(公告)号：US6110836A
公开(公告)日：2000-08-29
申请号：US298065
申请日：1999-04-22
申请人： Barney M. Cohen , Jingang Su , Kenny King-Tai Ngan
发明人： Barney M. Cohen , Jingang Su , Kenny King-Tai Ngan
IPC分类号： H01L21/302 , H01L21/3065 , H01L21/311 , H01L21/768 , H01L21/00
CPC分类号： H01L21/31116 , H01L21/76804 , H01L21/76814
摘要： Native oxides can be removed from a substrate having high aspect ratio openings therein by using a plasma gas precursor mixture of a reactive halogen-containing gas and a carrier gas such as helium. The lightweight ions generated in the plasma react with oxygen to produce very volatile oxygen-containing species that can be readily removed through the exhaust system of the plasma chamber, preventing re-deposition of oxides on the surface of the substrate or on the sidewalls or bottom of the openings. When the substrate is mounted in a plasma chamber having dual power sources that can form a plasma above the substrate and can apply bias to the substrate, tapered openings are formed rapidly that can be readily filled without forming voids.
摘要翻译： 可以通过使用反应性含卤素气体和诸如氦的载气的等离子体气体前体混合物，从具有高纵横比孔的基底中除去天然氧化物。 在等离子体中产生的轻质离子与氧反应产生非常易挥发的含氧物质，其可以通过等离子体室的排气系统容易地除去，从而防止氧化物在基材表面或侧壁或底部再沉积 的开口。 当基板安装在具有双电源的等离子体室中时，其可以在基板上形成等离子体并且可以向基板施加偏压，所以快速形成锥形开口，其可容易地填充而不形成空隙。
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公开(公告)号：US6077353A
公开(公告)日：2000-06-20
申请号：US88759
申请日：1998-06-02
申请人： Mohamed A. Al-Sharif , Bradley O. Stimson , Debabrata Ghosh , Barney M. Cohen , Kenny King-Tai Ngan , Murali Narasimhan
发明人： Mohamed A. Al-Sharif , Bradley O. Stimson , Debabrata Ghosh , Barney M. Cohen , Kenny King-Tai Ngan , Murali Narasimhan
IPC分类号： H01J37/20 , H01L21/00 , H01L21/302 , H01L21/3065 , H01L21/683 , B05C13/02
CPC分类号： H01L21/67069 , H01J2237/022
摘要： The invention generally provides an apparatus that reduces backside sputtering of the substrate in a pre-clean chamber and other etch chambers. The invention also provides an apparatus that reduces flaking of material from the film formed on the surfaces of the process kit and extends the specified lifetime of a process kit. One aspect of the invention provides an apparatus for supporting a substrate, comprising a support pedestal contacting a central portion of the substrate and an insulator surrounding the support pedestal, the insulator having a beveled portion extending from a circumferential edge of the substrate.
摘要翻译： 本发明通常提供了一种在预清洁室和其它蚀刻室中减少衬底的背面溅射的装置。 本发明还提供了一种减少材料从处理套件表面上形成的膜剥落并延长处理套件规定寿命的装置。 本发明的一个方面提供一种用于支撑衬底的装置，包括接触衬底的中心部分的支撑座和围绕支撑座的绝缘体，绝缘体具有从衬底的周缘延伸的斜面部分。
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8.发明授权Method of improving adhesion of diffusion layers on fluorinated silicon dioxide 有权改善氟化二氧化硅上扩散层粘附性的方法公开(公告)号：US06372301B1
公开(公告)日：2002-04-16
申请号：US09218703
申请日：1998-12-22
IPC分类号： C23C1402
CPC分类号： H01L21/76826 , H01L21/3105 , H01L21/31629 , H01L21/76841
摘要： The present invention generally provides a method for stabilizing a halogen-doped silicon oxide film, particularly a fluorinated silicon oxide film. The invention also provides a method for preventing loosely bonded halogen atoms from reacting with components of the barrier layer during subsequent processing of the substrate. The invention provides a hydrogen plasma treatment of the halogen-doped silicon oxide film without subjecting the substrate to a heated environment that may damage the substrate and the structures formed on the substrate. The invention also improves the adhesion strength between the halogen-doped silicon oxide film and the barrier layer. Furthermore, the hydrogen plasma treatment can be practiced in a variety of plasma processing chambers of an integrated process sequence, including pre-clean chambers, physical vapor deposition chambers, chemical vapor deposition chambers, etch chambers and other plasma processing chambers.
摘要翻译： 本发明通常提供一种稳定卤素掺杂氧化硅膜，特别是氟化氧化硅膜的方法。 本发明还提供一种防止松散键合的卤素原子在随后的衬底加工过程中与阻挡层的组分发生反应的方法。 本发明提供了卤素掺杂氧化硅膜的氢等离子体处理，而不会使基板受到可能损坏基板和形成在基板上的结构的加热环境。 本发明还改善了卤素掺杂氧化硅膜和阻挡层之间的粘合强度。 此外，氢等离子体处理可以在包括预清洁室，物理气相沉积室，化学气相沉积室，蚀刻室和其它等离子体处理室的综合处理顺序的各种等离子体处理室中实施。
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公开(公告)号：US07323230B2
公开(公告)日：2008-01-29
申请号：US10910096
申请日：2004-08-02
申请人： Trung T. Doan , Kenny King-Tai Ngan
发明人： Trung T. Doan , Kenny King-Tai Ngan
CPC分类号： C23C16/20 , C23C16/0227 , C23C16/0272 , C23C16/56
摘要： A coated aluminum component for a substrate processing chamber comprises an aluminum component having a surface; a first aluminum oxide layer formed on the surface of the aluminum component, the aluminum oxide layer having a surface comprising penetrating surface features; and a second aluminum oxide layer on the first aluminum oxide layer, the second aluminum oxide layer substantially completely filling the penetrating surface features of the first aluminum oxide layer. A method of forming the coated aluminum component is also described.
摘要翻译： 用于基板处理室的涂覆铝部件包括具有表面的铝部件; 形成在铝部件的表面上的第一氧化铝层，所述氧化铝层具有包括穿透表面特征的表面; 和在第一氧化铝层上的第二氧化铝层，第二氧化铝层基本上完全填充第一氧化铝层的穿透表面特征。 还描述了形成涂覆的铝组分的方法。
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公开(公告)号：US07006888B2
公开(公告)日：2006-02-28
申请号：US10046954
申请日：2002-01-14
申请人： Hougong Wang , Kenny King-Tai Ngan , Zheng Xu
发明人： Hougong Wang , Kenny King-Tai Ngan , Zheng Xu
IPC分类号： G06F19/00
CPC分类号： H01L21/67184 , H01L21/67201 , H01L21/67745 , Y10T29/41
摘要： Embodiments of the present invention provide a method, article of manufacture, and apparatus for processing semiconductor wafers. The method includes preheating a semiconductor wafer in two types of chambers. In one embodiment, a first preheating chamber is a load lock and a second preheating chamber is a transition chamber. Semiconductor wafer processing systems which can perform embodiments of the method are presented.
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