公开(公告)号：US20190355763A1

公开(公告)日：2019-11-21

申请号：US16476578

申请日：2018-08-27

Applicant: BOE Technology Group Co., Ltd.

Inventor： Jiangbo CHEN ,  Youngsuk SONG ,  Wenjun HOU ,  Lei ZHAO ,  Guoying WANG

IPC: H01L27/12 ,  H01L27/32

Abstract: Provided are an array substrate, a display panel, a display apparatus and a preparation method therefor. The array substrate comprises: a base substrate; and multiple pixel units arranged on one side of the base substrate, each of the pixel units comprising: a thin-film transistor and an electroluminescent structure, and a shading structure located between the thin-film transistor and the base substrate, wherein the thin-film transistor comprises: an active layer located on one side, away from the base substrate, of the shading structure; the electroluminescent structure comprises: first electrodes for driving the pixel units; and one of the shading structure and the active layer is a same-layer structure fabricated by the same mask plate as the first electrodes so as to reduce the number of mask procedures required in preparation of an array substrate.

公开(公告)号：US20160035744A1

公开(公告)日：2016-02-04

申请号：US14421315

申请日：2014-07-03

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Heecheol KIM ,  Youngsuk SONG ,  Seongyeol YOO ,  Seungjin CHOI

IPC: H01L27/12

CPC classification number: H01L27/124 ,  G02F1/1345 ,  G02F1/1362 ,  G02F2001/136254

Abstract: An array substrate and a display device, the array substrate comprises a fan-out area (91), an edge area (93) and a display area (92) for performing display, the fan-out area (91) and the edge area (93) are connected with the display area (92) and located on two non-adjacent sides of the display area (92) respectively; a plurality of wirings (1) are arranged on the array substrate, and the wirings (1) are routed through the display area (92) and extend into the edge area (93), the input end of each wiring (1) is located in the fan-out area (91); pads (2) are configured for the wirings (1) respectively are located on the side far away from the input end of each wiring, and the pads (2) are located in the edge area (93).

Abstract translation: 阵列基板和显示装置，阵列基板包括用于进行显示的扇出区域（91），边缘区域（93）和显示区域（92），扇出区域（91）和边缘区域 （93）分别与显示区域（92）连接并分别位于显示区域（92）的两个非相邻侧面上; 多个布线（1）布置在阵列基板上，并且布线（1）穿过显示区域（92）并延伸到边缘区域（93）中，每个布线（1）的输入端位于 在扇出区域（91）中; 导线（2）分别配置在位于远离每个布线的输入端的一侧的布线（1）上，并且焊盘（2）位于边缘区域（93）中。

公开(公告)号：US20140159022A1

公开(公告)日：2014-06-12

申请号：US14105145

申请日：2013-12-12

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Youngsuk SONG ,  Seongyeol Yoo ,  Seungjin Choi ,  Heecheol Kim

IPC: H01L27/32 ,  H01L51/56

CPC classification number: H01L27/3248 ,  H01L27/3206 ,  H01L27/322 ,  H01L27/3258 ,  H01L27/3272 ,  H01L51/5209 ,  H01L51/5265 ,  H01L51/5271 ,  H01L51/56 ,  H01L2251/5315

Abstract: This invention provides an array substrate, a method for fabricating the same, and an OLED display device, which can solve the technical problem that the existing OLED display device has low luminous efficiency. Each pixel unit of the array substrate comprises: a TFT drive layer; an OLED further away from the substrate than the TFT drive layer and driven by it, the OLED sequentially comprises a first electrode, a light emitting layer, and a transparent second electrode, wherein the first electrode is a reflection layer, or the first electrode is transparent and has a reflection layer disposed thereunder; a transflective layer further away from the substrate than the OLED and forming a microcavity structure with the reflection layer; and a color filter film disposed between the OLED and the transflective layer and located in the microcavity structure. The present invention is particularly suitable for a WOLED display device.

Abstract translation: 本发明提供阵列基板，其制造方法和OLED显示装置，其可以解决现有的OLED显示装置的发光效率低的技术问题。 阵列基板的每个像素单元包括：TFT驱动层; OLED比TFT驱动层更远离OLED驱动的OLED，OLED顺序地包括第一电极，发光层和透明的第二电极，其中第一电极是反射层，或者第一电极是 透明并具有设置在其下面的反射层; 比OLED更远离衬底的半透反射层，并与反射层形成微腔结构; 以及设置在OLED和透反射层之间并且位于微腔结构中的滤色膜。 本发明特别适用于WOLED显示装置。

公开(公告)号：US20140042540A1

公开(公告)日：2014-02-13

申请号：US13964610

申请日：2013-08-12

Applicant: Boe Technology Group Co., Ltd.

Inventor： Seungjin CHOI ,  Seongyeol YOO ,  Youngsuk SONG

IPC: H01L27/12

CPC classification number: H01L27/1214 ,  H01L27/1262 ,  H01L27/1288 ,  H01L29/41733 ,  H01L29/42384 ,  H01L29/78603

Abstract: Disclosed are an array substrate, a method for fabricating the same and a display device. The array substrate comprises: a substrate, a gate electrode, a gate insulating layer as well as an active layer, and a source/drain metal layer formed on the substrate, the source/drain metal layer is configured for forming a source electrode, a drain electrode and a channel region, wherein a region of the S/D metal layer for forming the channel region is at a lower height than other region of the S/D metal layer for forming the source electrode and the drain electrode.

Abstract translation: 公开了阵列基板，其制造方法和显示装置。 阵列基板包括：基板，栅极电极，栅极绝缘层以及有源层，以及形成在基板上的源极/漏极金属层，源极/漏极金属层被构造成用于形成源极， 漏电极和沟道区，其中用于形成沟道区的S / D金属层的区域处于与用于形成源电极和漏电极的S / D金属层的其它区域相比较低的高度。

公开(公告)号：US20190165006A1

公开(公告)日：2019-05-30

申请号：US16322266

申请日：2018-05-04

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Fengjuan LIU ,  Youngsuk SONG ,  Hongda SUN

IPC: H01L27/12 ,  H01L29/417 ,  H01L29/66 ,  H01L29/786

Abstract: Provided are a thin film transistor and manufacturing method therefor, and an array substrate, and a display device. The method includes: forming a source electrode and a drain electrode on a substrate; forming a photoresist layer at the side of the source electrode and the drain electrode away from the substrate; performing exposure and developing treatment on the photoresist layer so as to obtain a photoresist pattern; successively forming a semiconductor layer, a first insulation layer and a conducting layer in sequence on at the side of the photoresist pattern away from the substrate; and removing the photoresist pattern so as to obtain an active layer a gate insulation layer and a gate electrode.

公开(公告)号：US20170207248A1

公开(公告)日：2017-07-20

申请号：US15324791

申请日：2016-04-07

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Hongda SUN ,  Youngsuk SONG ,  Jingang FANG

IPC: H01L27/12 ,  H01L29/45 ,  H01L29/49

CPC classification number: H01L27/1244 ,  H01L27/1262 ,  H01L27/1288 ,  H01L29/45 ,  H01L29/4908 ,  H01L29/66742 ,  H01L29/786

Abstract: The application provides a thin film transistor, a method for manufacturing the thin film transistor, and a display panel, the thin film transistor includes a metal electrode, and a step of forming the metal electrode includes: forming a first material layer on a substrate; performing a pattering process on the first material layer to form a groove pattern in the first material layer such that the groove pattern matches with a pattern of the metal electrode to be formed; forming the metal electrode in the groove pattern such that a gap is formed between an edge of the metal electrode and an edge of the groove pattern; forming a protection pattern on the substrate formed with the metal electrode such that the protection pattern covers the metal electrode and its edge. In the application, the protection pattern is formed on the resultant metal electrode and can effectively protect conductive metal.

公开(公告)号：US20160027817A1

公开(公告)日：2016-01-28

申请号：US14421947

申请日：2014-04-21

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Seongyeol YOO ,  Seungjin CHOI ,  Heecheol KIM ,  Youngsuk SONG

IPC: H01L27/12

CPC classification number: H01L27/1288 ,  H01L27/1225 ,  H01L27/124 ,  H01L27/127

Abstract: Disclosed is an array substrate, a method of manufacturing the same, and a display device. The method of manufacturing an array substrate includes: forming a pattern comprising an active layer, a source, a drain, a data line and a pixel electrode on a base substrate through a single patterning process; forming a pattern of an insulating layer; forming a pattern comprising a gate and a gate line through a single patterning process. In the array substrate, the method of manufacturing the same, and the display device of the present invention, only two patterning processes are required to achieve the fabrication of the array substrate, which has less and simple process steps, thereby reduces the manufacturing complexity and manufacturing cost, and increasing the production efficiency and the economic benefit.

Abstract translation: 公开了一种阵列基板及其制造方法以及显示装置。 制造阵列基板的方法包括：通过单个图案化工艺在基底基板上形成包括有源层，源极，漏极，数据线和像素电极的图案; 形成绝缘层的图案; 通过单个图案化工艺形成包括栅极和栅极线的图案。 在阵列基板中，其制造方法和本发明的显示装置仅需要两个图案化工艺来实现阵列基板的制造，其具有较少且简单的工艺步骤，从而降低了制造复杂度， 制造成本，提高生产效率和经济效益。

公开(公告)号：US20160027812A1

公开(公告)日：2016-01-28

申请号：US14429501

申请日：2014-05-29

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： HeecheoI KIM ,  Youngsuk SONG ,  Seongyeol YOO ,  Seungjin CHOI

IPC: H01L27/12 ,  H01L23/31 ,  H01L23/00 ,  H01L29/66 ,  H01L23/528 ,  H01L21/56 ,  H01L21/441 ,  H01L29/24 ,  H01L23/522 ,  H01L29/786 ,  H01L21/768

CPC classification number: H01L27/1248 ,  H01L21/441 ,  H01L21/56 ,  H01L21/76831 ,  H01L23/3171 ,  H01L23/5226 ,  H01L23/528 ,  H01L24/03 ,  H01L24/05 ,  H01L27/1225 ,  H01L27/124 ,  H01L27/1259 ,  H01L27/1262 ,  H01L29/24 ,  H01L29/41733 ,  H01L29/42384 ,  H01L29/66969 ,  H01L29/78603 ,  H01L29/78636 ,  H01L29/7869 ,  H01L29/78696 ,  H01L2224/08052 ,  H01L2924/13069

Abstract: An array substrate, a method for fabricating the same and a display device are disclosed. The array substrate includes: a gate electrode of a TFT and a gate insulation layer sequentially formed on a base substrate; a semiconductor active layer, an etch stop layer and a source electrode and a drain electrode of the TFT sequentially formed on a part of the gate insulation layer that corresponds to the gate electrode of the TFT, the source and drain electrodes of the TFT are respectively in contact with the semiconductor active layer by way of via holes. The array substrate further includes: a first insulation layer formed between the gate electrode of the TFT and the gate insulation layer and the gate electrode is in contact with the gate insulation layer at a channel region of the TFT between the source electrode and the drain electrode of the TFT.

Abstract translation: 公开了阵列基板，其制造方法和显示装置。 阵列基板包括：TFT的栅极电极和依次形成在基底基板上的栅极绝缘层; TFT的栅极绝缘层的一部分依次形成半导体有源层，蚀刻停止层以及源电极和漏电极，TFT的栅极电极和漏电极分别对应于TFT的栅电极 通过通孔与半导体活性层接触。 阵列基板还包括：形成在TFT的栅电极和栅极绝缘层之间的第一绝缘层和栅极电极在源极电极和漏电极之间的TFT的沟道区域处与栅极绝缘层接触 的TFT。

公开(公告)号：US20160013216A1

公开(公告)日：2016-01-14

申请号：US14852810

申请日：2015-09-14

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Seongyeol YOO ,  Youngsuk SONG ,  Heecheol KIM ,  Seungjin CHOI

IPC: H01L27/12 ,  G02F1/1368 ,  H01L23/31 ,  H01L29/786 ,  H01L29/24 ,  H01L23/522 ,  G02F1/1362 ,  G02F1/1343

CPC classification number: H01L27/1225 ,  G02F1/13439 ,  G02F1/136227 ,  G02F1/136286 ,  G02F1/1368 ,  G02F2001/134372 ,  H01L21/77 ,  H01L23/3171 ,  H01L23/5226 ,  H01L27/124 ,  H01L27/1259 ,  H01L27/127 ,  H01L27/1288 ,  H01L29/24 ,  H01L29/7869 ,  H01L2224/24 ,  H01L2224/73267 ,  H01L2224/82 ,  H01L2224/92244

Abstract: An array substrate, a method of fabricating the same, and a liquid crystal display device are disclosed. The method comprises: sequentially forming a first transparent conductive material layer, an insulation material layer, a semiconductor material layer and a photoresist layer on a substrate base and forming patterns including a gate line, a gate, a gate insulation layer, a semiconductor layer and a first transparent electrode by patterning process; forming a passivation layer and forming a source via and a drain via connected to the semiconductor layer in the passivation layer; sequentially forming a second transparent conductive material layer and a source-drain metal layer and forming patterns including a source, a drain and a second transparent electrode by patterning process, the gate insulation layer is formed only on the gate and the gate line, the source and the drain include stacked second transparent conductive material layer and source-drain metal layer.

Abstract translation: 公开了阵列基板，其制造方法和液晶显示装置。 该方法包括：在衬底上依次形成第一透明导电材料层，绝缘材料层，半导体材料层和光致抗蚀剂层，并形成包括栅极线，栅极，栅绝缘层，半导体层和 通过图案化工艺的第一透明电极; 形成钝化层，并形成连接到钝化层中的半导体层的源极通孔和漏极通孔; 顺序地形成第二透明导电材料层和源极 - 漏极金属层，并且通过图案化工艺形成包括源极，漏极和第二透明电极的图案，栅极绝缘层仅形成在栅极和栅极线上，源极 并且漏极包括层叠的第二透明导电材料层和源极 - 漏极金属层。

公开(公告)号：US20180277685A1

公开(公告)日：2018-09-27

申请号：US15804016

申请日：2017-11-06

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Jiangbo CHEN ,  Youngsuk SONG

IPC: H01L29/786 ,  H01L29/49 ,  H01L29/66 ,  H01L21/44

CPC classification number: H01L29/78618 ,  H01L21/44 ,  H01L27/1225 ,  H01L29/4908 ,  H01L29/66969 ,  H01L29/7869

Abstract: A method for manufacturing a thin film transistor includes: providing a substrate having a first surface and a second surface which are opposed to each other; forming a metal layer on the first surface of the substrate and patterning the metal layer to form a source electrode and a drain electrode; forming a semiconductor layer on the metal layer; forming a first insulating area and a gate electrode on the semiconductor layer; forming a second insulating layer on the semiconductor layer and the gate electrode; and forming a source lead and a drain lead on the second insulating layer, wherein the source lead passes through the second insulating layer and the semiconductor layer and is coupled to the source electrode, and the drain lead passes through the second insulating layer and the semiconductor layer and is coupled to the drain electrode.