Encapsulated semiconductor package including chip paddle and leads
    8.
    发明授权
    Encapsulated semiconductor package including chip paddle and leads 有权
    封装的半导体封装包括芯片桨和引线

    公开(公告)号:US06753597B1

    公开(公告)日:2004-06-22

    申请号:US09687495

    申请日:2000-10-13

    IPC分类号: H01L23495

    摘要: A semiconductor package that can accommodate a larger semiconductor chip while keeping the foot print area afforded to a conventional semiconductor package. The semiconductor package of the present invention also has an improved locking strength between a chip paddle and an encapsulation material. Additionally, the semiconductor chip of the present invention exhibits an improved heat radiation of the semiconductor chip over conventional semiconductor packages. The package of the present invention comprises a semiconductor chip having a plurality of bond pads on its upper surface; a chip paddle bonded to the bottom surface of the semiconductor chip by an adhesive; a plurality of internal leads, each having an etched part at the end facing the chip paddle, which are formed at regular intervals along the perimeter of the chip paddle; conductive wires for electrically connecting the bond pads of the semiconductor chip to the internal leads; and a package body in which the semiconductor chip, the conductive wires, the chip paddle and the internal leads are encapsulated by an encapsulation material while the chip paddle and the internal leads are externally exposed at their side surfaces and bottom surfaces.

    摘要翻译: 半导体封装,其可以容纳更大的半导体芯片,同时保持足部打印面积提供给传统的半导体封装。 本发明的半导体封装还具有改进的芯片焊盘和封装材料之间的锁定强度。 此外,本发明的半导体芯片表现出比常规半导体封装改善了半导体芯片的散热。 本发明的封装包括在其上表面上具有多个接合焊盘的半导体芯片; 通过粘合剂结合到半导体芯片的底表面的芯片焊盘; 多个内部引线,每个内部引线在面向芯片桨的一端具有蚀刻部分,沿着芯片桨的周边以规则的间隔形成; 用于将半导体芯片的接合焊盘电连接到内部引线的导线; 以及封装体,其中半导体芯片,导线,芯片焊盘和内部引线由封装材料封装,而芯片焊盘和内部引线在其侧表面和底表面处外露。