公开(公告)号：US20120183889A1

公开(公告)日：2012-07-19

申请号：US13007242

申请日：2011-01-14

Applicant: Brent A. Anderson ,  Jed H. Rankin ,  Adam C. Smith

Inventor： Brent A. Anderson ,  Jed H. Rankin ,  Adam C. Smith

IPC: G03F1/00 ,  G03B27/42

CPC classification number: G03F7/203 ,  G03F1/68

Abstract: A mask fabrication method can include receiving a mask design, sending first exposure parameters to a first exposure machine, sending second exposure parameters to a second exposure machine, sending a first exposure generation command to the first machine based on the first exposure parameters and sending a second exposure generation command to the second machine based on the second exposure parameters.

Abstract translation: 掩模制造方法可以包括接收掩模设计，将第一曝光参数发送到第一曝光机，向第二曝光机发送第二曝光参数，基于第一曝光参数向第一机器发送第一曝光生成命令，并发送 基于第二曝光参数向第二机器提供第二曝光生成命令。

公开(公告)号：US08609453B2

公开(公告)日：2013-12-17

申请号：US12951601

申请日：2010-11-22

Applicant: Brent A. Anderson ,  Edward J. Nowak ,  Jed H. Rankin

Inventor： Brent A. Anderson ,  Edward J. Nowak ,  Jed H. Rankin

IPC: H01L21/00

CPC classification number: H01L31/186 ,  H01L31/0248 ,  H01L31/068 ,  H01L31/1804 ,  Y02E10/547 ,  Y02P70/521

Abstract: A reusable substrate and method for forming single crystal silicon solar cells are described. A method of forming a photovoltaic cell includes forming an intermediate layer on a monocrystalline silicon substrate, forming a monocrystalline silicon layer on the intermediate layer, and forming electrical features in the monocrystalline silicon layer. The method further includes forming openings in the monocrystalline silicon layer, and detaching the monocrystalline silicon layer from the substrate by selectively etching the intermediate layer through the openings.

Abstract translation: 描述了可重复使用的基板和用于形成单晶硅太阳能电池的方法。 形成光伏电池的方法包括在单晶硅衬底上形成中间层，在中间层上形成单晶硅层，并在单晶硅层中形成电特征。 该方法还包括在单晶硅层中形成开口，并且通过选择性地通过开口蚀刻中间层，从而将单晶硅层从衬底上分离出来。

公开(公告)号：US08445965B2

公开(公告)日：2013-05-21

申请号：US12940115

申请日：2010-11-05

Applicant: Brent A. Anderson ,  Edward J. Nowak ,  Jed H. Rankin

Inventor： Brent A. Anderson ,  Edward J. Nowak ,  Jed H. Rankin

IPC: H01L27/12

CPC classification number: H01L21/84 ,  H01L21/823807 ,  H01L21/823878 ,  H01L27/1203

Abstract: A structure and method of fabricating the structure. The structure includes a first region of a semiconductor substrate separated from a second region of the semiconductor substrate by trench isolation formed in the substrate; a first stressed layer over the first region; a second stressed layer over second region; the first stressed layer and second stressed layer separated by a gap; and a passivation layer on the first and second stressed layers, the passivation layer extending over and sealing the gap.

Abstract translation: 一种制造结构的结构和方法。 该结构包括半导体衬底的第一区域，其通过在衬底中形成的沟槽隔离与半导体衬底的第二区域分离; 第一个区域的第一个应力层; 在第二区域的第二个应力层; 第一应力层和第二应力层由间隙分开; 以及在第一和第二应力层上的钝化层，钝化层延伸并密封间隙。

公开(公告)号：US20130065370A1

公开(公告)日：2013-03-14

申请号：US13229154

申请日：2011-09-09

Applicant: Brent A. Anderson ,  Edward J. Nowak ,  Jed H. Rankin

Inventor： Brent A. Anderson ,  Edward J. Nowak ,  Jed H. Rankin

IPC: H01L21/336

CPC classification number: H01L29/6653 ,  H01L21/28273 ,  H01L29/66825 ,  H01L29/785

Abstract: A method for forming feature on a substrate includes forming at least one layer of a feature material on a substrate, patterning a photolithographic resist material on the at least one layer of the feature material, removing portions of the feature material to define a feature, depositing a masking material layer over the resist material and exposed regions of the substrate, modifying a portion of the substrate, and removing the masking material layer and the resist material.

Abstract translation: 在衬底上形成特征的方法包括在衬底上形成至少一层特征材料，在特征材料的至少一层上图案化光刻抗蚀剂材料，去除特征材料的部分以限定特征，沉积 在抗蚀剂材料上的掩模材料层和衬底的暴露区域，修改衬底的一部分，以及去除掩模材料层和抗蚀剂材料。

公开(公告)号：US08389183B2

公开(公告)日：2013-03-05

申请号：US12702787

申请日：2010-02-09

Applicant: Brent A. Anderson ,  Jed H. Rankin

Inventor： Brent A. Anderson ,  Jed H. Rankin

IPC: G03F1/28 ,  G03F1/29 ,  G03F1/34

CPC classification number: G03F1/29 ,  G03F1/34

Abstract: A phase-shifting photomask with a self aligned undercut rim-shifting element and methods for its manufacture are provided. One embodiment of the invention provides a method of manufacturing a phase-shifting photomask having a self aligned rim-shifting element, the method comprising: applying a patterning film to a first portion of a transparent substrate; etching the substrate to a depth to remove a second portion of the substrate not beneath the patterning film; etching the first portion of the substrate to undercut an area beneath the patterning film; and removing the patterning film, wherein the etched substrate forms a self-aligned undercut rim-shifting element.

Abstract translation: 提供了具有自对准底切边缘移动元件的相移光掩模及其制造方法。 本发明的一个实施例提供了一种制造具有自对准边缘移位元件的相移光掩模的方法，所述方法包括：将图案化膜施加到透明基板的第一部分; 将衬底蚀刻到深度以去除衬底的第二部分而不在图案化膜下方; 蚀刻基板的第一部分以削去图案化膜下方的区域; 并且去除所述图案化膜，其中所述蚀刻的衬底形成自对准底切轮辋移位元件。

公开(公告)号：US20120098066A1

公开(公告)日：2012-04-26

申请号：US12909917

申请日：2010-10-22

Applicant: Brent A. Anderson ,  Edward J. Nowak ,  Jed H. Rankin

Inventor： Brent A. Anderson ,  Edward J. Nowak ,  Jed H. Rankin

IPC: H01L29/786 ,  H01L21/336 ,  H01L21/311

CPC classification number: H01L29/7855 ,  H01L21/3081 ,  H01L29/66795 ,  H01L29/785

Abstract: A method and structure comprise a field effect transistor structure that includes a first rectangular fin structure position on a substrate. The first rectangular fin structure has a bottom contacting the substrate, a top opposite the bottom, and sides between the top and the bottom. The structure additionally includes a second rectangular fin structure position on the substrate. Similarly, the second rectangular fin structure also has a bottom contacting the substrate, a top opposite the bottom, and sides between the top and the bottom. The sides of the second rectangular fin structure are parallel to the sides of the first rectangular fin structure. Further, a trench insulator is positioned on the substrate and is positioned between a side of the first rectangular fin structure and a side of the second rectangular fin structure. Additionally, a gate conductor is positioned on the trench insulator, positioned over the sides and the top of the first rectangular fin structure, and positioned over the sides and the top of the second rectangular fin structure. The gate conductor runs perpendicular to the sides of the first rectangular fin structure and the sides of the second rectangular fin structure. Also, a gate insulator is positioned between the gate conductor and the first rectangular fin structure and between the gate conductor and the second rectangular fin structure. The structure further includes a first cap on the top of the first rectangular fin structure. The first cap separates the gate conductor from the first rectangular fin structure.

Abstract translation: 一种方法和结构包括场效应晶体管结构，其包括在衬底上的第一矩形鳍结构位置。 第一矩形翅片结构具有接触基底的底部，与底部相对的顶部以及顶部和底部之间的边。 该结构还包括在基底上的第二矩形翅片结构位置。 类似地，第二矩形翅片结构还具有接触基底的底部，与底部相对的顶部以及顶部和底部之间的边。 第二矩形翅片结构的侧面平行于第一矩形翅片结构的侧面。 此外，沟槽绝缘体位于衬底上并且位于第一矩形翅片结构的侧面和第二矩形鳍结构的侧面之间。 此外，栅极导体位于沟槽绝缘体上，位于第一矩形翅片结构的侧面和顶部之上，并且位于第二矩形鳍结构的侧面和顶部之上。 栅极导体垂直于第一矩形翅片结构的侧面和第二矩形翅片结构的侧面延伸。 此外，栅极绝缘体位于栅极导体和第一矩形翅片结构之间以及栅极导体和第二矩形鳍结构之间。 该结构还包括在第一矩形翅片结构的顶部上的第一盖。 第一盖将栅极导体与第一矩形鳍结构分开。

公开(公告)号：US08136055B2

公开(公告)日：2012-03-13

申请号：US12182672

申请日：2008-07-30

Applicant: Brent A. Anderson ,  Robert K. Leidy ,  Jed H. Rankin

Inventor： Brent A. Anderson ,  Robert K. Leidy ,  Jed H. Rankin

IPC: G06F17/50

CPC classification number: G03F7/70916 ,  G03F7/70525 ,  G03F7/70741 ,  G03F7/7085 ,  G03F7/70991

Abstract: Systems for real-time contamination, environmental, or physical monitoring of a photomask. The system includes an electronics package physically mounted to the photomask and a processing device in communication with the electronics package. The electronics package includes a sensor configured to monitor the attribute and generate sensor data. The processing device is configured to analyze the sensor data communicated from the electronics package to the processing device.

Abstract translation: 用于光掩模的实时污染，环境或物理监测的系统。 该系统包括物理地安装到光掩模的电子封装以及与电子封装通信的处理装置。 电子组件包括配置成监视属性并生成传感器数据的传感器。 处理装置被配置为分析从电子包装传送到处理装置的传感器数据。

公开(公告)号：US20110279399A1

公开(公告)日：2011-11-17

申请号：US12779994

申请日：2010-05-14

Applicant: Brent A. Anderson ,  Mark D. Jaffe ,  Jed H. Rankin

Inventor： Brent A. Anderson ,  Mark D. Jaffe ,  Jed H. Rankin

IPC: G06F3/045 ,  G06F3/041 ,  G06F3/042 ,  G09G5/00

CPC classification number: G06F3/042 ,  G06F3/041 ,  G06F3/0421 ,  G06F3/044 ,  G06F2203/04109

Abstract: Disclosed herein are embodiments of an interface device (e.g., a display, touchpad, touchscreen display, etc.) with integrated power collection functions. In one embodiment, a solar cell or solar cell array can be located within a substrate at a first surface and an array of interface elements can also be located within the substrate at the first surface such that portions of the solar cell(s) laterally surround the individual interface elements or groups thereof. In another embodiment, a solar cell or solar cell array can be located within the substrate at a first surface and an array of interface elements can be located within the substrate at a second surface opposite the first surface (i.e., opposite the solar cell or solar cell array). In yet another embodiment, an array of diodes, which can function as either solar cells or sensing elements, can be within a substrate at a first surface and can be wired to allow for selective operation in either a power collection mode or sensing mode.

Abstract translation: 这里公开了具有集成的功率收集功能的接口设备（例如，显示器，触摸板，触摸屏显示器等）的实施例。 在一个实施例中，太阳能电池或太阳能电池阵列可以位于第一表面的衬底内，并且界面元件阵列也可以位于第一表面的衬底内，使得太阳能电池的一部分横向包围 各个接口元件或其组合。 在另一个实施例中，太阳能电池或太阳能电池阵列可以位于第一表面的衬底内，并且界面元件的阵列可以位于衬底内的与第一表面相对的第二表面（即，与太阳能电池或太阳能 单元格阵列）。 在另一个实施例中，可以用作太阳能电池或感测元件的二极管阵列可以在第一表面的衬底内，并且可以被布线以允许在电力收集模式或感测模式中的选择性操作。

公开(公告)号：US20110140279A1

公开(公告)日：2011-06-16

申请号：US12638004

申请日：2009-12-15

Applicant: Brent A. Anderson ,  Joseph M. Lukaitis ,  Jed H. Rankin ,  Robert R. Robinson

Inventor： Brent A. Anderson ,  Joseph M. Lukaitis ,  Jed H. Rankin ,  Robert R. Robinson

IPC: H01L23/535 ,  H01L21/768

CPC classification number: H01L23/53295 ,  H01L23/3677 ,  H01L23/5223 ,  H01L23/5227 ,  H01L23/5228 ,  H01L2224/18

Abstract: Disclosed are embodiments of a semiconductor structure that incorporates multiple nitride layers stacked between the center region of a device and a blanket oxide layer. These nitride layers are more thermally conductive than the blanket oxide layer and, thus provide improved heat dissipation away from the device. Also disclosed are embodiments of a method of forming such a semiconductor structure in conjunction with the formation of any of the following nitride layers during standard processing of other devices: a nitride hardmask layer (OP layer), a “sacrificial” nitride layer (SMT layer), a tensile nitride layer (WN layer) and/or a compressive nitride layer (WP layer). Optionally, the embodiments also incorporate incomplete contacts that extend through the blanket oxide layer into one or more of the nitride layers without contacting the device in order to further improve heat dissipation

Abstract translation: 公开了一种半导体结构的实施例，该半导体结构包括堆叠在器件的中心区域和覆盖氧化物层之间的多个氮化物层。 这些氮化物层比覆盖氧化物层更具有导热性，因此提供远离器件的改进的散热。 还公开了在其它器件的标准处理期间结合形成下列氮化物层的方法的一种方法的实施例：氮化物硬掩模层（OP层），“牺牲”氮化物层（SMT层 ），拉伸氮化物层（WN层）和/或压缩氮化物层（WP层）。 可选地，实施例还包括不完全接触，其延伸穿过覆盖层氧化物层到一个或多个氮化物层中，而不接触该器件，以进一步改善散热

公开(公告)号：US20110079828A1

公开(公告)日：2011-04-07

申请号：US12573440

申请日：2009-10-05

Applicant: Brent A. Anderson ,  Edward J. Nowak ,  Jed H. Rankin

Inventor： Brent A. Anderson ,  Edward J. Nowak ,  Jed H. Rankin

IPC: H01L21/28 ,  H01L29/78

CPC classification number: H01L29/4983 ,  H01L21/28079 ,  H01L21/28088 ,  H01L21/28105 ,  H01L21/28114 ,  H01L29/42376 ,  H01L29/495 ,  H01L29/4966 ,  H01L29/517 ,  H01L29/66545 ,  H01L29/78

Abstract: A structure and method to create a metal gate having reduced threshold voltage roll-off. A method includes: forming a gate dielectric material on a substrate; forming a gate electrode material on the gate dielectric material; and altering a first portion of the gate electrode material. The altering causes the first portion of the gate electrode material to have a first work function that is different than a second work function associated with a second portion of the gate electrode material.

Abstract translation: 一种用于产生具有降低的阈值电压滚降的金属栅极的结构和方法。 一种方法包括：在衬底上形成栅极电介质材料; 在所述栅极电介质材料上形成栅电极材料; 以及改变栅电极材料的第一部分。 改变导致栅电极材料的第一部分具有不同于与栅电极材料的第二部分相关联的第二功函数的第一功函数。