公开(公告)号：US06539625B2

公开(公告)日：2003-04-01

申请号：US09759017

申请日：2001-01-11

申请人： Brett H. Engel ,  Mark Hoinkis ,  John A. Miller ,  Soon-Cheon Seo ,  Yun-Yu Wang ,  Kwong Hon Wong

发明人： Brett H. Engel ,  Mark Hoinkis ,  John A. Miller ,  Soon-Cheon Seo ,  Yun-Yu Wang ,  Kwong Hon Wong

IPC分类号： H05K302

CPC分类号： H01L21/76843 ,  H01L21/76846 ,  H01L23/53238 ,  H01L2924/0002 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/49155 ,  Y10T29/49156 ,  Y10T29/49165 ,  H01L2924/00

摘要： In integrated circuits having copper interconnect and low-k interlayer dielectrics, a problem of open circuits after heat treatment was discovered and solved by the use of a first liner layer of Cr, followed by a conformal liner layer of CVD TiN, followed in turn by a final liner layer of Ta or TaN, thus improving adhesion between the via and the underlying copper layer while maintaining low resistance.

公开(公告)号：US06383929B1

公开(公告)日：2002-05-07

申请号：US09759015

申请日：2001-01-11

申请人： Steven H. Boettcher ,  Herbert L. Ho ,  Mark Hoinkis ,  Hyun Koo Lee ,  Yun-Yu Wang ,  Kwong Hon Wong

发明人： Steven H. Boettcher ,  Herbert L. Ho ,  Mark Hoinkis ,  Hyun Koo Lee ,  Yun-Yu Wang ,  Kwong Hon Wong

IPC分类号： H01L2144

CPC分类号： H01L21/76846 ,  H01L21/76858 ,  H01L21/76886 ,  H01L23/53238 ,  H01L2924/0002 ,  H01L2924/3011 ,  H01L2924/00

摘要： In integrated circuits having copper interconnect and low-k interlayer dielectrics, a problem of open circuits after heat treatment was discovered and solved by the use of a first liner layer of Ti, followed by a conformal liner layer of CVD TiN, followed in turn by a final liner layer of Ta or TaN, thus improving adhesion between the via and the underlying copper layer while reducing the increase in resistance caused by alloying between the Ti and the Copper to an acceptable amount.

摘要翻译： 在具有铜互连和低k层间电介质的集成电路中，通过使用第一内衬层Ti，随后是CVD TiN的共形内衬层，然后依次由 Ta或TaN的最终衬垫层，从而改善了通孔和下面的铜层之间的粘附性，同时将Ti和铜之间的合金化引起的电阻增加减少到可接受的量。

公开(公告)号：US06417567B1

公开(公告)日：2002-07-09

申请号：US09482547

申请日：2000-01-13

申请人： Anthony G. Domenicucci ,  Lynne M. Gignac ,  Yun-Yu Wang ,  Horatio S. Wildman ,  Kwong Hon Wong ,  Roy A. Carruthers ,  Christian Lavoie ,  John A. Miller

发明人： Anthony G. Domenicucci ,  Lynne M. Gignac ,  Yun-Yu Wang ,  Horatio S. Wildman ,  Kwong Hon Wong ,  Roy A. Carruthers ,  Christian Lavoie ,  John A. Miller

IPC分类号： H01L2348

CPC分类号： H01L21/76855 ,  H01L21/28518 ,  H01L21/28568 ,  H01L21/3212 ,  H01L21/76856 ,  H01L2221/1078

摘要： A conductive contact having an atomically flat interface. The contact includes, in order, a silicon substrate, a highly disordered silicide layer, and a titanium oxynitride layer. The silicide layer is formed of titanium, silicon, and one of the elements tungsten, tantalum, and molybdenum. The interface between the silicon substrate and the silicide layer is atomically flat. The flat interface prevents diffusion of conductive materials into the underlying silicon substrate. The contact is useful especially for very small devices and shallow junctions, such as are required for ULSI shallow junctions.

摘要翻译： 具有原子平坦界面的导电接触。 接触依次包括硅衬底，高度无序的硅化物层和氮氧化钛层。 硅化物层由钛，硅和元素钨，钽和钼之一形成。 硅衬底和硅化物层之间的界面是原子平坦的。 平面界面防止导电材料扩散到下面的硅衬底中。 该接触对于非常小的器件和浅接头是有用的，例如ULSI浅结点所需的。

公开(公告)号：US6022801A

公开(公告)日：2000-02-08

申请号：US25718

申请日：1998-02-18

申请人： Anthony G. Domenicucci ,  Lynne M. Gignac ,  Yun-Yu Wang ,  Horatio S. Wildman ,  Kwong Hon Wong

发明人： Anthony G. Domenicucci ,  Lynne M. Gignac ,  Yun-Yu Wang ,  Horatio S. Wildman ,  Kwong Hon Wong

IPC分类号： H01L21/28 ,  H01L21/285 ,  H01L21/3205 ,  H01L21/321 ,  H01L21/768 ,  H01L23/52 ,  H01L21/283

CPC分类号： H01L21/76855 ,  H01L21/28518 ,  H01L21/76856 ,  H01L21/28568 ,  H01L21/3212 ,  H01L2221/1078

摘要： A method for forming a conductive contact having an atomically flat interface is disclosed. A layer containing cobalt and titanium is deposited on a silicon substrate and the resulting structure annealed in a nitrogen containing atmosphere at about 500.degree. C. to about 700.degree. C. A conductive material is deposited on top of the structure formed on anneal. A flat interface, which prevents diffusion of conductive materials into the underlying silicon substrate is formed. The method can be used to form contacts for very small devices and shallow junctions, such as are required for ULSI shallow junctions.

摘要翻译： 公开了一种形成具有原子平坦界面的导电接触的方法。 含有钴和钛的层沉积在硅衬底上，所得结构在约500℃至约700℃的含氮气氛中退火。导电材料沉积在退火形成的结构的顶部。 形成了防止导电材料扩散到下面的硅衬底中的平坦界面。 该方法可以用于形成非常小的器件和浅结的接触，例如ULSI浅结所需要的。

公开(公告)号：US6124639A

公开(公告)日：2000-09-26

申请号：US340239

申请日：1999-07-01

申请人： Anthony G. Domenicucci ,  Lynne M. Gignac ,  Yun-Yu Wang ,  Horatio S. Wildman ,  Kwong Hon Wong

发明人： Anthony G. Domenicucci ,  Lynne M. Gignac ,  Yun-Yu Wang ,  Horatio S. Wildman ,  Kwong Hon Wong

IPC分类号： H01L21/28 ,  H01L21/285 ,  H01L21/3205 ,  H01L21/321 ,  H01L21/768 ,  H01L23/52 ,  H01L23/48

CPC分类号： H01L21/76855 ,  H01L21/28518 ,  H01L21/76856 ,  H01L21/28568 ,  H01L21/3212 ,  H01L2221/1078

摘要： A method for forming a conductive contact having an atomically flat interface is disclosed. A layer containing cobalt and titanium is deposited on a silicon substrate and the resulting structure annealed in a nitrogen containing atmosphere at about 500.degree. C. to about 700.degree. C. A conductive material is deposited on top of the structure formed on anneal. A flat interface, which prevents diffusion of conductive materials into the underlying silicon substrate is formed. The method can be used to form contacts for very small devices and shallow junctions, such as are required for ULSI shallow junctions.

摘要翻译： 公开了一种形成具有原子平坦界面的导电接触的方法。 含有钴和钛的层沉积在硅衬底上，所得结构在约500℃至约700℃的含氮气氛中退火。导电材料沉积在退火形成的结构的顶部。 形成了防止导电材料扩散到下面的硅衬底中的平坦界面。 该方法可以用于形成非常小的器件和浅结的接触，例如ULSI浅结所需要的。

公开(公告)号：US20060057844A1

公开(公告)日：2006-03-16

申请号：US10711365

申请日：2004-09-14

申请人： Anthony Domenicucci ,  Bradley Jones ,  Christian Lavoie ,  Robert Purtell ,  Yun Yu Wang ,  Kwong Hon Wong

发明人： Anthony Domenicucci ,  Bradley Jones ,  Christian Lavoie ,  Robert Purtell ,  Yun Yu Wang ,  Kwong Hon Wong

IPC分类号： H01L21/44

CPC分类号： H01L21/28518 ,  H01L29/665

摘要： The present invention provides a method for enhancing uni-directional diffusion of a metal during silicidation by using a metal-containing silicon alloy in conjunction with a first anneal in which two distinct thermal cycles are performed. The first thermal cycle of the first anneal is performed at a temperature that is capable of enhancing the uni-directional diffusion of metal, e.g., Co and/or Ni, into a Si-containing layer. The first thermal cycle causes an amorphous metal-containing silicide to form. The second thermal cycle is performed at a temperature that converts the amorphous metal-containing silicide into a crystallized metal rich silicide that is substantially non-etchable as compared to the metal-containing silicon alloy layer or a pure metal-containing layer. Following the first anneal, a selective etch is performed to remove any unreacted metal-containing alloy layer from the structure. A second anneal is performed to convert the metal rich silicide phase formed by the two thermal cycles of the first anneal into a metal silicide phase that is in its lowest resistance phase. A metal silicide is provided whose thickness is self-limiting.

摘要翻译： 本发明提供了一种通过使用含金属的硅合金与进行两个不同的热循环的第一次退火相结合的方法来增强金属在硅化过程中的单向扩散。 第一退火的第一热循环在能够增强金属例如Co和/或Ni的单向扩散到含Si层中的温度下进行。 第一热循环导致形成含非晶态金属的硅化物。 第二热循环在将含非晶态金属的硅化物转化为与含金属的硅合金层或纯金属含有层相比基本上不可蚀刻的结晶的富含金属的硅化物的温度下进行。 在第一退火之后，执行选择性蚀刻以从结构中除去任何未反应的含金属合金层。 执行第二退火以将由第一退火的两个热循环形成的富金属硅化物相转换成处于其最低电阻相的金属硅化物相。 提供了一种金属硅化物，其厚度是自限制的。

公开(公告)号：US06661097B1

公开(公告)日：2003-12-09

申请号：US10287155

申请日：2002-11-01

申请人： Larry Clevenger ,  Stanley J. Klepeis ,  Hsiao-Ling Lu ,  Jeffrey R. Marino ,  Andrew Herbert Simon ,  Yun-Yu Wang ,  Kwong Hon Wong ,  Chih-Chao Yang

发明人： Larry Clevenger ,  Stanley J. Klepeis ,  Hsiao-Ling Lu ,  Jeffrey R. Marino ,  Andrew Herbert Simon ,  Yun-Yu Wang ,  Kwong Hon Wong ,  Chih-Chao Yang

IPC分类号： H01L2144

CPC分类号： H01L21/76843 ,  H01L21/76846 ,  H01L23/53238 ,  H01L2924/0002 ,  H01L2924/00

摘要： In copper backend integrated circuit technology, advanced technology using low-k organic-based interlayer dielectrics have a problem of carbon contamination that dos not occur in circuits using oxide as dielectric. A composite liner layer for the copper lines uses Ti as the bottom layer, which has the property of gettering carbon and other contaminants. The known problem with Ti of reacting with copper to form a high resistivity compound is avoided by adding a layer of TiN, which isolates the Ti and the copper.

摘要翻译： 在铜后端集成电路技术中，使用低k有机基层间电介质的先进技术具有碳污染的问题，在使用氧化物作为电介质的电路中不会发生这种问题。 用于铜线的复合衬里层使用Ti作为底层，其具有吸除碳和其它污染物的性质。 通过添加一层分离Ti和铜的TiN层，避免了与铜反应形成高电阻率化合物的Ti的已知问题。

公开(公告)号：US06180521B2

公开(公告)日：2001-01-30

申请号：US09225598

申请日：1999-01-06

申请人： Patrick W. DeHaven ,  Anthony G. Domenicucci ,  Lynne M. Gignac ,  Glen L. Miles ,  Prabhat Tiwari ,  Yun-Yu Wang ,  Horatio S. Wildman ,  Kwong Hon Wong

发明人： Patrick W. DeHaven ,  Anthony G. Domenicucci ,  Lynne M. Gignac ,  Glen L. Miles ,  Prabhat Tiwari ,  Yun-Yu Wang ,  Horatio S. Wildman ,  Kwong Hon Wong

IPC分类号： H01L2128

CPC分类号： H01L21/76846 ,  H01L21/28518 ,  H01L21/76855 ,  H01L21/76856 ,  H01L21/76864

摘要： A process for forming a conductive contact having a flat interface. A layer containing niobium and titanium is deposited on a silicon substrate and the resulting structure is annealed in a nitrogen-containing atmosphere at about 500° C. to about 700° C. By this process, a flatter interface between silicide and silicon, which is less likely to cause junction leakage, is formed on annealing. The step of annealing also produces a more uniform bilayer, which is a better barrier against tungsten encroachment during subsequent tungsten deposition. Larger silicide grains are also formed so that fewer grain boundaries are produced, reducing metal diffusion in grain boundaries. The process can be used to form contacts for very small devices and shallow junctions, such as are required for current and future semiconductor devices.

摘要翻译： 一种用于形成具有平坦界面的导电触头的工艺。 将含有铌和钛的层沉积在硅衬底上，所得结构在约500℃至约700℃的含氮气氛中退火。通过该过程，硅化物和硅之间的平坦界面是 在退火时形成不太可能导致结漏电。 退火步骤还产生更均匀的双层，这是在随后的钨沉积期间防止钨侵蚀的更好的屏障。 还形成更大的硅化物晶粒，使得产生更少的晶界，减少晶界中的金属扩散。 该过程可用于形成非常小的器件和浅结的接触，例如当前和未来的半导体器件所需要的。

公开(公告)号：US07208414B2

公开(公告)日：2007-04-24

申请号：US10711365

申请日：2004-09-14

申请人： Anthony G. Domenicucci ,  Bradley P. Jones ,  Christian Lavoie ,  Robert J. Purtell ,  Yun Yu Wang ,  Kwong Hon Wong

发明人： Anthony G. Domenicucci ,  Bradley P. Jones ,  Christian Lavoie ,  Robert J. Purtell ,  Yun Yu Wang ,  Kwong Hon Wong

IPC分类号： H01L21/44

CPC分类号： H01L21/28518 ,  H01L29/665

摘要： The present invention provides a method for enhancing uni-directional diffusion of a metal during silicidation by using a metal-containing silicon alloy in conjunction with a first anneal in which two distinct thermal cycles are performed. The first thermal cycle of the first anneal is performed at a temperature that is capable of enhancing the uni-directional diffusion of metal, e.g., Co and/or Ni, into a Si-containing layer. The first thermal cycle causes an amorphous metal-containing silicide to form. The second thermal cycle is performed at a temperature that converts the amorphous metal-containing silicide into a crystallized metal rich silicide that is substantially non-etchable as compared to the metal-containing silicon alloy layer or a pure metal-containing layer. Following the first anneal, a selective etch is performed to remove any unreacted metal-containing alloy layer from the structure. A second anneal is performed to convert the metal rich silicide phase formed by the two thermal cycles of the first anneal into a metal silicide phase that is in its lowest resistance phase. A metal silicide is provided whose thickness is self-limiting.

摘要翻译： 本发明提供了一种通过使用含金属的硅合金与进行两个不同的热循环的第一次退火相结合的方法来增强金属在硅化过程中的单向扩散。 第一退火的第一热循环在能够增强金属例如Co和/或Ni的单向扩散到含Si层中的温度下进行。 第一热循环导致形成含非晶态金属的硅化物。 第二热循环在将含非晶态金属的硅化物转化为与含金属的硅合金层或纯金属含有层相比基本上不可蚀刻的结晶的富含金属的硅化物的温度下进行。 在第一退火之后，执行选择性蚀刻以从结构中除去任何未反应的含金属合金层。 执行第二退火以将由第一退火的两个热循环形成的富金属硅化物相转换成处于其最低电阻相的金属硅化物相。 提供了一种金属硅化物，其厚度是自限制的。

公开(公告)号：US06509265B1

公开(公告)日：2003-01-21

申请号：US09666240

申请日：2000-09-21

申请人： Patrick W. DeHaven ,  Anthony G. Domenicucci ,  Lynne M. Gignac ,  Glen L. Miles ,  Prabhat Tiwari ,  Yun-Yu Wang ,  Horatio S. Wildman ,  Kwong Hon Wong

发明人： Patrick W. DeHaven ,  Anthony G. Domenicucci ,  Lynne M. Gignac ,  Glen L. Miles ,  Prabhat Tiwari ,  Yun-Yu Wang ,  Horatio S. Wildman ,  Kwong Hon Wong

IPC分类号： H01L214763

CPC分类号： H01L21/76846 ,  H01L21/28518 ,  H01L21/76855 ,  H01L21/76856 ,  H01L21/76864

摘要： A process for forming a conductive contact having a flat interface. A layer containing niobium and titanium is deposited on a silicon substrate and the resulting structure is annealed in a nitrogen-containing atmosphere at about 500° C. to about 700° C. By this process, a flatter interface between silicide and silicon, which is less likely to cause junction leakage, is formed on annealing. The step of annealing also produces a more uniform bilayer, which is a better barrier against tungsten encroachment during subsequent tungsten deposition. Larger silicide grains are also formed so that fewer grain boundaries are produced, reducing metal diffusion in grain boundaries. The process can be used to form contacts for very small devices and shallow junctions, such as are required for current and future semiconductor devices.

摘要翻译： 一种用于形成具有平坦界面的导电触头的工艺。 将含有铌和钛的层沉积在硅衬底上，所得结构在约500℃至约700℃的含氮气氛中退火。通过该过程，硅化物和硅之间的平坦界面是 在退火时形成不太可能导致结漏电。 退火步骤还产生更均匀的双层，这是在随后的钨沉积期间防止钨侵蚀的更好的屏障。 还形成更大的硅化物晶粒，使得产生更少的晶界，减少晶界中的金属扩散。 该过程可用于形成非常小的器件和浅结的接触，例如当前和未来的半导体器件所需要的。