公开(公告)号：US06180521B2

公开(公告)日：2001-01-30

申请号：US09225598

申请日：1999-01-06

申请人： Patrick W. DeHaven ,  Anthony G. Domenicucci ,  Lynne M. Gignac ,  Glen L. Miles ,  Prabhat Tiwari ,  Yun-Yu Wang ,  Horatio S. Wildman ,  Kwong Hon Wong

发明人： Patrick W. DeHaven ,  Anthony G. Domenicucci ,  Lynne M. Gignac ,  Glen L. Miles ,  Prabhat Tiwari ,  Yun-Yu Wang ,  Horatio S. Wildman ,  Kwong Hon Wong

IPC分类号： H01L2128

CPC分类号： H01L21/76846 ,  H01L21/28518 ,  H01L21/76855 ,  H01L21/76856 ,  H01L21/76864

摘要： A process for forming a conductive contact having a flat interface. A layer containing niobium and titanium is deposited on a silicon substrate and the resulting structure is annealed in a nitrogen-containing atmosphere at about 500° C. to about 700° C. By this process, a flatter interface between silicide and silicon, which is less likely to cause junction leakage, is formed on annealing. The step of annealing also produces a more uniform bilayer, which is a better barrier against tungsten encroachment during subsequent tungsten deposition. Larger silicide grains are also formed so that fewer grain boundaries are produced, reducing metal diffusion in grain boundaries. The process can be used to form contacts for very small devices and shallow junctions, such as are required for current and future semiconductor devices.

摘要翻译： 一种用于形成具有平坦界面的导电触头的工艺。 将含有铌和钛的层沉积在硅衬底上，所得结构在约500℃至约700℃的含氮气氛中退火。通过该过程，硅化物和硅之间的平坦界面是 在退火时形成不太可能导致结漏电。 退火步骤还产生更均匀的双层，这是在随后的钨沉积期间防止钨侵蚀的更好的屏障。 还形成更大的硅化物晶粒，使得产生更少的晶界，减少晶界中的金属扩散。 该过程可用于形成非常小的器件和浅结的接触，例如当前和未来的半导体器件所需要的。

公开(公告)号：US06509265B1

公开(公告)日：2003-01-21

申请号：US09666240

申请日：2000-09-21

申请人： Patrick W. DeHaven ,  Anthony G. Domenicucci ,  Lynne M. Gignac ,  Glen L. Miles ,  Prabhat Tiwari ,  Yun-Yu Wang ,  Horatio S. Wildman ,  Kwong Hon Wong

发明人： Patrick W. DeHaven ,  Anthony G. Domenicucci ,  Lynne M. Gignac ,  Glen L. Miles ,  Prabhat Tiwari ,  Yun-Yu Wang ,  Horatio S. Wildman ,  Kwong Hon Wong

IPC分类号： H01L214763

CPC分类号： H01L21/76846 ,  H01L21/28518 ,  H01L21/76855 ,  H01L21/76856 ,  H01L21/76864

摘要： A process for forming a conductive contact having a flat interface. A layer containing niobium and titanium is deposited on a silicon substrate and the resulting structure is annealed in a nitrogen-containing atmosphere at about 500° C. to about 700° C. By this process, a flatter interface between silicide and silicon, which is less likely to cause junction leakage, is formed on annealing. The step of annealing also produces a more uniform bilayer, which is a better barrier against tungsten encroachment during subsequent tungsten deposition. Larger silicide grains are also formed so that fewer grain boundaries are produced, reducing metal diffusion in grain boundaries. The process can be used to form contacts for very small devices and shallow junctions, such as are required for current and future semiconductor devices.

摘要翻译： 一种用于形成具有平坦界面的导电触头的工艺。 将含有铌和钛的层沉积在硅衬底上，所得结构在约500℃至约700℃的含氮气氛中退火。通过该过程，硅化物和硅之间的平坦界面是 在退火时形成不太可能导致结漏电。 退火步骤还产生更均匀的双层，这是在随后的钨沉积期间防止钨侵蚀的更好的屏障。 还形成更大的硅化物晶粒，使得产生更少的晶界，减少晶界中的金属扩散。 该过程可用于形成非常小的器件和浅结的接触，例如当前和未来的半导体器件所需要的。

公开(公告)号：US07407875B2

公开(公告)日：2008-08-05

申请号：US11470349

申请日：2006-09-06

申请人： Keith Kwong Hon Wong ,  Patrick W. DeHaven ,  Sadanand V. Deshpande ,  Anita Madan

发明人： Keith Kwong Hon Wong ,  Patrick W. DeHaven ,  Sadanand V. Deshpande ,  Anita Madan

IPC分类号： H01L21/20 ,  H01L21/44

CPC分类号： H01L21/76846 ,  H01L21/76856

摘要： Embodiments of the present invention provide a method of fabricating a contact structure in a layer of dielectric material between a semiconductor device and a back-end-of-line interconnect. The method includes creating at least one contact opening in said layer of dielectric material; forming a first TiN film through a chemical-vapor deposition process, said first TiN film lining said contact opening; and forming a second TiN film through a physical vapor deposition process, said second TiN film lining said first TiN film. A contact structure fabricated according to embodiments of the invention is also provided.

摘要翻译： 本发明的实施例提供一种在半导体器件和后端串联之间的电介质材料层中制造接触结构的方法。 该方法包括在所述介电材料层中形成至少一个接触开口; 通过化学气相沉积工艺形成第一TiN膜，所述第一TiN膜衬在所述接触开口上; 以及通过物理气相沉积工艺形成第二TiN膜，所述第二TiN膜衬在所述第一TiN膜上。 还提供了根据本发明的实施例制造的接触结构。

公开(公告)号：US06916729B2

公开(公告)日：2005-07-12

申请号：US10409516

申请日：2003-04-08

申请人： Sunfei Fang ,  Keith Kwong Hon Wong ,  Paul D. Agnello ,  Christian Lavoie ,  Lawrence A. Clevenger ,  Chester T. Dziobkowski ,  Richard J. Murphy ,  Patrick W. DeHaven ,  Nivo Rovedo ,  Hsiang-Jen Huang

发明人： Sunfei Fang ,  Keith Kwong Hon Wong ,  Paul D. Agnello ,  Christian Lavoie ,  Lawrence A. Clevenger ,  Chester T. Dziobkowski ,  Richard J. Murphy ,  Patrick W. DeHaven ,  Nivo Rovedo ,  Hsiang-Jen Huang

IPC分类号： H01L21/28 ,  H01L21/283 ,  H01L21/285 ,  H01L21/3205 ,  H01L21/321 ,  H01L21/336 ,  H01L21/44 ,  H01L21/4763 ,  H01L21/8238 ,  H01L27/092 ,  H01L29/78

CPC分类号： H01L29/665 ,  H01L21/28052 ,  H01L21/28518

摘要： A method of forming a salicide on a semiconductor device includes depositing a first refractory metal layer over a silicon region of a substrate, depositing a near-noble metal layer over the first refractory metal layer, and depositing a second refractory metal layer over the near-noble metal layer. The semiconductor device is annealed in a first annealing process to form a silicide layer abutting the doped region of the semiconductor device. Un-reacted portions of the near-noble metal layer and the second refractory metal layer are removed. The device may be annealed in an optional second annealing process to convert the silicide layer to a low resistance phase silicide material. Junction leakage and bridging are minimized or eliminated by embodiments of the present invention, and a smoother silicided surface is achieved.

摘要翻译： 在半导体器件上形成硅化物的方法包括在衬底的硅区域上沉积第一难熔金属层，在第一耐火金属层上沉积近贵金属层，以及在第二耐火金属层的近旁沉积第二难熔金属层， 贵金属层。 半导体器件在第一退火工艺中退火以形成邻接半导体器件的掺杂区域的硅化物层。 除去近贵金属层和第二难熔金属层的未反应部分。 该器件可以在任选的第二退火工艺中进行退火，以将硅化物层转换成低电阻相位硅化物材料。 通过本发明的实施例使结漏电和桥接最小化或消除，并且实现更平滑的硅化表面。

公开(公告)号：US20080054326A1

公开(公告)日：2008-03-06

申请号：US11470349

申请日：2006-09-06

申请人： Keith Kwong Hon Wong ,  Patrick W. DeHaven ,  Sadanand V. Deshpande ,  Anita Madan

发明人： Keith Kwong Hon Wong ,  Patrick W. DeHaven ,  Sadanand V. Deshpande ,  Anita Madan

IPC分类号： H01L29/94 ,  H01L27/108 ,  H01L29/76 ,  H01L31/119

CPC分类号： H01L21/76846 ,  H01L21/76856

摘要： Embodiments of the present invention provide a method of fabricating a contact structure in a layer of dielectric material between a semiconductor device and a back-end-of-line interconnect. The method includes creating at least one contact opening in said layer of dielectric material; forming a first TiN film through a chemical-vapor deposition process, said first TiN film lining said contact opening; and forming a second TiN film through a physical vapor deposition process, said second TiN film lining said first TiN film. A contact structure fabricated according to embodiments of the invention is also provided.

摘要翻译： 本发明的实施例提供一种在半导体器件和后端串联之间的电介质材料层中制造接触结构的方法。 该方法包括在所述介电材料层中形成至少一个接触开口; 通过化学气相沉积工艺形成第一TiN膜，所述第一TiN膜衬在所述接触开口上; 以及通过物理气相沉积工艺形成第二TiN膜，所述第二TiN膜衬在所述第一TiN膜上。 还提供了根据本发明的实施例制造的接触结构。

公开(公告)号：US07223691B2

公开(公告)日：2007-05-29

申请号：US10965031

申请日：2004-10-14

申请人： Cyril Cabral, Jr. ,  Lawrence A. Clevenger ,  Timothy J. Dalton ,  Patrick W. DeHaven ,  Chester T. Dziobkowski ,  Sunfei Fang ,  Terry A. Spooner ,  Tsong-Lin L. Tai ,  Kwong Hon Wong ,  Chin-Chao Yang

发明人： Cyril Cabral, Jr. ,  Lawrence A. Clevenger ,  Timothy J. Dalton ,  Patrick W. DeHaven ,  Chester T. Dziobkowski ,  Sunfei Fang ,  Terry A. Spooner ,  Tsong-Lin L. Tai ,  Kwong Hon Wong ,  Chin-Chao Yang

IPC分类号： H01L21/44

CPC分类号： H01L21/76843 ,  H01L21/76849 ,  H01L21/76867 ,  H01L21/76888

摘要： A novel interlevel contact via structure having low contact resistance and improved reliability, and method of forming the contact via. The method comprises steps of: etching an opening through an interlevel dielectric layer to expose an underlying metal (Copper) layer surface; and, performing a low energy ion implant of an inert gas (Nitrogen) into the exposed metal underneath; and, depositing a refractory liner into the walls and bottom via structure which will have a lower contact resistance due to the presence of the proceeding inert gas implantation. Preferably, the inert Nitrogen gas reacts with the underlying exposed Copper metal to form a thin layer of CuN.

摘要翻译： 具有低接触电阻和改进的可靠性的新颖的层间接触通孔结构以及形成接触通孔的方法。 该方法包括以下步骤：通过层间电介质层蚀刻开口以暴露下面的金属（铜）层表面; 并且将惰性气体（氮气）的低能量离子注入进入下面暴露的金属; 并且将耐火衬垫沉积到壁和底部通孔结构中，由于进行的惰性气体注入的存在而将具有较低的接触电阻。 优选地，惰性氮气与下面暴露的铜金属反应形成一层薄的CuN。

公开(公告)号：US06572982B1

公开(公告)日：2003-06-03

申请号：US09604539

申请日：2000-06-27

申请人： Cyprian E. Uzoh ,  Steven H. Boettcher ,  Patrick W. DeHaven ,  Christopher C. Parks ,  Andrew H. Simon

发明人： Cyprian E. Uzoh ,  Steven H. Boettcher ,  Patrick W. DeHaven ,  Christopher C. Parks ,  Andrew H. Simon

IPC分类号： B32B1504

CPC分类号： C25D5/10 ,  C25D7/123 ,  H01L21/2885 ,  H01L21/76838 ,  H01L21/76877 ,  Y10T428/12535 ,  Y10T428/12646 ,  Y10T428/1291

摘要： An electromigration-resistant copper film structure and the process for forming the structure. The film structure contains a high impurity content, is resistant to grain growth, and possesses superior metallurgical, thermo-mechanical, and electrical properties. The process comprises the steps of: (a) providing a seed layer at least indirectly on a substrate, the seed layer having an exposed surface; (b) immersing the substrate in a plating solution; (c) electrodepositing a copper-containing film on the exposed surface of the seed layer, the copper-containing film having a first surface; (d) maintaining the substrate in an immersed state within the plating solution; (e) electrodepositing a further copper-containing film from the plating solution onto the first surface; (f) removing the substrate from the plating solution; and (g) drying the substrate.

摘要翻译： 一种抗电镀铜膜结构和形成该结构的方法。 膜结构含有高杂质含量，耐晶粒生长，具有优良的冶金，热机械和电学性能。 该方法包括以下步骤：（a）至少间接地在基底上提供种子层，籽晶层具有暴露表面; （b）将基板浸入电镀液中; （c）在种子层的暴露表面上电沉积含铜膜，所述含铜膜具有第一表面; （d）将所述基板保持在所述电镀液中的浸渍状态; （e）将另外的含铜膜从所述电镀溶液电沉积到所述第一表面上; （f）从电镀液中除去基板; 和（g）干燥基材。

公开(公告)号：US6123825A

公开(公告)日：2000-09-26

申请号：US203926

申请日：1998-12-02

申请人： Cyprian E. Uzoh ,  Steven H. Boettcher ,  Patrick W. DeHaven ,  Christopher C. Parks ,  Andrew H. Simon

发明人： Cyprian E. Uzoh ,  Steven H. Boettcher ,  Patrick W. DeHaven ,  Christopher C. Parks ,  Andrew H. Simon

IPC分类号： H01L21/3205 ,  C25D5/10 ,  C25D7/00 ,  C25D7/12 ,  H01L21/288 ,  H01L21/768 ,  H01L23/52 ,  C23C28/00 ,  C23C28/02 ,  C25D5/02 ,  C25D5/34 ,  C25D5/50

CPC分类号： C25D5/10 ,  C25D7/123 ,  H01L21/2885 ,  H01L21/76838 ,  H01L21/76877 ,  Y10T428/12535 ,  Y10T428/12646 ,  Y10T428/1291

摘要： An electromigration-resistant copper film structure and the process for forming the structure. The film structure contains a high impurity content, is resistant to grain growth, and possesses superior metallurgical, thermo-mechanical, and electrical properties. The process comprises the steps of: (a) providing a seed layer at least indirectly on a substrate, the seed layer having an exposed surface; (b) immersing the substrate in a plating solution; (c) electrodepositing a copper-containing film on the exposed surface of the seed layer, the copper-containing film having a first surface; (d) maintaining the substrate in an immersed state within the plating solution; (e) electrodepositing a further copper-containing film from the plating solution onto the first surface; (f) removing the substrate from the plating solution; and (g) drying the substrate.

摘要翻译： 一种抗电镀铜膜结构和形成该结构的方法。 膜结构含有高杂质含量，耐晶粒生长，具有优良的冶金，热机械和电学性能。 该方法包括以下步骤：（a）至少间接地在基底上提供种子层，籽晶层具有暴露表面; （b）将基板浸入电镀液中; （c）在种子层的暴露表面上电沉积含铜膜，所述含铜膜具有第一表面; （d）将所述基板保持在所述电镀液中的浸渍状态; （e）将另外的含铜膜从所述电镀溶液电沉积到所述第一表面上; （f）从电镀液中除去基板; 和（g）干燥基材。

公开(公告)号：US07291516B2

公开(公告)日：2007-11-06

申请号：US11446358

申请日：2006-06-05

申请人： Patrick W. DeHaven ,  David R. Medeiros ,  David B. Mitzi

发明人： Patrick W. DeHaven ,  David R. Medeiros ,  David B. Mitzi

IPC分类号： H01L21/31 ,  H01L51/40 ,  C07F5/00

CPC分类号： H01L51/0003 ,  H01L51/0002 ,  H01L51/0025 ,  H01L51/0077 ,  H01L51/0512 ,  Y10T428/1471

摘要： The present invention provides a process for preparing a melt-processed organic-inorganic hybrid material including the steps of maintaining a solid organic-inorganic hybrid material at a temperature above the melting point but below the decomposition temperature of the organic-inorganic hybrid material for a period of time sufficient to form a uniform melt and thereafter, cooling the uniform melt to an ambient temperature under conditions sufficient to produce the melt-processed organic-inorganic hybrid material.

摘要翻译： 本发明提供一种制备熔融加工的有机 - 无机混合材料的方法，包括以下步骤：将固体有机 - 无机混合材料保持在高于熔点但低于有机 - 无机混合材料的分解温度的温度 足以形成均匀熔体的时间段，然后在足以产生熔融加工的有机 - 无机混合材料的条件下将均匀的熔体冷却至环境温度。

公开(公告)号：US06638374B2

公开(公告)日：2003-10-28

申请号：US10050285

申请日：2002-01-16

申请人： Patrick W. DeHaven ,  Charles C. Goldsmith ,  Jeffery L. Hurd ,  Suryanarayana Kaja ,  Michele S. Legere ,  Eric D. Perfecto

发明人： Patrick W. DeHaven ,  Charles C. Goldsmith ,  Jeffery L. Hurd ,  Suryanarayana Kaja ,  Michele S. Legere ,  Eric D. Perfecto

IPC分类号： B32B1502

CPC分类号： C25D5/50 ,  H05K1/09 ,  H05K3/22 ,  H05K2203/0723 ,  H05K2203/1105 ,  Y10T428/12431 ,  Y10T428/12882 ,  Y10T428/12903

摘要： A process for controlling grain growth in the microstructure of thin metal films (e.g., copper or gold) deposited onto a substrate. In one embodiment, the metal film is deposited onto the substrate to form a film having a fine-grained microstructure. The film is heated in a temperature range of 70-100° C. for at least five minutes, wherein the fine-grained microstructure is converted into a stable large-grained microstructure. In another embodiment, the plated film is stored, after the step of depositing, at a temperature not greater than −20° C., wherein the fine-grained microstructure is stabilized without grain growth for the entire storage period.