公开(公告)号：US06180521B2

公开(公告)日：2001-01-30

申请号：US09225598

申请日：1999-01-06

申请人： Patrick W. DeHaven ,  Anthony G. Domenicucci ,  Lynne M. Gignac ,  Glen L. Miles ,  Prabhat Tiwari ,  Yun-Yu Wang ,  Horatio S. Wildman ,  Kwong Hon Wong

发明人： Patrick W. DeHaven ,  Anthony G. Domenicucci ,  Lynne M. Gignac ,  Glen L. Miles ,  Prabhat Tiwari ,  Yun-Yu Wang ,  Horatio S. Wildman ,  Kwong Hon Wong

IPC分类号： H01L2128

CPC分类号： H01L21/76846 ,  H01L21/28518 ,  H01L21/76855 ,  H01L21/76856 ,  H01L21/76864

摘要： A process for forming a conductive contact having a flat interface. A layer containing niobium and titanium is deposited on a silicon substrate and the resulting structure is annealed in a nitrogen-containing atmosphere at about 500° C. to about 700° C. By this process, a flatter interface between silicide and silicon, which is less likely to cause junction leakage, is formed on annealing. The step of annealing also produces a more uniform bilayer, which is a better barrier against tungsten encroachment during subsequent tungsten deposition. Larger silicide grains are also formed so that fewer grain boundaries are produced, reducing metal diffusion in grain boundaries. The process can be used to form contacts for very small devices and shallow junctions, such as are required for current and future semiconductor devices.

摘要翻译： 一种用于形成具有平坦界面的导电触头的工艺。 将含有铌和钛的层沉积在硅衬底上，所得结构在约500℃至约700℃的含氮气氛中退火。通过该过程，硅化物和硅之间的平坦界面是 在退火时形成不太可能导致结漏电。 退火步骤还产生更均匀的双层，这是在随后的钨沉积期间防止钨侵蚀的更好的屏障。 还形成更大的硅化物晶粒，使得产生更少的晶界，减少晶界中的金属扩散。 该过程可用于形成非常小的器件和浅结的接触，例如当前和未来的半导体器件所需要的。

公开(公告)号：US06509265B1

公开(公告)日：2003-01-21

申请号：US09666240

申请日：2000-09-21

申请人： Patrick W. DeHaven ,  Anthony G. Domenicucci ,  Lynne M. Gignac ,  Glen L. Miles ,  Prabhat Tiwari ,  Yun-Yu Wang ,  Horatio S. Wildman ,  Kwong Hon Wong

发明人： Patrick W. DeHaven ,  Anthony G. Domenicucci ,  Lynne M. Gignac ,  Glen L. Miles ,  Prabhat Tiwari ,  Yun-Yu Wang ,  Horatio S. Wildman ,  Kwong Hon Wong

IPC分类号： H01L214763

CPC分类号： H01L21/76846 ,  H01L21/28518 ,  H01L21/76855 ,  H01L21/76856 ,  H01L21/76864

摘要： A process for forming a conductive contact having a flat interface. A layer containing niobium and titanium is deposited on a silicon substrate and the resulting structure is annealed in a nitrogen-containing atmosphere at about 500° C. to about 700° C. By this process, a flatter interface between silicide and silicon, which is less likely to cause junction leakage, is formed on annealing. The step of annealing also produces a more uniform bilayer, which is a better barrier against tungsten encroachment during subsequent tungsten deposition. Larger silicide grains are also formed so that fewer grain boundaries are produced, reducing metal diffusion in grain boundaries. The process can be used to form contacts for very small devices and shallow junctions, such as are required for current and future semiconductor devices.

摘要翻译： 一种用于形成具有平坦界面的导电触头的工艺。 将含有铌和钛的层沉积在硅衬底上，所得结构在约500℃至约700℃的含氮气氛中退火。通过该过程，硅化物和硅之间的平坦界面是 在退火时形成不太可能导致结漏电。 退火步骤还产生更均匀的双层，这是在随后的钨沉积期间防止钨侵蚀的更好的屏障。 还形成更大的硅化物晶粒，使得产生更少的晶界，减少晶界中的金属扩散。 该过程可用于形成非常小的器件和浅结的接触，例如当前和未来的半导体器件所需要的。

公开(公告)号：US6022801A

公开(公告)日：2000-02-08

申请号：US25718

申请日：1998-02-18

申请人： Anthony G. Domenicucci ,  Lynne M. Gignac ,  Yun-Yu Wang ,  Horatio S. Wildman ,  Kwong Hon Wong

发明人： Anthony G. Domenicucci ,  Lynne M. Gignac ,  Yun-Yu Wang ,  Horatio S. Wildman ,  Kwong Hon Wong

IPC分类号： H01L21/28 ,  H01L21/285 ,  H01L21/3205 ,  H01L21/321 ,  H01L21/768 ,  H01L23/52 ,  H01L21/283

CPC分类号： H01L21/76855 ,  H01L21/28518 ,  H01L21/76856 ,  H01L21/28568 ,  H01L21/3212 ,  H01L2221/1078

摘要： A method for forming a conductive contact having an atomically flat interface is disclosed. A layer containing cobalt and titanium is deposited on a silicon substrate and the resulting structure annealed in a nitrogen containing atmosphere at about 500.degree. C. to about 700.degree. C. A conductive material is deposited on top of the structure formed on anneal. A flat interface, which prevents diffusion of conductive materials into the underlying silicon substrate is formed. The method can be used to form contacts for very small devices and shallow junctions, such as are required for ULSI shallow junctions.

摘要翻译： 公开了一种形成具有原子平坦界面的导电接触的方法。 含有钴和钛的层沉积在硅衬底上，所得结构在约500℃至约700℃的含氮气氛中退火。导电材料沉积在退火形成的结构的顶部。 形成了防止导电材料扩散到下面的硅衬底中的平坦界面。 该方法可以用于形成非常小的器件和浅结的接触，例如ULSI浅结所需要的。

公开(公告)号：US6124639A

公开(公告)日：2000-09-26

申请号：US340239

申请日：1999-07-01

申请人： Anthony G. Domenicucci ,  Lynne M. Gignac ,  Yun-Yu Wang ,  Horatio S. Wildman ,  Kwong Hon Wong

发明人： Anthony G. Domenicucci ,  Lynne M. Gignac ,  Yun-Yu Wang ,  Horatio S. Wildman ,  Kwong Hon Wong

IPC分类号： H01L21/28 ,  H01L21/285 ,  H01L21/3205 ,  H01L21/321 ,  H01L21/768 ,  H01L23/52 ,  H01L23/48

CPC分类号： H01L21/76855 ,  H01L21/28518 ,  H01L21/76856 ,  H01L21/28568 ,  H01L21/3212 ,  H01L2221/1078

摘要： A method for forming a conductive contact having an atomically flat interface is disclosed. A layer containing cobalt and titanium is deposited on a silicon substrate and the resulting structure annealed in a nitrogen containing atmosphere at about 500.degree. C. to about 700.degree. C. A conductive material is deposited on top of the structure formed on anneal. A flat interface, which prevents diffusion of conductive materials into the underlying silicon substrate is formed. The method can be used to form contacts for very small devices and shallow junctions, such as are required for ULSI shallow junctions.

摘要翻译： 公开了一种形成具有原子平坦界面的导电接触的方法。 含有钴和钛的层沉积在硅衬底上，所得结构在约500℃至约700℃的含氮气氛中退火。导电材料沉积在退火形成的结构的顶部。 形成了防止导电材料扩散到下面的硅衬底中的平坦界面。 该方法可以用于形成非常小的器件和浅结的接触，例如ULSI浅结所需要的。

公开(公告)号：US06417567B1

公开(公告)日：2002-07-09

申请号：US09482547

申请日：2000-01-13

申请人： Anthony G. Domenicucci ,  Lynne M. Gignac ,  Yun-Yu Wang ,  Horatio S. Wildman ,  Kwong Hon Wong ,  Roy A. Carruthers ,  Christian Lavoie ,  John A. Miller

发明人： Anthony G. Domenicucci ,  Lynne M. Gignac ,  Yun-Yu Wang ,  Horatio S. Wildman ,  Kwong Hon Wong ,  Roy A. Carruthers ,  Christian Lavoie ,  John A. Miller

IPC分类号： H01L2348

CPC分类号： H01L21/76855 ,  H01L21/28518 ,  H01L21/28568 ,  H01L21/3212 ,  H01L21/76856 ,  H01L2221/1078

摘要： A conductive contact having an atomically flat interface. The contact includes, in order, a silicon substrate, a highly disordered silicide layer, and a titanium oxynitride layer. The silicide layer is formed of titanium, silicon, and one of the elements tungsten, tantalum, and molybdenum. The interface between the silicon substrate and the silicide layer is atomically flat. The flat interface prevents diffusion of conductive materials into the underlying silicon substrate. The contact is useful especially for very small devices and shallow junctions, such as are required for ULSI shallow junctions.

摘要翻译： 具有原子平坦界面的导电接触。 接触依次包括硅衬底，高度无序的硅化物层和氮氧化钛层。 硅化物层由钛，硅和元素钨，钽和钼之一形成。 硅衬底和硅化物层之间的界面是原子平坦的。 平面界面防止导电材料扩散到下面的硅衬底中。 该接触对于非常小的器件和浅接头是有用的，例如ULSI浅结点所需的。

公开(公告)号：US06388327B1

公开(公告)日：2002-05-14

申请号：US09756938

申请日：2001-01-09

申请人： Kenneth J. Giewont ,  Stephen Bruce Brodsky ,  Cyril Cabral, Jr. ,  Anthony G. Domenicucci ,  Craig Mitchell Ransom ,  Yun-Yu Wang ,  Horatio S. Wildman ,  Kwong Hon Wong

发明人： Kenneth J. Giewont ,  Stephen Bruce Brodsky ,  Cyril Cabral, Jr. ,  Anthony G. Domenicucci ,  Craig Mitchell Ransom ,  Yun-Yu Wang ,  Horatio S. Wildman ,  Kwong Hon Wong

IPC分类号： H01L2348

CPC分类号： C23C14/0094 ,  C23C14/0641 ,  H01L21/28052 ,  H01L21/28518 ,  H01L21/2855

摘要： A capping layer for a semiconductor structure is described. The capping layer is deposited over a silicide-forming metal and has a composition such that nitrogen diffusion therefrom is insufficient to cause formation of an oxynitride from an oxide layer on the underlying silicon. The capping layer may be a metal layer from which no N diffusion occurs, or one or more layers including Ti and/or TiN arranged so that N atoms do not reach the oxide layer. A method is also described for forming the Ti and TiN layers. It is advantageous to deposit non-stoichiometric TiN deficient in N, by sputtering from a Ti target in a nitrogen flow insufficient to cause formation of a nitride on the target.

摘要翻译： 描述了半导体结构的覆盖层。 覆盖层沉积在硅化物形成金属上，并且具有使得其中的氮扩散不足以引起下层硅上的氧化物层形成氧氮化物的组成。 覆盖层可以是不发生N扩散的金属层，或者包括Ti和/或TiN的一个或多个层，以使得N原子不到达氧化物层。 还描述了形成Ti和TiN层的方法。 通过在不足以引起目标上形成氮化物的氮气流中从Ti靶溅射而在N中沉积非化学计量的TiN是有利的。

公开(公告)号：US06339007B1

公开(公告)日：2002-01-15

申请号：US09562556

申请日：2000-05-02

申请人： Yun-Yu Wang ,  Rajarao Jammy ,  Lee J. Kimball ,  David E. Kotecki ,  Jenny Lian ,  Chenting Lin ,  John A. Miller ,  Nicholas Nagel ,  Hua Shen ,  Horatio S. Wildman

发明人： Yun-Yu Wang ,  Rajarao Jammy ,  Lee J. Kimball ,  David E. Kotecki ,  Jenny Lian ,  Chenting Lin ,  John A. Miller ,  Nicholas Nagel ,  Hua Shen ,  Horatio S. Wildman

IPC分类号： H01L2120

CPC分类号： H01L28/75 ,  H01L28/55 ,  H01L28/60

摘要： A capacitor structure that comprises a top platinum electrode and a bottom electrode having insulator on the sidewalls of the electrodes, and wherein the bottom electrode is from depositing a first electrode portion being recessed with respect to the insulator on the sidewalls thereof and depositing a second insulator portion is provided.

摘要翻译： 一种电容器结构，其包括顶部铂电极和在电极的侧壁上具有绝缘体的底部电极，并且其中底部电极从沉积相对于绝缘体在其侧壁上凹进的第一电极部分并且沉积第二绝缘体 提供部分。

公开(公告)号：US08368069B2

公开(公告)日：2013-02-05

申请号：US13360270

申请日：2012-01-27

申请人： Terence L. Kane ,  Michael P. Tenney ,  Yun-Yu Wang ,  Keith Kwong Hon Wong

发明人： Terence L. Kane ,  Michael P. Tenney ,  Yun-Yu Wang ,  Keith Kwong Hon Wong

IPC分类号： H01L29/04 ,  H01L31/036

CPC分类号： H01L23/5252 ,  H01L21/76823 ,  H01L21/76843 ,  H01L2924/0002 ,  H01L2924/00

摘要： An antifuse structure and methods of forming contacts within the antifuse structure. The antifuse structure includes a substrate having an overlying metal layer, a dielectric layer formed on an upper surface of the metal layer, and a contact formed of contact material within a contact via etched through the dielectric layer into the metal layer. The contact via includes a metal material at a bottom surface of the contact via and an untreated or partially treated metal precursor on top of the metal material.

公开(公告)号：US07498256B2

公开(公告)日：2009-03-03

申请号：US11465865

申请日：2006-08-21

申请人： Randolph F. Knarr ,  Christopher D. Sheraw ,  Andrew H. Simon ,  Anna Topol ,  Yun-Yu Wang ,  Keith Kwong Hon Wong

发明人： Randolph F. Knarr ,  Christopher D. Sheraw ,  Andrew H. Simon ,  Anna Topol ,  Yun-Yu Wang ,  Keith Kwong Hon Wong

IPC分类号： H01L21/00

CPC分类号： H01L23/485 ,  H01L2924/0002 ,  H01L2924/00

摘要： Contact via structures using a hybrid barrier layer, are disclosed. One contact via structure includes: an opening through a dielectric to a silicide region; a first layer in the opening in direct contact with the silicide region, wherein the first layer is selected from the group consisting of: titanium (Ti) and tungsten nitride (WN); at least one second layer over the first layer, the at least one second layer selected from the group consisting of: tantalum nitride (TaN), titanium nitride (TiN), tantalum (Ta), ruthenium (Ru), rhodium (Rh), platinum (Pt) and cobalt (Co); a seed layer for copper (Cu); and copper (Cu) filling a remaining portion of the opening.

摘要翻译： 公开了通过使用混合阻挡层的结构的接触。 一个接触通孔结构包括：通过电介质到硅化物区的开口; 与所述硅化物区直接接触的所述开口中的第一层，其中所述第一层选自：钛（Ti）和氮化钨（WN）; 在第一层上的至少一个第二层，选自氮化钽（TaN），氮化钛（TiN），钽（Ta），钌（Ru），铑（Rh），铑 铂（Pt）和钴（Co）; 铜（Cu）种子层; 和填充开口的剩余部分的铜（Cu）。

公开(公告)号：US06661097B1

公开(公告)日：2003-12-09

申请号：US10287155

申请日：2002-11-01

申请人： Larry Clevenger ,  Stanley J. Klepeis ,  Hsiao-Ling Lu ,  Jeffrey R. Marino ,  Andrew Herbert Simon ,  Yun-Yu Wang ,  Kwong Hon Wong ,  Chih-Chao Yang

发明人： Larry Clevenger ,  Stanley J. Klepeis ,  Hsiao-Ling Lu ,  Jeffrey R. Marino ,  Andrew Herbert Simon ,  Yun-Yu Wang ,  Kwong Hon Wong ,  Chih-Chao Yang

IPC分类号： H01L2144

CPC分类号： H01L21/76843 ,  H01L21/76846 ,  H01L23/53238 ,  H01L2924/0002 ,  H01L2924/00

摘要： In copper backend integrated circuit technology, advanced technology using low-k organic-based interlayer dielectrics have a problem of carbon contamination that dos not occur in circuits using oxide as dielectric. A composite liner layer for the copper lines uses Ti as the bottom layer, which has the property of gettering carbon and other contaminants. The known problem with Ti of reacting with copper to form a high resistivity compound is avoided by adding a layer of TiN, which isolates the Ti and the copper.

摘要翻译： 在铜后端集成电路技术中，使用低k有机基层间电介质的先进技术具有碳污染的问题，在使用氧化物作为电介质的电路中不会发生这种问题。 用于铜线的复合衬里层使用Ti作为底层，其具有吸除碳和其它污染物的性质。 通过添加一层分离Ti和铜的TiN层，避免了与铜反应形成高电阻率化合物的Ti的已知问题。