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    IN-SITU JITTER TOLERANCE TESTING FOR SERIAL INPUT OUTPUT
    1.
    发明申请
    IN-SITU JITTER TOLERANCE TESTING FOR SERIAL INPUT OUTPUT 有权
    用于串行输入输出的IN-SITU JITTER耐力测试

    公开(公告)号：US20090310728A1

    公开(公告)日：2009-12-17

    申请号：US12139835

    申请日：2008-06-16

    申请人： James E. Jaussi ,  Bryan K. Casper ,  Stephen R. Mooney

    发明人： James E. Jaussi ,  Bryan K. Casper ,  Stephen R. Mooney

    IPC分类号： H04L7/00

    CPC分类号： G01R31/31708 ,  H04L7/033

    摘要： According to some embodiments, a method and apparatus are provided to generate a sine wave via a jitter modulator to modulate a control voltage of a clock source. The jitter modulator is in-situ on a die. The sine wave is received at a clock and data recovery circuit comprising the clock source. The clock and data recovery circuit is in-situ on the die.

    摘要翻译： 根据一些实施例，提供了一种方法和装置，用于经由抖动调制器产生正弦波，以调制时钟源的控制电压。 抖动调制器在芯片上原位置。 在包括时钟源的时钟和数据恢复电路中接收正弦波。 时钟和数据恢复电路就位于芯片上。

    Adaptive equalization using a conditional update sign-sign least mean square algorithm
    2.
    发明授权
    Adaptive equalization using a conditional update sign-sign least mean square algorithm 有权
    使用条件更新符号最小均方算法进行自适应均衡

    公开(公告)号：US07289557B2

    公开(公告)日：2007-10-30

    申请号：US10660228

    申请日：2003-09-10

    申请人： Ganesh Balamurugan ,  Bryan K. Casper ,  James E. Jaussi ,  Stephen R. Mooney

    发明人： Ganesh Balamurugan ,  Bryan K. Casper ,  James E. Jaussi ,  Stephen R. Mooney

    IPC分类号： H03D3/22 ,  H04L27/22

    CPC分类号： H03H21/0043 ,  H03H21/0001 ,  H03H2021/0065 ,  H04L25/03038 ,  H04L25/03885 ,  H04L2025/03477 ,  H04L2025/03617

    摘要： An adaptive equalizer finite impulse response (FIR) filter for high-speed communication channels with modest complexity, where the filter is iteratively updated during a training sequence by a circuit performing the update: h(t+1)= h(t)+μ[sgn{d(t)}−sgn{z(t)−Kd(t)}]sgn{ x(t)}, where h(t) is the filter vector representing the filter taps of the FIR filter, x(t) is the data vector representing present and past samples of the received data x(t), d(t) is the desired data used for training, z(t) is the output of the FIR filter, μ determines the memory or window size of the adaptation, and K is a scale factor taking into account practical limitations of the communication channel, receiver, and equalizer. Furthermore, a procedure and circuit structure is provided for calibrating the scale factor K.

    摘要翻译： 用于具有适度复杂度的高速通信信道的自适应均衡器有限脉冲响应（FIR）滤波器，其中通过执行更新的电路在训练序列期间迭代地更新滤波器：<？in-line-formula description =“In-line 公式“end =”lead“？> h（t + 1）= h（t）+ mu [sgn {d（t）} - t）-Kd（t）}] sgn { x（t）}，<？in-line-formula description =“In-line Formulas”end =“tail”？> OSTYLE =“SINGLE”> h（t）是表示FIR滤波器的滤波器抽头的滤波器向量，x（t）是表示接收数据的当前和过去采样的数据x（t） t），d（t）是用于训练的期望数据，z（t）是FIR滤波器的输出，mu决定适配的存储器或窗口大小，K是考虑到实际限制的比例因子 通信信道，接收机和均衡器。 此外，提供了用于校准比例因子K的过程和电路结构。

    Simultaneous transmission and reception of signals in different frequency bands over a bus line
    4.
    发明授权
    Simultaneous transmission and reception of signals in different frequency bands over a bus line 有权
    在总线上同时发送和接收不同频段的信号

    公开(公告)号：US07177288B2

    公开(公告)日：2007-02-13

    申请号：US09998008

    申请日：2001-11-28

    申请人： Stephen R. Mooney ,  Aaron K. Martin ,  Matthew B. Haycock ,  Bryan K. Casper ,  Shekhar Y. Borkar ,  Joseph T. Kennedy ,  James E. Jaussi

    发明人： Stephen R. Mooney ,  Aaron K. Martin ,  Matthew B. Haycock ,  Bryan K. Casper ,  Shekhar Y. Borkar ,  Joseph T. Kennedy ,  James E. Jaussi

    IPC分类号： H04L5/14

    CPC分类号： H04L5/1423

    摘要： A device includes a bus, a first transmitter connected to the bus and configured to transmit a first signal over the bus in a first frequency band, a second transmitter connected to the bus and configured to transmit a second signal over the bus in a second frequency band at the same time that the first transmitter is transmitting the first signal, a first receiver connected to the bus and configured to receive the first signal transmitted over the bus in the first frequency band, and a second receiver connected to the bus and configured to receive the second signal transmitted over the bus in the second frequency band. The first frequency band and the second frequency band occupy different portions of the frequency spectrum.

    摘要翻译： 一种设备包括总线，连接到总线的第一发射机，并且被配置为在第一频带中通过总线传输第一信号，第二发射器连接到总线并且被配置为以第二频率通过总线发送第二信号 与第一发射机正在发送第一信号的同时，连接到总线并被配置为接收通过总线在第一频带中发送的第一信号的第一接收机和连接到总线的第二接收机，并且被配置为 接收在第二频带中通过总线发送的第二信号。 第一频带和第二频带占据频谱的不同部分。

    Method for minimizing jitter using matched, controlled-delay elements slaved to a closed-loop timing reference
    5.
    发明授权
    Method for minimizing jitter using matched, controlled-delay elements slaved to a closed-loop timing reference 有权
    使用从动到闭环定时参考的匹配的受控延迟元件来最小化抖动的方法

    公开(公告)号：US06774686B2

    公开(公告)日：2004-08-10

    申请号：US09968460

    申请日：2001-09-28

    申请人： Joseph T. Kennedy ,  Bryan K. Casper ,  Stephen R. Mooney ,  Aaron K. Martin

    发明人： Joseph T. Kennedy ,  Bryan K. Casper ,  Stephen R. Mooney ,  Aaron K. Martin

    IPC分类号： H03L706

    CPC分类号： H03L7/0805 ,  H03L7/0812

    摘要： A method for minimizing jitter using substantially matched, controlled, delay elements is disclosed. The method includes generating an internal loop-timing reference, and controlling elements outside of the loop with the internal loop-timing reference generated. In one embodiment the outside elements are substantially identical to those internal to the closed-loop. Controlled delay elements for preconditioning and distributing closed-loop inputs and outputs, using the same control reference used by internal loop elements are disclosed.

    摘要翻译： 公开了一种使用基本匹配的受控延迟元件来最小化抖动的方法。 该方法包括生成内部循环定时参考，以及生成内部循环定时参考，控制环外的元素。 在一个实施例中，外部元件与闭环内部元件基本相同。 公开了用于预调节和分配闭环输入和输出的受控延迟元件，使用与内部环路元件相同的控制参考。

    Voltage margin testing of a transmission line analog signal using a variable offset comparator in a data receiver circuit
    6.
    发明授权
    Voltage margin testing of a transmission line analog signal using a variable offset comparator in a data receiver circuit 失效
    在数据接收器电路中使用可变偏移比较器的传输线模拟信号的电压裕度测试

    公开(公告)号：US06653893B2

    公开(公告)日：2003-11-25

    申请号：US09967666

    申请日：2001-09-28

    申请人： Bryan K. Casper ,  Stephen R. Mooney ,  Matthew B. Haycock

    发明人： Bryan K. Casper ,  Stephen R. Mooney ,  Matthew B. Haycock

    IPC分类号： H03F345

    CPC分类号： H03F3/45183 ,  H03F3/45672 ,  H03F2203/45371

    摘要： A data receiver circuit having a comparator that exhibits substantially variable offset that is controllable to represent a variable reference level, without a separate input to receive a reference voltage level. The comparator output provides an indication of the comparison between a fixed voltage level applied to its differential signal input and the variable reference level. While changing an offset code that is fed to an offset control input of the comparator, and while applying a fixed voltage level that represents a symbol in the transmission line analog signal, a value of the offset code which causes the output of the comparator to change states is captured. A similar process may be repeated for different symbol values that can be transmitted, such that an indication of the voltage margin may be obtained as a difference between two captured offset codes. Circuitry to perform the process may be provided on-chip to the receiver circuit.

    摘要翻译： 一种具有比较器的数据接收器电路，其具有可变的偏移，其可控制以表示可变参考电平，而没有单独的输入以接收参考电压电平。 比较器输出提供了施加到其差分信号输入的固定电压电平与可变参考电平之间的比较的指示。 在改变馈送到比较器的偏移控制输入的偏移代码的同时，在施加表示传输线模拟信号中的符号的固定电压电平的同时，使比较器的输出变化的偏移代码的值 状态被捕获。 可以对可以发送的不同符号值重复类似的过程，使得可以获得电压余量的指示作为两个所捕获的偏移码之间的差。 执行该处理的电路可以片上提供给接收器电路。

    Current mode driver with variable termination
    7.
    发明授权
    Current mode driver with variable termination 有权
    具有可变终端的电流模式驱动器

    公开(公告)号：US06639423B2

    公开(公告)日：2003-10-28

    申请号：US10096546

    申请日：2002-03-12

    申请人： Aaron K. Martin ,  Bryan K. Casper ,  Stephen R. Mooney

    发明人： Aaron K. Martin ,  Bryan K. Casper ,  Stephen R. Mooney

    IPC分类号： H03K1716

    CPC分类号： H03K19/01759 ,  H03K19/0005

    摘要： A simultaneous bidirectional port circuit includes a current mode output driver for driving an output node and a current mode return driver for driving a differential receiver. Variable impedance termination devices are included to provide terminations for both the current mode output driver and current mode return driver. A control circuit and method set the impedance value of the variable impedance termination devices by comparing voltage values at the output of the current mode output driver and current mode return driver.

    摘要翻译： 同时双向端口电路包括用于驱动输出节点的电流模式输出驱动器和用于驱动差分接收器的电流模式返回驱动器。 包括可变阻抗端接装置，为电流模式输出驱动器和电流模式返回驱动器提供终端。 控制电路和方法通过比较电流模式输出驱动器和电流模式返回驱动器的输出端的电压值来设定可变阻抗端接装置的阻抗值。