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1.发明授权Adaptive equalization using a conditional update sign-sign least mean square algorithm 有权使用条件更新符号最小均方算法进行自适应均衡公开(公告)号：US07289557B2
公开(公告)日：2007-10-30
申请号：US10660228
申请日：2003-09-10
CPC分类号： H03H21/0043 , H03H21/0001 , H03H2021/0065 , H04L25/03038 , H04L25/03885 , H04L2025/03477 , H04L2025/03617
摘要： An adaptive equalizer finite impulse response (FIR) filter for high-speed communication channels with modest complexity, where the filter is iteratively updated during a training sequence by a circuit performing the update: h(t+1)= h(t)+μ[sgn{d(t)}−sgn{z(t)−Kd(t)}]sgn{ x(t)}, where h(t) is the filter vector representing the filter taps of the FIR filter, x(t) is the data vector representing present and past samples of the received data x(t), d(t) is the desired data used for training, z(t) is the output of the FIR filter, μ determines the memory or window size of the adaptation, and K is a scale factor taking into account practical limitations of the communication channel, receiver, and equalizer. Furthermore, a procedure and circuit structure is provided for calibrating the scale factor K.
摘要翻译： 用于具有适度复杂度的高速通信信道的自适应均衡器有限脉冲响应（FIR）滤波器，其中通过执行更新的电路在训练序列期间迭代地更新滤波器：<？in-line-formula description =“In-line 公式“end =”lead“？>
h（t + 1）= h（t）+ mu [sgn {d（t）} - t）-Kd（t）}] sgn { x（t）}，<？in-line-formula description =“In-line Formulas”end =“tail”？> OSTYLE =“SINGLE”> h（t）是表示FIR滤波器的滤波器抽头的滤波器向量，x（t）是表示接收数据的当前和过去采样的数据x（t） t），d（t）是用于训练的期望数据，z（t）是FIR滤波器的输出，mu决定适配的存储器或窗口大小，K是考虑到实际限制的比例因子 通信信道，接收机和均衡器。 此外，提供了用于校准比例因子K的过程和电路结构。 -
公开(公告)号：US07286006B2
公开(公告)日：2007-10-23
申请号：US10879417
申请日：2004-06-28
IPC分类号： H03K5/00
CPC分类号： H03H21/0043 , H03H21/0001 , H03H2021/0065
摘要： In some embodiments, an adaptive filter employs two adaptation modes, where during one adaptation mode the adaptive filter is updated only when the received training sample is a first binary value and during the other adaptation mode the adaptive filter is updated only when the received sample is a second binary value. Each adaptation mode provides a set of filter weights, and these two sets of filter weights are averaged to provide an adapted set of filter weights. The use of two adaptation mode allows for a clock boundary in which the digital portion of the filter operates at a lower clock rate than the analog portion. In other embodiments, a filter architecture is described for providing the algebraic signs of the received data samples, important for sign-sign least means square filtering algorithms. In other embodiments, a filter architecture is described in which efficient use is made of voltage-to-current converters so as to achieve a high throughput rate during filtering. Embodiments of the present invention have application to channel equalization.
摘要翻译： 在一些实施例中，自适应滤波器采用两种适应模式，其中在一个自适应模式期间，只有当所接收的训练样本是第一二进制值时才自动滤波器被更新，并且在另一自适应模式期间，仅当所接收的样本是 第二个二进制值。 每个适配模式提供一组滤波器权重，并且将这两组滤波器权重进行平均以提供一组适用的滤波器权重。 使用两个适配模式允许滤波器的数字部分以比模拟部分更低的时钟速率工作的时钟边界。 在其他实施例中，描述了用于提供接收数据样本的代数符号的滤波器架构，对于符号最小均方滤波算法而言是重要的。 在其他实施例中，描述了一种滤波器架构，其中有效地使用电压 - 电流转换器，以便在滤波期间实现高吞吐率。 本发明的实施例具有对信道均衡的应用。
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3.发明授权公开(公告)号：US07529296B2
公开(公告)日：2009-05-05
申请号：US11232492
申请日：2005-09-21
IPC分类号： H03K5/159
CPC分类号： H04L25/03057 , H04L2025/03598 , H04L2025/03681
摘要： In some embodiments disclosed herein, equalizers in a receiver are adapted during normal operation, as they extract bit data from a received bit stream, to account for channel and/or circuit fluctuations.
摘要翻译： 在本文公开的一些实施例中，接收机中的均衡器在正常操作期间被适配，因为它们从接收到的比特流中提取比特数据，以解决信道和/或电路波动。
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公开(公告)号：US07313181B2
公开(公告)日：2007-12-25
申请号：US10660415
申请日：2003-09-10
CPC分类号： H04L25/03038 , H03H21/0001 , H03H2021/0065 , H04L2025/03477
摘要： An adaptive equalizer finite impulse response (FIR) filter for high-speed communication channels with modest complexity, where the filter is iteratively updated during a training sequence by a circuit performing the update: h(t+1)= h(t)+μ[sgn{d(t)}−sgn{z(t)−Kd(t)}]sgn{ x(t)}, where h(t) is the filter vector representing the filter taps of the FIR filter, x(t) is the data vector representing present and past samples of the received data x(t), d(t) is the desired data used for training, z(t) is the output of the FIR filter, μ determines the memory or window size of the adaptation, and K is a scale factor taking into account practical limitations of the communication channel, receiver, and equalizer. Furthermore, a procedure and circuit structure is provided for calibrating the scale factor K.
摘要翻译： 用于具有适度复杂度的高速通信信道的自适应均衡器有限脉冲响应（FIR）滤波器，其中通过执行更新的电路在训练序列期间迭代地更新滤波器：
h（t + 1 ）= h（t）+ mu [sgn {d（t-sgn {z（t）-Kd（t）sgn { x（t）}， 其中 h（t）是表示FIR滤波器的滤波器抽头的滤波器向量， x（t）是表示接收到的当前和过去样本的数据向量 数据x（t），d（t）是用于训练的期望数据，z（t）是FIR滤波器的输出，μ确定适配的存储器或窗口大小，K是考虑到的比例因子 通信信道，接收机和均衡器的实际限制。此外，提供了用于校准比例因子K的过程和电路结构。 -
公开(公告)号：US07275004B2
公开(公告)日：2007-09-25
申请号：US10743349
申请日：2003-12-23
IPC分类号： G06F19/00
CPC分类号： H03K5/19
摘要： An integrated circuit is provided that includes a first port to receive a first signal from a first channel and a first device coupled to the first port to modify a channel response of the first signal received from the first channel. A waveform capture device may be coupled to the first device to capture a waveform of a signal modified by the first device.
摘要翻译： 提供一种集成电路，其包括从第一信道接收第一信号的第一端口和耦合到第一端口的第一设备，以修改从第一信道接收到的第一信号的信道响应。 波形捕获装置可以耦合到第一装置以捕获由第一装置修改的信号的波形。
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公开(公告)号：US09791905B2
公开(公告)日：2017-10-17
申请号：US13995596
申请日：2011-10-28
CPC分类号： G06F1/26 , G06F1/266 , G06F1/3215 , G06F1/324 , G06F1/3265 , G06F1/3278 , G06F1/3296 , G06F13/14 , G09G5/006 , G09G5/18 , G09G2330/021 , Y02D10/126 , Y02D10/153 , Y02D10/157 , Y02D10/172 , Y02D50/20
摘要： Systems and methods of interconnecting devices may include an input/output (IO) interface having one or more clock circuits, a power supply coupled to the one or more clock circuits, and logic to receive a rate adjustment command at the IO interface. The logic may also be configured to adjust a data rate of the IO interface in response to the rate adjustment command, and to adjust an output voltage of the power supply in response to the rate adjustment command.
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7.发明授权Universal IO connector and interface capable of both wired and wireless operation 有权通用IO连接器和能够进行有线和无线操作的接口公开(公告)号：US09312908B2
公开(公告)日：2016-04-12
申请号：US13995592
申请日：2011-11-11
申请人： Stephen R. Mooney , Howard L. Heck , James E. Jaussi , Bryan K. Casper , Debabani Choudhury , Frank T. Hady
发明人： Stephen R. Mooney , Howard L. Heck , James E. Jaussi , Bryan K. Casper , Debabani Choudhury , Frank T. Hady
CPC分类号： H04B1/40 , G06F13/4068 , G06F2213/0042
摘要： Systems and methods of interconnecting devices may include a connector assembly having a substrate, a set of input/output (IO) contacts, an antenna structure and transceiver logic. In one example, the transceiver logic may process one or more IO signals associated with the antenna structure and process one or more IO signals associated with the set of IO contacts.
摘要翻译： 互连设备的系统和方法可以包括具有基板，一组输入/输出（IO）触点，天线结构和收发器逻辑的连接器组件。 在一个示例中，收发器逻辑可以处理与天线结构相关联的一个或多个IO信号并且处理与该组IO触点相关联的一个或多个IO信号。
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公开(公告)号：US20140357128A1
公开(公告)日：2014-12-04
申请号：US13997096
申请日：2011-12-14
CPC分类号： H01R24/64 , H01R12/721 , H01R13/66 , H01R13/6658 , H01R24/28 , H01R24/62 , H01R2107/00
摘要： Methods and systems may include an input/output (IO) interface that has an integrated buffer, a housing and a substrate disposed within the housing. The substrate may include a first side, a second side and a connection edge. The integrated buffer can be coupled to at least one of the first side and the second side of the substrate. A plurality of rows of contacts may be coupled to the first side of the substrate. Each row of contacts can be stacked substantially parallel to the connection edge. The substrate may have power outputs coupled thereto and the integrated buffer can include a voltage regulator that has a supply output coupled to the power outputs.
摘要翻译： 方法和系统可以包括具有集成缓冲器的输入/输出（IO）接口，壳体和设置在壳体内的基板。 衬底可以包括第一侧，第二侧和连接边缘。 集成缓冲器可以耦合到衬底的第一侧和第二侧中的至少一个。 多个触点列可以耦合到衬底的第一侧。 每排触点可以基本上平行于连接边缘堆叠。 衬底可以具有耦合到其上的功率输出，并且集成缓冲器可以包括具有耦合到功率输出的电源输出的电压调节器。
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公开(公告)号：US20140197696A1
公开(公告)日：2014-07-17
申请号：US13995594
申请日：2011-10-17
CPC分类号： G06F13/385 , G06F1/266 , H01H9/54 , H01R13/6658 , Y10T307/74
摘要： Systems and methods of interconnecting devices may include an input/output (IO) connector assembly having a voltage regulator, one or more signaling circuits, a first set of contacts, a second set of contacts connected to the one or more signaling circuits, and logic to receive a configuration command. The logic may also connect the first set of contacts to the voltage regulator if the configuration command corresponds to a first protocol. If the configuration command corresponds to a second protocol, on the other hand, the logic can connect the first set of contacts to the one or more signaling circuits.
摘要翻译： 互连设备的系统和方法可以包括具有电压调节器，一个或多个信令电路，第一组触点，连接到一个或多个信号电路的第二组触点和逻辑电路的输入/输出（IO）连接器组件 接收配置命令。 如果配置命令对应于第一协议，逻辑还可以将第一组触点连接到电压调节器。 如果配置命令对应于第二协议，另一方面，逻辑可以将第一组联系人连接到一个或多个信令电路。
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公开(公告)号：US10089270B2
公开(公告)日：2018-10-02
申请号：US13995594
申请日：2011-10-17
摘要： Systems and methods of interconnecting devices may include an input/output (IO) connector assembly having a voltage regulator, one or more signaling circuits, a first set of contacts, a second set of contacts connected to the one or more signaling circuits, and logic to receive a configuration command. The logic may also connect the first set of contacts to the voltage regulator if the configuration command corresponds to a first protocol. If the configuration command corresponds to a second protocol, on the other hand, the logic can connect the first set of contacts to the one or more signaling circuits.
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