公开(公告)号：US08130351B2

公开(公告)日：2012-03-06

申请号：US11646668

申请日：2006-12-28

申请人： Byoung-Ho Lim ,  Hyun-Kyu Lee ,  Do-Sung Kim ,  Byung-Koo Kang ,  Do-Young Lee ,  Eui-Tae Kim ,  Sang-Wook Park

发明人： Byoung-Ho Lim ,  Hyun-Kyu Lee ,  Do-Sung Kim ,  Byung-Koo Kang ,  Do-Young Lee ,  Eui-Tae Kim ,  Sang-Wook Park

IPC分类号： G02F1/1343 ,  G02F1/13

CPC分类号： G02F1/134363 ,  G02F1/136227 ,  G02F2201/40

摘要： An array substrate for an in-plane switching mode liquid crystal display device includes a substrate, a gate line along a first direction on the substrate, a data line along a second direction and crossing the gate line to define a pixel region, a common line on the substrate, a thin film transistor connected to the gate and data lines, a pixel electrode in the pixel region and connected to the thin film transistor, the pixel electrode including horizontal parts along the first direction, and a common electrode in the pixel region and connected to the common line, the common electrode including horizontal portions along the first direction, wherein the pixel electrode and the common electrode are formed on a same layer.

摘要翻译： 面内切换模式液晶显示装置的阵列基板包括基板，沿着基板的第一方向的栅极线，沿着第二方向的数据线，与栅极线交叉以限定像素区域，公共线 在基板上，连接到栅极和数据线的薄膜晶体管，像素区域中的像素电极并连接到薄膜晶体管，像素电极包括沿着第一方向的水平部分，以及像素区域中的公共电极 并且连接到公共线，所述公共电极包括沿着所述第一方向的水平部分，其中所述像素电极和所述公共电极形成在同一层上。

公开(公告)号：US08253918B2

公开(公告)日：2012-08-28

申请号：US13364884

申请日：2012-02-02

申请人： Byoung-Ho Lim ,  Hyun-Kyu Lee ,  Do-Sung Kim ,  Byung-Koo Kang ,  Do-Young Lee ,  Eui-Tae Kim ,  Sang-Wook Park

发明人： Byoung-Ho Lim ,  Hyun-Kyu Lee ,  Do-Sung Kim ,  Byung-Koo Kang ,  Do-Young Lee ,  Eui-Tae Kim ,  Sang-Wook Park

IPC分类号： G02F1/1343 ,  G02F1/13

CPC分类号： G02F1/134363 ,  G02F1/136227 ,  G02F2201/40

摘要： An array substrate for an in-plane switching mode liquid crystal display device includes a substrate, a gate line along a first direction on the substrate, a data line along a second direction and crossing the gate line to define a pixel region, a common line on the substrate, a thin film transistor connected to the gate and data lines, a pixel electrode in the pixel region and connected to the thin film transistor, the pixel electrode including horizontal parts along the first direction, and a common electrode in the pixel region and connected to the common line, the common electrode including horizontal portions along the first direction, wherein the pixel electrode and the common electrode are formed on a same layer.

公开(公告)号：US20070153206A1

公开(公告)日：2007-07-05

申请号：US11646668

申请日：2006-12-28

申请人： Byoung-Ho Lim ,  Hyun-Kyu Lee ,  Do-Sung Kim ,  Byung-Koo Kang ,  Do-Young Lee ,  Eui-Tae Kim ,  Sang-Wook Park

发明人： Byoung-Ho Lim ,  Hyun-Kyu Lee ,  Do-Sung Kim ,  Byung-Koo Kang ,  Do-Young Lee ,  Eui-Tae Kim ,  Sang-Wook Park

IPC分类号： G02F1/1343

CPC分类号： G02F1/134363 ,  G02F1/136227 ,  G02F2201/40

摘要： A backlight is provided. The backlight unit includes a bottom frame having a topside and a backside. At least one lamp is disposed on the topside of the bottom frame. A socket connector is disposed on a backside of the bottom frame. The socket connector is connected to the fluorescent lamp. A backlight circuit board having a plug connector is connected to the socket connector.

摘要翻译： 提供背光。 背光单元包括具有顶侧和背面的底框架。 至少一个灯被设置在底部框架的顶侧上。 插座连接器设置在底框架的背面。 插座连接器连接到荧光灯。 具有插头连接器的背光电路板连接到插座连接器。

公开(公告)号：US20070153203A1

公开(公告)日：2007-07-05

申请号：US11643794

申请日：2006-12-22

申请人： Eui-Tae Kim ,  Byoung-Ho Lim ,  Hyun-Kyu Lee ,  Sang-Wook Park

发明人： Eui-Tae Kim ,  Byoung-Ho Lim ,  Hyun-Kyu Lee ,  Sang-Wook Park

IPC分类号： G02F1/1343

CPC分类号： G02F1/13439 ,  G02F2001/134372 ,  G02F2001/13629

摘要： An array substrate for an in-plane switching mode liquid crystal display device includes a substrate, a gate line along a first direction on the substrate, a data line along a second direction and crossing the gate line to define a pixel region, a thin film transistor connected to the gate and data lines, a pixel electrode in the pixel region and connected to the thin film transistor, and a common electrode in the pixel region and arranged in an alternating pattern with the pixel electrode, wherein each of the pixel electrode and the common electrode includes a transparent conductive pattern, and one of the pixel electrode and the common electrode further includes an opaque conductive pattern having a more narrow width than the transparent conductive pattern.

摘要翻译： 面内切换模式液晶显示装置的阵列基板包括基板，沿着基板的第一方向的栅极线，沿着第二方向的数据线，与栅极线交叉以限定像素区域，薄膜 连接到栅极和数据线的晶体管，像素区域中的像素电极并连接到薄膜晶体管，以及像素区域中的公共电极，并且与像素电极交替排列，其中每个像素电极和 公共电极包括透明导电图案，并且像素电极和公共电极中的一个还包括具有比透明导电图案更窄的宽度的不透明导电图案。

公开(公告)号：US07652738B2

公开(公告)日：2010-01-26

申请号：US11643794

申请日：2006-12-22

申请人： Eui-Tae Kim ,  Byoung-Ho Lim ,  Hyun-Kyu Lee ,  Sang-Wook Park

发明人： Eui-Tae Kim ,  Byoung-Ho Lim ,  Hyun-Kyu Lee ,  Sang-Wook Park

IPC分类号： G02F1/1343 ,  G02F1/1333

CPC分类号： G02F1/13439 ,  G02F2001/134372 ,  G02F2001/13629

摘要： An array substrate for an in-plane switching mode liquid crystal display device includes a substrate, a gate line along a first direction on the substrate, a data line along a second direction and crossing the gate line to define a pixel region, a thin film transistor connected to the gate and data lines, a pixel electrode in the pixel region and connected to the thin film transistor, and a common electrode in the pixel region and arranged in an alternating pattern with the pixel electrode, wherein each of the pixel electrode and the common electrode includes a transparent conductive pattern, and one of the pixel electrode and the common electrode further includes an opaque conductive pattern having a more narrow width than the transparent conductive pattern.

摘要翻译： 面内切换模式液晶显示装置的阵列基板包括基板，沿着基板的第一方向的栅极线，沿着第二方向的数据线，与栅极线交叉以限定像素区域，薄膜 连接到栅极和数据线的晶体管，像素区域中的像素电极并连接到薄膜晶体管，以及像素区域中的公共电极，并且与像素电极交替排列，其中每个像素电极和 公共电极包括透明导电图案，并且像素电极和公共电极中的一个还包括具有比透明导电图案更窄的宽度的不透明导电图案。

公开(公告)号：US07561236B2

公开(公告)日：2009-07-14

申请号：US11642881

申请日：2006-12-21

申请人： Sang-Wook Park ,  Byoung-Ho Lim

发明人： Sang-Wook Park ,  Byoung-Ho Lim

IPC分类号： G02F1/1343

CPC分类号： G02F1/134363 ,  G02F1/1362

摘要： A method of fabricating an array substrate for an IPS mode LCD device includes: forming a common electrode using a double layer of a transparent material layer and an opaque material layer, the common electrode including a first transparent conductive material; forming source and drain electrodes on an ohmic contact layer and a data line connected to the source electrode, the source and drain electrodes being spaced apart from each other; forming a passivation layer on the source and drain electrodes and the data line, the passivation layer including a drain contact hole exposing the drain electrode; and forming a pixel electrode on the passivation layer, the pixel electrode including a second transparent conductive material and being formed in an alternating pattern with the common electrode.

摘要翻译： 制造IPS模式LCD器件的阵列基板的方法包括：使用双层透明材料层和不透明材料层形成公共电极，所述公共电极包括第一透明导电材料; 在欧姆接触层和连接到源电极的数据线上形成源极和漏极，源极和漏极彼此间隔开; 在源极和漏极以及数据线上形成钝化层，钝化层包括暴露漏电极的漏极接触孔; 以及在所述钝化层上形成像素电极，所述像素电极包括第二透明导电材料并以与所述公共电极交替的图案形成。

公开(公告)号：US20070146605A1

公开(公告)日：2007-06-28

申请号：US11642881

申请日：2006-12-21

申请人： Sang-Wook Park ,  Byoung-Ho Lim

发明人： Sang-Wook Park ,  Byoung-Ho Lim

IPC分类号： G02F1/1343

CPC分类号： G02F1/134363 ,  G02F1/1362

摘要： A method of fabricating an array substrate for an IPS mode LCD device includes: forming a common electrode using a double layer of a transparent material layer and an opaque material layer, the common electrode including a first transparent conductive material; forming source and drain electrodes on an ohmic contact layer and a data line connected to the source electrode, the source and drain electrodes being spaced apart from each other; forming a passivation layer on the source and drain electrodes and the data line, the passivation layer including a drain contact hole exposing the drain electrode; and forming a pixel electrode on the passivation layer, the pixel electrode including a second transparent conductive material and being formed in an alternating pattern with the common electrode.

摘要翻译： 制造IPS模式LCD器件的阵列基板的方法包括：使用双层透明材料层和不透明材料层形成公共电极，所述公共电极包括第一透明导电材料; 在欧姆接触层和连接到源电极的数据线上形成源极和漏极，源极和漏极彼此间隔开; 在源极和漏极以及数据线上形成钝化层，钝化层包括暴露漏电极的漏极接触孔; 以及在所述钝化层上形成像素电极，所述像素电极包括第二透明导电材料并以与所述公共电极交替的图案形成。

公开(公告)号：US08552546B2

公开(公告)日：2013-10-08

申请号：US12896091

申请日：2010-10-01

申请人： In-Sang Song ,  Seok-Keun Lim ,  In-Wook Jung ,  Bong-Ken Yu ,  Sang-Wook Park ,  Ji-Seok Hong

发明人： In-Sang Song ,  Seok-Keun Lim ,  In-Wook Jung ,  Bong-Ken Yu ,  Sang-Wook Park ,  Ji-Seok Hong

IPC分类号： H01L23/48 ,  H01L23/52

CPC分类号： H01L25/0657 ,  H01L23/16 ,  H01L23/3121 ,  H01L23/481 ,  H01L24/05 ,  H01L24/29 ,  H01L24/32 ,  H01L24/33 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/83 ,  H01L25/50 ,  H01L2224/04042 ,  H01L2224/05556 ,  H01L2224/05599 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48145 ,  H01L2224/48147 ,  H01L2224/48227 ,  H01L2224/48465 ,  H01L2224/49111 ,  H01L2224/49175 ,  H01L2224/73265 ,  H01L2224/83191 ,  H01L2224/838 ,  H01L2224/85399 ,  H01L2224/92 ,  H01L2224/92247 ,  H01L2225/06506 ,  H01L2225/0651 ,  H01L2225/06541 ,  H01L2225/06562 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01014 ,  H01L2924/01033 ,  H01L2924/01055 ,  H01L2924/078 ,  H01L2924/10158 ,  H01L2924/12041 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/181 ,  H01L2224/45099 ,  H01L2924/00 ,  H01L2924/3512 ,  H01L2924/00012

摘要： Provided is a semiconductor package. The semiconductor package may include a first semiconductor package having first semiconductor chips sequentially stacked on a substrate. In example embodiments, the first semiconductor chips may have a cascaded arrangement in which first sides and second sides of the semiconductor chips define cascade patterns. The cascaded arrangement may extend in a first direction to define a space between the first sides of the first semiconductor chips and the substrate. The semiconductor package may also include at least one first connection wiring at the second sides of the semiconductor chips, the at least one first connection wiring being configured to electrically connect the substrate with the first semiconductor chips. In addition, the semiconductor package may further include a first filling auxiliary structure adjacent to the first sides of the first semiconductor chips.

摘要翻译： 提供半导体封装。 半导体封装可以包括具有顺序地堆叠在衬底上的第一半导体芯片的第一半导体封装。 在示例性实施例中，第一半导体芯片可以具有级联布置，其中半导体芯片的第一侧和第二侧限定级联图案。 级联布置可以在第一方向上延伸以限定第一半导体芯片的第一侧和基板之间的空间。 半导体封装还可以包括在半导体芯片的第二面处的至少一个第一连接布线，所述至少一个第一连接布线被配置为将衬底与第一半导体芯片电连接。 此外，半导体封装还可以包括与第一半导体芯片的第一侧相邻的第一填充辅助结构。

公开(公告)号：US08317056B2

公开(公告)日：2012-11-27

申请号：US11777155

申请日：2007-07-12

申请人： Dai-Gil Lee ,  Sang-Wook Park ,  Byung-Chul Kim ,  Seong-su Kim

发明人： Dai-Gil Lee ,  Sang-Wook Park ,  Byung-Chul Kim ,  Seong-su Kim

IPC分类号： F17C1/06 ,  F17C1/00 ,  F17C3/00 ,  F17C13/00

CPC分类号： F17C13/001 ,  F17C2203/0304 ,  F17C2203/0329 ,  F17C2203/0345 ,  F17C2203/035 ,  F17C2203/0358 ,  F17C2203/0643 ,  F17C2209/227 ,  F17C2221/033 ,  F17C2260/011 ,  F17C2270/01 ,  Y10T29/49616

摘要： A structure and method for bonding heat-insulating protection walls of a liquefied natural gas carrier is provided. Each of the heat-insulating protection walls is formed of an insulation foam layer and a fiber-reinforced composite reinforcing sheet attached to a surface of the insulation foam layer. The heat-insulating protection walls are provided in a tank of the liquefied natural gas carrier in a mutually adjoining relationship and bonded to one another at a junction to keep the tank cold. The structure includes a fiber-reinforced composite joint sheet positioned in alignment with the juncture of the heat-insulating protection walls and bonded to the fiber-reinforced composite reinforcing sheet by an adhesive agent and a spacer interposed between the fiber-reinforced composite reinforcing sheet and the fiber-reinforced composite joint sheet for keeping the adhesive agent uniform in thickness.

摘要翻译： 提供了一种用于粘合液化天然气载体的隔热保护壁的结构和方法。 每个绝热保护壁由绝缘泡沫层和附着在绝缘泡沫层的表面上的纤维增强复合增强片形成。 隔热保护壁以相互邻接的关系设置在液化天然气载体的槽中，并且在连接处彼此粘合以保持冷藏。 该结构包括与隔热保护壁的接合部对准的纤维增强复合接合片，并通过粘合剂与间隔开的纤维增强复合增强片粘贴，纤维增强复合增强片与纤维增强复合增强片 用于保持粘合剂厚度均匀的纤维增强复合接合片。

公开(公告)号：US08022517B2

公开(公告)日：2011-09-20

申请号：US12266765

申请日：2008-11-07

申请人： Sung-Hwan Yoon ,  Sang-Wook Park ,  Min-Young Son

发明人： Sung-Hwan Yoon ,  Sang-Wook Park ,  Min-Young Son

IPC分类号： H01L23/495

CPC分类号： H01L23/49575 ,  H01L23/293 ,  H01L23/3107 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/05554 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/49113 ,  H01L2225/06562 ,  H01L2924/00014 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A semiconductor chip package includes a lead frame, an insulation member, a chip, bonding wires and a sealing member. The lead frame includes a plurality of first leads and a plurality of second leads. The second leads have a chip adhesion region. The insulation member fills a space between the second leads in the chip adhesion region. The chip is provided on at least one surface of the insulation member. The chip has single-side bonding pads. The bonding wires electrically connect the leads and the bonding pads. The sealing member covers the lead frame, the insulation member, the chip and the bonding wires. Since the space between the second leads is filled with the insulation member, voids may be prevented from occurring.

摘要翻译： 半导体芯片封装包括引线框架，绝缘构件，芯片，接合线和密封构件。 引线框架包括多个第一引线和多个第二引线。 第二引线具有芯片粘附区域。 绝缘构件填充芯片粘合区域中的第二引线之间的空间。 芯片设置在绝缘构件的至少一个表面上。 该芯片具有单面接合焊盘。 接合线将引线和接合焊盘电连接。 密封构件覆盖引线框架，绝缘构件，芯片和接合线。 由于第二引线之间的空间填充有绝缘构件，因此可以防止发生空隙。