公开(公告)号：US20150324253A1

公开(公告)日：2015-11-12

申请号：US14728749

申请日：2015-06-02

申请人： California Institute of Technology ,  Texas A&M University System

发明人： Anxiao Jiang ,  Eyal En Gad ,  Jehoshua Bruck ,  Eitan Yaakobi

IPC分类号： G06F11/10 ,  G11C29/52 ,  G11C16/34

CPC分类号： G06F11/1072 ,  G06F11/1016 ,  G06F12/0246 ,  G11C7/1006 ,  G11C11/5628 ,  G11C16/10 ,  G11C16/349 ,  G11C29/52 ,  G11C2211/5649 ,  H03M13/13

摘要： Rank modulation has been recently proposed as a scheme for storing information in flash memories. Three improved aspects are disclosed. In one aspect the minimum push-up scheme, for storing data in flash memories is provided. It aims at minimizing the cost of changing the state of the memory. In another aspect, multi-cells, used for storing data in flash memories is provided. Each transistor is replaced with a multi-cell of mm transistors connected in parallel. In yet another aspect, multi-permutations, are provided. The paradigm of representing information with permutations is generalized to the case where the number of cells in each level is a constant greater than one. In yet another aspect, rank-modulation rewriting schemes which take advantage of polar codes, are provided for use with flash memory.

摘要翻译： 近来已经提出了等级调制作为用于将信息存储在闪速存储器中的方案。 公开了三个改进的方面。 在一个方面，提供了用于将数据存储在闪速存储器中的最小上推方案。 它旨在最大限度地减少改变记忆状态的成本。 在另一方面，提供了用于将数据存储在闪存中的多单元。 每个晶体管被并联连接的mm晶体管的多单元电池代替。 在另一方面，提供了多重排列。 代表具有置换的信息的范例被推广到每个级别中的单元的数量是大于1的常数的情况。 在另一方面，提供利用极性码的秩调制重写方案用于闪速存储器。

公开(公告)号：US20130254466A1

公开(公告)日：2013-09-26

申请号：US13791823

申请日：2013-03-08

申请人： CALIFORNIA INSTITUTE OF TECHNOLOGY ,  TEXAS A&M UNIVERSITY SYSTEM

发明人： Anxiao Jiang ,  Eyal En Gad ,  Jehoshua Bruck ,  Eitan Yaakobi

IPC分类号： G06F12/02

CPC分类号： G06F11/1072 ,  G06F11/1016 ,  G06F12/0246 ,  G11C7/1006 ,  G11C11/5628 ,  G11C16/10 ,  G11C16/349 ,  G11C29/52 ,  G11C2211/5649 ,  H03M13/13

摘要： Rank modulation has been recently proposed as a scheme for storing information in flash memories. Three improved aspects are disclosed. In one aspect the minimum push-up scheme, for storing data in flash memories is provided. It aims at minimizing the cost of changing the state of the memory. In another aspect, multi-cells, used for storing data in flash memories is provided. Each transistor is replaced with a multi-cell of mm transistors connected in parallel. In yet another aspect, multi-permutations, are provided. The paradigm of representing information with permutations is generalized to the case where the number of cells in each level is a constant greater than one. In yet another aspect, rank-modulation rewriting schemes which take advantage of polar codes, are provided for use with flash memory.

公开(公告)号：US09946475B2

公开(公告)日：2018-04-17

申请号：US14443349

申请日：2013-07-05

申请人： California Institute of Technology ,  Texas A&M University System

发明人： Anxiao Jiang ,  Yue Li ,  Eyal En Gad ,  Michael Langberg ,  Jehoshua Bruck

IPC分类号： G06F12/00 ,  G06F13/00 ,  G06F13/28 ,  G06F3/06 ,  H03M13/13 ,  G11C11/56 ,  G06F11/10 ,  G06F12/02 ,  G11C17/14 ,  G11C29/04

CPC分类号： G06F3/0619 ,  G06F3/064 ,  G06F3/0679 ,  G06F11/1012 ,  G06F11/1068 ,  G06F12/0246 ,  G11C11/5628 ,  G11C11/5642 ,  G11C17/146 ,  G11C2029/0411 ,  H03M13/13

摘要： Both rewriting and error correction are technologies usable for non-volatile memories, such as flash memories. A coding scheme is disclosed herein that combines rewriting and error correction for the write-once memory model. In some embodiments, code construction is based on polar codes, and supports any number of rewrites and corrects a substantial number of errors. The code may be analyzed for a binary symmetric channel. The results can be extended to multi-level cells and more general noise models.

公开(公告)号：US09916197B2

公开(公告)日：2018-03-13

申请号：US14728749

申请日：2015-06-02

申请人： California Institute of Technology ,  Texas A&M University System

发明人： Anxiao Jiang ,  Eyal En Gad ,  Jehoshua Bruck ,  Eitan Yaakobi

IPC分类号： G06F12/02 ,  H03M13/13 ,  G06F11/10 ,  G11C16/34 ,  G11C29/52 ,  G11C16/10 ,  G11C7/10 ,  G11C11/56

CPC分类号： G06F11/1072 ,  G06F11/1016 ,  G06F12/0246 ,  G11C7/1006 ,  G11C11/5628 ,  G11C16/10 ,  G11C16/349 ,  G11C29/52 ,  G11C2211/5649 ,  H03M13/13

摘要： Rank modulation has been recently proposed as a scheme for storing information in flash memories. Three improved aspects are disclosed. In one aspect the minimum push-up scheme, for storing data in flash memories is provided. It aims at minimizing the cost of changing the state of the memory. In another aspect, multi-cells, used for storing data in flash memories is provided. Each transistor is replaced with a multi-cell of mm transistors connected in parallel. In yet another aspect, multi-permutations, are provided. The paradigm of representing information with permutations is generalized to the case where the number of cells in each level is a constant greater than one. In yet another aspect, rank-modulation rewriting schemes which take advantage of polar codes, are provided for use with flash memory.

公开(公告)号：US20150293716A1

公开(公告)日：2015-10-15

申请号：US14443349

申请日：2013-07-05

申请人： CALIFORNIA INSTITUTE OF TECHNOLOGY ,  TEXAS A&M UNIVERSITY SYSTEM

发明人： Anxiao Jiang ,  Yue Li ,  Eyal En Gad ,  Michael Langberg ,  Jehoshua Bruck

IPC分类号： G06F3/06

CPC分类号： G06F3/0619 ,  G06F3/064 ,  G06F3/0679 ,  G06F11/1012 ,  G06F11/1068 ,  G06F12/0246 ,  G11C11/5628 ,  G11C11/5642 ,  G11C17/146 ,  G11C2029/0411 ,  H03M13/13

摘要： Both rewriting and error correction are technologies usable for non-volatile memories, such as flash memories. A coding scheme is disclosed herein that combines rewriting and error correction for the write-once memory model. In some embodiments, code construction is based on polar codes, and supports any number of rewrites and corrects a substantial number of errors. The code may be analyzed for a binary symmetric channel. The results can be extended to multi-level cells and more general noise models.

摘要翻译： 重写和纠错都是可用于诸如闪存之类的非易失性存储器的技术。 本文公开的一种编码方案结合了一次写入存储器模型的重写和纠错。 在一些实施例中，代码构造基于极性代码，并且支持任何数量的重写并校正大量错误。 可以分析二进制对称信道的码。 结果可以扩展到多级单元和更一般的噪声模型。

公开(公告)号：US09983808B2

公开(公告)日：2018-05-29

申请号：US14965869

申请日：2015-12-10

申请人： California Institute of Technology ,  Texas A&M University System

发明人： Yue Li ,  Eyal En Gad ,  Anxiao Jiang ,  Jehoshua Bruck

IPC分类号： G06F12/00 ,  G06F3/06 ,  G11C11/56 ,  G11C16/08 ,  G11C16/26 ,  G11C7/10 ,  G11C8/12 ,  G11C16/34

CPC分类号： G06F3/0619 ,  G06F3/0638 ,  G06F3/0679 ,  G11C7/1006 ,  G11C8/12 ,  G11C11/5642 ,  G11C16/08 ,  G11C16/26 ,  G11C16/349

摘要： The reliability of NAND flash memory decreases rapidly as density increases, preventing the wide adoptions of flash-based storage systems. A novel data representation scheme named rank modulation (RM) is discussed for improving NAND flash reliability. RM encodes data using the relative orders of memory cell voltages, which is inherently resilient to asymmetric errors. For studying the effectiveness of RM in flash, RM is adapted to make it simple to implement with existing flash memories. The implementation is evaluated under different types of noise of 20 nm flash memory. Results show that RM offers significantly lower cell error rates compared to the current data representation in flash at typical P/E cycles. RM is applied to flash-based archival storage and shows that RM brings up to six times longer data retention time for 16 nm flash memory.

公开(公告)号：US20160170672A1

公开(公告)日：2016-06-16

申请号：US14965869

申请日：2015-12-10

申请人： California Institute of Technology ,  Texas A&M University System

发明人： Yue Li ,  Eyal En Gad ,  Anxiao Jiang ,  Jehoshua Bruck

IPC分类号： G06F3/06

CPC分类号： G06F3/0619 ,  G06F3/0638 ,  G06F3/0679 ,  G11C7/1006 ,  G11C8/12 ,  G11C11/5642 ,  G11C16/08 ,  G11C16/26 ,  G11C16/349

摘要： The reliability of NAND flash memory decreases rapidly as density increases, preventing the wide adoptions of flash-based storage systems. A novel data representation scheme named rank modulation (RM) is discussed for improving NAND flash reliability. RM encodes data using the relative orders of memory cell voltages, which is inherently resilient to asymmetric errors. For studying the effectiveness of RM in flash, RM is adapted to make it simple to implement with existing flash memories. The implementation is evaluated under different types of noise of 20 nm flash memory. Results show that RM offers significantly lower cell error rates compared to the current data representation in flash at typical P/E cycles. RM is applied to flash-based archival storage and shows that RM brings up to six times longer data retention time for 16 nm flash memory.

摘要翻译： 随着密度的增加，NAND闪存的可靠性迅速下降，从而阻止了基于闪存的存储系统的广泛采用。 讨论了一种名为秩调制（RM）的新型数据表示方案，用于提高NAND闪存可靠性。 RM使用存储单元电压的相对次序对数据进行编码，这本身就适用于非对称误差。 为了研究RM在闪存中的有效性，RM适用于使用现有闪存实现简单。 在20nm闪存的不同类型的噪声下评估实现。 结果表明，与典型市盈率周期中闪存中的当前数据表示相比，RM提供了显着更低的单元错误率。 RM适用于基于闪存的存档，并显示RM为16nm闪存提供高达六倍的数据保留时间。

公开(公告)号：US20130268723A1

公开(公告)日：2013-10-10

申请号：US13791856

申请日：2013-03-08

申请人： Texas A&M University System ,  California Institute of Technology

发明人： Anxiao Jiang ,  Eyal En Gad ,  Jehoshua Bruck

IPC分类号： G11C16/04 ,  G06F12/02

CPC分类号： G11C16/0441 ,  G06F3/0619 ,  G06F3/0643 ,  G06F3/0679 ,  G06F12/0246 ,  G11C11/5621 ,  G11C11/5628 ,  G11C11/5635 ,  G11C16/0483 ,  H03M1/14 ,  H03M2201/52

摘要： Rank modulation has been recently proposed as a scheme for storing information in flash memories. Three improved aspects are disclosed. In one aspect the minimum push-up scheme, for storing data in flash memories is provided. It aims at minimizing the cost of changing the state of the memory. In another aspect, multi-cells, used for storing data in flash memories is provided. Each transistor is replaced with a multi-cell of mm transistors connected in parallel. In yet another aspect, multi-permutations, are provided. The paradigm of representing information with permutations is generalized to the case where the number of cells in each level is a constant greater than one.

摘要翻译： 近来已经提出了等级调制作为用于将信息存储在闪速存储器中的方案。 公开了三个改进的方面。 在一个方面，提供了用于将数据存储在闪速存储器中的最小上推方案。 它旨在最大限度地减少改变记忆状态的成本。 在另一方面，提供了用于将数据存储在闪存中的多单元。 每个晶体管被并联连接的mm晶体管的多单元电池代替。 在另一方面，提供了多重排列。 代表具有置换的信息的范例被推广到每个级别中的单元的数量是大于1的常数的情况。

公开(公告)号：US10379945B2

公开(公告)日：2019-08-13

申请号：US15112156

申请日：2015-01-14

申请人： California Institute of Technology ,  New Jersey Institute of Technology ,  New Mexico State University Technology Transfer Corporation ,  The Research Foundation for the State University of New York ,  The Texas A&M University System

发明人： Eyal En Gad ,  Yue Li ,  Joerg Kliewer ,  Michael Langberg ,  Anxiao Jiang ,  Jehoshua Bruck

IPC分类号： G06F11/10 ,  G11C11/56 ,  G11C29/52 ,  H03M13/13 ,  H03M13/15

摘要： Techniques are disclosed for generating codes for representation of data in memory devices that may avoid the block erasure operation in changing data values. Data values comprising binary digits (bits) can be encoded and decoded using the generated codes, referred to as codewords, such that the codewords may comprise a block erasure-avoiding code, in which the binary digits of a data message m can be encoded such that the encoded data message can be stored into multiple memory cells of a data device and, once a memory cell value is changed from a first logic value to a second logic value, the value of the memory cell may remain at the second logic value, regardless of subsequently received messages, until a block erasure operation on the memory cell. Similarly, a received data message comprising an input codeword, in which source data values of multiple binary digits have been encoded with the disclosed block erasure-avoiding code, can be decoded in the data device to recover an estimated source data message.

公开(公告)号：US09666280B2

公开(公告)日：2017-05-30

申请号：US14822680

申请日：2015-08-10

申请人： California Institute of Technology ,  Texas A&M University System

发明人： Anxiao Jiang ,  Eyal En Gad ,  Jehoshua Bruck

IPC分类号： G11C16/04 ,  G11C11/56 ,  G06F12/02 ,  G06F3/06

CPC分类号： G11C16/0441 ,  G06F3/0619 ,  G06F3/0643 ,  G06F3/0679 ,  G06F12/0246 ,  G11C11/5621 ,  G11C11/5628 ,  G11C11/5635 ,  G11C16/0483 ,  H03M1/14 ,  H03M2201/52

摘要： Rank modulation has been recently proposed as a scheme for storing information in flash memories. Three improved aspects are disclosed. In one aspect the minimum push-up scheme, for storing data in flash memories is provided. It aims at minimizing the cost of changing the state of the memory. In another aspect, multi-cells, used for storing data in flash memories is provided. Each transistor is replaced with a multi-cell of m transistors connected in parallel. In yet another aspect, multi-permutations, are provided. The paradigm of representing information with permutations is generalized to the case where the number of cells in each level is a constant greater than one.