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公开(公告)号：US6100549A
公开(公告)日：2000-08-08
申请号：US133041
申请日：1998-08-12
IPC分类号： H01L21/337 , H01L29/20 , H01L29/80 , H01L31/109
CPC分类号： H01L29/66924 , H01L29/802 , H01L29/2003
摘要： A high breakdown voltage HFET includes a reduced surface field (RESURF) layer of p-type conductivity GaN positioned on a substrate with a channel layer of n-type conductivity GaN positioned thereon. A barrier layer of n-type conductivity Al.sub.x Ga.sub.1-x N is positioned on the channel layer to form a lateral channel adjacent to and parallel with the interface. A gate electrode is positioned on the barrier layer overlying the lateral channel and a drain electrode is positioned on the channel layer in contact with the lateral channel and spaced to one side of the gate electrode a distance which determines the breakdown voltage. A source electrode is positioned on the channel layer to the opposite side of the gate electrode, in contact with the lateral channel and also in contact with the RESURF layer.
摘要翻译： 高击穿电压HFET包括位于衬底上的p型导电GaN的还原表面场（RESURF）层，其上定位有n型电导率GaN的沟道层。 n型导电性Al x Ga 1-x N的阻挡层位于沟道层上，以形成与界面相邻并平行的横向沟道。 栅极电极位于覆盖在横向沟道上的势垒层上，漏电极位于沟道层上，与沟道层相接触，并与栅电极的一侧隔开一定距离，确定击穿电压。 源极电极位于通道层上，与栅电极的相对侧，与侧向通道接触并且还与RESURF层接触。
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公开(公告)号：US5627385A
公开(公告)日：1997-05-06
申请号：US520123
申请日：1995-08-28
CPC分类号： H01L29/405 , H01L29/1087 , H01L29/1608 , H01L29/7835 , H01L29/7838
摘要： A lateral silicon carbide transistor (10) utilizes a modulated channel region (18) to form an accumulation region that facilitates a low on-resistance. A doped region of the channel layer forms a channel insert (14) that also lowers the on-resistance of the transistor (10). Field plates (23,24) are utilized to facilitate providing a high breakdown voltage. A high resistance layer (29)between the field plates (23,24) also assists in increasing the breakdown voltage and decreasing on-resistance of the transistor (10).
摘要翻译： 横向碳化硅晶体管（10）利用调制的沟道区（18）形成促进低导通电阻的积聚区。 沟道层的掺杂区域形成还降低晶体管（10）的导通电阻的沟道插入件（14）。 场板（23,24）用于提供高击穿电压。 场板（23,24）之间的高电阻层（29）也有助于提高击穿电压并降低晶体管（10）的导通电阻。
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公开(公告)号：US6146926A
公开(公告)日：2000-11-14
申请号：US136492
申请日：1998-08-19
IPC分类号： H01L21/04 , H01L21/336 , H01L29/10 , H01L29/12 , H01L29/20 , H01L29/24 , H01L29/78 , H01L21/332
CPC分类号： H01L29/7828 , H01L29/1095 , H01L29/66068 , H01L29/66666 , H01L29/66712 , H01L29/7802 , H01L29/1608 , H01L29/20 , H01L29/2003
摘要： A lateral gate, vertical drift region transistor including a drain positioned on one surface of a substrate and a doped structure having a buried region therein positioned on the other surface of the substrate. The buried region defining a drift region in the doped structure extending vertically from the substrate and further defining a doped region in communication with the drift region and adjacent the surface of the doped structure. A source positioned on the doped structure in communication with the doped region and an implant region positioned in the doped region adjacent the surface and in communication with the source and buried region. An insulating layer positioned on the doped structure with a metal gate positioned on the insulating layer so as to define an inversion region in the implant region extending laterally adjacent the control terminal and communicating with the drift region and the source.
摘要翻译： 横向栅极，垂直漂移区晶体管，其包括位于衬底的一个表面上的漏极和其中位于衬底的另一表面上的埋入区的掺杂结构。 所述掩埋区域限定在所述掺杂结构中的漂移区域，所述漂移区域从所述衬底垂直延伸，并进一步限定与所述漂移区域相邻并且与所述掺杂结构的表面相邻的掺杂区域。 位于与掺杂区域连通的掺杂结构上的源极和位于邻近表面并与源极和掩埋区域连通的掺杂区域中的注入区域。 绝缘层，其位于所述掺杂结构上，金属栅极位于所述绝缘层上，以便在所述注入区域中限定反向区域，所述反转区域横向延伸延伸到所述控制端子并且与所述漂移区域和所述源极连通。
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公开(公告)号：US5917203A
公开(公告)日：1999-06-29
申请号：US829072
申请日：1997-03-31
IPC分类号： H01L21/04 , H01L21/336 , H01L29/10 , H01L29/12 , H01L29/20 , H01L29/24 , H01L29/78 , H01L29/76
CPC分类号： H01L29/7828 , H01L29/1095 , H01L29/66068 , H01L29/66666 , H01L29/66712 , H01L29/7802 , H01L29/1608 , H01L29/20 , H01L29/2003
摘要： A lateral gate, vertical drift region transistor including a drain positioned on one surface of a substrate and a doped structure having a buried region therein positioned on the other surface of the substrate. The buried region defining a drift region in the doped structure extending vertically from the substrate and further defining a doped region in communication with the drift region and adjacent the surface of the doped structure. A source positioned on the doped structure in communication with the doped region and an implant region positioned in the doped region adjacent the surface and in communication with the source and buried region. An insulating layer positioned on the doped structure with a metal gate positioned on the insulating layer so as to define an inversion region in the implant region extending laterally adjacent the control terminal and communicating with the drift region and the source.
摘要翻译： 横向栅极，垂直漂移区晶体管，其包括位于衬底的一个表面上的漏极和其中位于衬底的另一表面上的埋入区的掺杂结构。 所述掩埋区域限定在所述掺杂结构中的漂移区域，所述漂移区域从所述衬底垂直延伸，并进一步限定与所述漂移区域相邻并且与所述掺杂结构的表面相邻的掺杂区域。 位于与掺杂区域连通的掺杂结构上的源极和位于邻近表面并与源极和掩埋区域连通的掺杂区域中的注入区域。 绝缘层，其位于所述掺杂结构上，金属栅极位于所述绝缘层上，以便在所述注入区域中限定反向区域，所述反转区域横向延伸延伸到所述控制端子并且与所述漂移区域和所述源极连通。
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公开(公告)号：US06180495B2
公开(公告)日：2001-01-30
申请号：US09054541
申请日：1998-04-03
IPC分类号： H01L2130
CPC分类号： H01L23/4824 , H01L29/66068 , H01L2924/0002 , H01L2924/3011 , Y10S438/931 , H01L2924/00
摘要： A silicon carbide transistor (10) is formed from a silicon carbide film (14) that is formed on a silicon carbide substrate bulk (37). A conductor pattern layer (25) is formed on the silicon carbide film (14) and the silicon carbide film (14) removed from the silicon carbide substrate bulk (37) and attached to a substrate (11) of a dissimilar semiconductor material.
摘要翻译： 碳化硅晶体管（10）由形成在碳化硅衬底体（37）上的碳化硅膜（14）形成。 在碳化硅膜（14）上形成导体图形层（25），从碳化硅衬底体（37）上除去碳化硅膜（14），并附着到不同的半导体材料的衬底（11）上。
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公开(公告)号：US5917204A
公开(公告)日：1999-06-29
申请号：US829035
申请日：1997-03-31
IPC分类号： H01L29/16 , H01L21/04 , H01L29/10 , H01L29/12 , H01L29/20 , H01L29/24 , H01L29/739 , H01L29/78 , H01L29/74
CPC分类号： H01L29/66068 , H01L29/1095 , H01L29/7391 , H01L29/7392 , H01L29/7395 , H01L29/1608 , H01L29/20 , H01L29/2003
摘要： AN IGBT including a collector positioned on one surface of a substrate and a doped structure having a buried region therein positioned on the other surface of the substrate. The buried region defining a drift region in the doped structure extending vertically from the substrate and further defining a doped region in communication with the drift region and adjacent the surface of the doped structure. An emitter positioned on the doped structure in communication with the doped region. An insulating layer positioned on the doped structure with a metal gate positioned on the insulating layer so as to define a conduction channel extending laterally adjacent the control terminal and communicating with the drift region and the emitter. The substrate and buried region are the same conductivity and opposite the doped region to form a bipolar transistor therebetween.
摘要翻译： 一种IGBT，其包括位于衬底的一个表面上的集电极和其中位于衬底的另一表面上的埋入区域的掺杂结构。 所述掩埋区域限定在所述掺杂结构中的漂移区域，所述漂移区域从所述衬底垂直延伸，并进一步限定与所述漂移区域相邻并且与所述掺杂结构的表面相邻的掺杂区域。 位于与掺杂区域连通的掺杂结构上的发射极。 绝缘层，位于掺杂结构上，金属栅极位于绝缘层上，以便限定在横向邻近控制端延伸并与漂移区和发射极连通的导电通道。 衬底和掩埋区域具有相同的导电性并且与掺杂区域相反，以在它们之间形成双极晶体管。
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公开(公告)号：US5895260A
公开(公告)日：1999-04-20
申请号：US625606
申请日：1996-03-29
IPC分类号： H01L21/04 , H01L29/872 , H01L21/28
CPC分类号： H01L29/6606 , H01L29/872
摘要： Fabricating a device including a Schottky diode by growing a dielectric film on a SiC substrate structure and forming an ohmic contact on the opposite surface of the substrate structure by depositing a layer of metal and annealing at a temperature above 900.degree. C. Implanting doping material in the substrate structure through spaced apart openings to form high resistivity areas and depositing a dielectric layer on the dielectric film to define a contact opening positioned between the spaced apart high resistivity areas. Annealing the implant at a temperature less than approximately 400.degree. C. to reduce reverse leakage current and depositing metal in the contact opening to form a Schottky contact.
摘要翻译： 通过在SiC衬底结构上生长电介质膜制造包括肖特基二极管的器件，并通过沉积一层金属并在高于900℃的温度退火，在衬底结构的相对表面上形成欧姆接触。将掺杂材料 衬底结构通过间隔开的开口形成高电阻率区域，并在电介质膜上沉积介电层以限定位于间隔开的高电阻率区域之间的接触开口。 在低于约400℃的温度下退火植入物以减少反向漏电流并在接触开口中沉积金属以形成肖特基接触。
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公开(公告)号：US5569937A
公开(公告)日：1996-10-29
申请号：US519864
申请日：1995-08-28
IPC分类号： H01L29/06 , H01L29/24 , H01L29/40 , H01L29/78 , H01L31/0312
CPC分类号： H01L29/404 , H01L29/0615 , H01L29/1608 , H01L29/7835
摘要： A lateral silicon carbide transistor (10) utilizes a modulated channel region (18) to form an accumulation region that facilitates a low on-resistance. A doped region of the channel layer forms a channel insert (14) that also lowers the on-resistance of the transistor (10). A damage termination layer (27) is utilized to facilitate providing a high breakdown voltage. Field plates (23,24) also assists in increasing the breakdown voltage and decreasing the on-resistance of the transistor (10).
摘要翻译： 横向碳化硅晶体管（10）利用调制的沟道区（18）形成促进低导通电阻的积聚区。 沟道层的掺杂区域形成还降低晶体管（10）的导通电阻的沟道插入件（14）。 利用破坏终止层（27）来提供高的击穿电压。 场板（23,24）还有助于提高击穿电压并降低晶体管（10）的导通电阻。
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公开(公告)号：US5933750A
公开(公告)日：1999-08-03
申请号：US54561
申请日：1998-04-03
IPC分类号： H01L21/762 , H01L21/58
CPC分类号： H01L21/76254 , H01L21/76251 , Y10S438/977
摘要： A method of fabricating a semiconductor device on thinned wide bandgap material including providing a support having a planar surface and a semiconductor substrate. Implanting a layer of ions in the substrate to create a layer of microbubbles defining a thin film having a planar surface and a remaining mass separated by the layer of implanted ions. Intimately contacting the planar surface of the thin film to the planar surface of the support and heating the support and substrate to separate the remaining mass from the thin film. A semiconductor device is formed on the thin film, and the support is thinned.
摘要翻译： 一种在薄的宽带隙材料上制造半导体器件的方法，包括提供具有平坦表面的支撑体和半导体衬底。 在衬底中植入一层离子以产生限定具有平坦表面的薄膜的微泡层和由注入离子层分离的剩余物质。 将薄膜的平坦表面紧密接触支撑体的平面表面，并加热支撑体和基底，以将剩余的质量与薄膜分离。 半导体器件形成在薄膜上，并且支撑体变薄。
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公开(公告)号：US5710455A
公开(公告)日：1998-01-20
申请号：US681683
申请日：1996-07-29
IPC分类号： H01L29/06 , H01L29/24 , H01L29/40 , H01L29/417 , H01L29/78 , H01L23/58 , H01L31/108
CPC分类号： H01L29/404 , H01L29/0692 , H01L29/4175 , H01L29/41758 , H01L29/7835 , H01L29/1608 , H01L2924/0002
摘要： A FET including a channel region and a drift region in a channel layer with a source in the channel region and a drain in the drift region. The current channel between the source and drain defining a straight transistor portion and a curved transistor portion. An oxide with a thin portion overlying the channel region and a thick portion overlying the drift region, and a gate on the thin oxide overlying the current channel. A drain field plate and a gate field plate on the thick oxide with spaced apart edges and a damaged region underlying the edges of the field plates only in the curved transistor portion to reduce electric fields at the edges of the field plates. Also, the current channel has a greater length and the edges are spaced apart farther in the curved transistor portions.
摘要翻译： 包括在沟道区中的沟道区和沟道层中的漂移区的FET，以及沟道区中的源极和漂移区中的漏极。 源极和漏极之间的电流通道限定直的晶体管部分和弯曲的晶体管部分。 具有覆盖沟道区域的薄部分的氧化物和覆盖漂移区域的厚部分，以及覆盖电流通道的薄氧化物上的栅极。 在厚氧化物上的漏极场板和栅极场板具有间隔开的边缘，并且仅在弯曲的晶体管部分中的场板的边缘下方的损坏区域以减小场板边缘处的电场。 此外，电流通道具有更大的长度，并且边缘在弯曲的晶体管部分中进一步间隔开。
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