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公开(公告)号：US20060078268A1
公开(公告)日：2006-04-13
申请号：US10962825
申请日：2004-10-08
IPC分类号： G02B6/00
CPC分类号： G02B6/1225 , B82Y20/00
摘要： A photonic crystal device is fabricated by a method comprising steps of providing a substrate, providing a photonic crystal on the substrate, and etching a cavity under at least the photonic crystal, the cavity having an inner wall adapted to reflect light.
摘要翻译： 通过包括以下步骤的方法制造光子晶体器件，所述方法包括提供衬底，在衬底上提供光子晶体，以及在至少所述光子晶体之下蚀刻空腔，所述腔具有适于反射光的内壁。
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公开(公告)号：US07151883B2
公开(公告)日：2006-12-19
申请号：US10962825
申请日：2004-10-08
CPC分类号： G02B6/1225 , B82Y20/00
摘要： A photonic crystal device is fabricated by a method comprising steps of providing a substrate, providing a photonic crystal on the substrate, and etching a cavity under at least the photonic crystal, the cavity having an inner wall adapted to reflect light.
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公开(公告)号：US07494593B1
公开(公告)日：2009-02-24
申请号：US10879971
申请日：2004-06-28
申请人： Chien-Hua Chen , John Chen , Sriram Ramamoorthi
发明人： Chien-Hua Chen , John Chen , Sriram Ramamoorthi
IPC分类号： C25F3/12
CPC分类号： B81C1/0015 , B81B2201/07
摘要： A method is disclosed for forming a single crystal cantilever and tip on a substrate. The method can include the operation of defining an implant area on the substrate with a layer of photoresist. A further operation can be implanting oxygen into the substrate in the implant area to a predetermined depth to form a buried oxide layer. The buried oxide layer can define a bottom of the single crystal cantilever and tip. Another operation can involve shaping the single crystal cantilever and tip from the substrate above the buried oxide layer.
摘要翻译： 公开了一种用于在基板上形成单晶悬臂和尖端的方法。 该方法可以包括在衬底上用光致抗蚀剂层限定植入区域的操作。 进一步的操作可以是将植入区域中的氧注入到预定深度的衬底中以形成掩埋氧化物层。 掩埋氧化物层可以限定单晶悬臂和尖端的底部。 另外的操作可以包括从掩埋氧化物层上方的衬底上形成单晶悬臂和尖端。
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公开(公告)号：US20060124952A1
公开(公告)日：2006-06-15
申请号：US11010073
申请日：2004-12-10
申请人： Donald Milligan , Chien-Hua Chen , John Harmon
发明人： Donald Milligan , Chien-Hua Chen , John Harmon
IPC分类号： H01L33/00
摘要： One embodiment of a light emitting microchip apparatus includes a substrate having an exposed depression therein and a filament positioned within the exposed depression.
摘要翻译： 发光微芯片装置的一个实施例包括其中具有暴露的凹陷的基底和位于暴露的凹陷内的细丝。
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公开(公告)号：US09446590B2
公开(公告)日：2016-09-20
申请号：US14421975
申请日：2012-08-16
申请人： Chien-Hua Chen , Silam J. Choy , Brett E. Dahlgren
发明人： Chien-Hua Chen , Silam J. Choy , Brett E. Dahlgren
CPC分类号： B41J2/1433 , B41J2/14145 , B41J2/1603 , B41J2/1623 , B41J2/1629 , B41J2/1634 , B41J27/20 , B41J2002/14419 , Y10T428/24314
摘要： In one example, a method for making diagonal openings in photodefinable glass includes exposing part of a body of photodefinable glass to a beam of light oriented diagonally to a surface of the body at an angle of 5° or greater measured with respect to a normal to the surface of the body and removing some or all of the part of the body exposed to the light beam to form a diagonal opening in the body.
摘要翻译： 在一个实例中，用于在可光限定玻璃中制造斜开口的方法包括将可光限定玻璃体的一部分暴露于相对于正常对准的5°或更大的角度测量的5°或更大的角度对角定向到身体的表面的光束 身体的表面并且去除暴露于光束的身体的部分或全部部分以在体内形成对角线开口。
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公开(公告)号：US09266326B2
公开(公告)日：2016-02-23
申请号：US14397333
申请日：2012-07-25
IPC分类号： B41J2/14 , B41J2/145 , H01L41/053 , H01L41/22 , B41J2/16
CPC分类号： B41J2/14201 , B41J2/145 , B41J2/1618 , B41J2/1623 , B41J2/1642 , B41J2/1646 , H01L41/053 , H01L41/0973 , H01L41/22 , H01L41/313 , Y10T29/42
摘要： In one example, a piezoelectric actuator includes a piezoelectric material, a first conductor on a first part of the piezoelectric material, and a membrane bonded to the first conductor with an adhesive. The first conductor has a root mean square surface roughness of at least 10 nm at the bonding interface with the membrane.
摘要翻译： 在一个示例中，压电致动器包括压电材料，压电材料的第一部分上的第一导体和用粘合剂结合到第一导体的膜。 第一导体在与膜的结合界面处具有至少10nm的均方根粗糙度。
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公开(公告)号：US08864289B2
公开(公告)日：2014-10-21
申请号：US13985393
申请日：2011-03-20
CPC分类号： G01V8/24 , B41J2/04558 , B41J2/04561 , B41J2/04586 , B41J2/125 , B41J2/16579 , B41J2/16585 , B41J2/2142 , B41J2/2146 , G01N21/53 , G01V8/16
摘要： A drop detector assembly is provided including an ejection element to eject a fluid drop, a light guide to selectively receive light scattered off of the fluid drop, and a light detector formed in the light guide to detect light received by the light guide.
摘要翻译： 提供一种液滴检测器组件，其包括用于喷射液滴的喷射元件，用于选择性地接收从液滴散射的光的光导;以及形成在光导中的光检测器，用于检测光导所接收的光。
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8.发明授权公开(公告)号：US08853819B2
公开(公告)日：2014-10-07
申请号：US13338087
申请日：2011-12-27
IPC分类号： H01L27/08 , H01L23/498 , H01L49/02 , H01L23/64 , H01L23/522 , H01L23/14 , H01L27/01 , H01L25/065 , H01L21/768 , H01L23/60
CPC分类号： H01L27/016 , H01L21/76898 , H01L23/147 , H01L23/49822 , H01L23/49827 , H01L23/5227 , H01L23/5228 , H01L23/60 , H01L23/64 , H01L25/0657 , H01L28/10 , H01L28/20 , H01L28/40 , H01L2224/16 , H01L2225/06517 , H01L2225/06572 , H01L2924/1461 , H01L2924/00
摘要： The present invention relates to a semiconductor structure having an integrated passive network and a method for making the same. The semiconductor structure includes a substrate which can be an interposer. The substrate can include a plurality of conductive vias. In various embodiments, the substrate includes a dielectric layer disposed thereon, the dielectric layer having an opening forming a straight hole allowing electrical connection between the passive network and the conductive via. The passive network includes a series of patterned dielectric and conductive layers, forming passive electronic components. In an embodiment, the passive device includes a common resistor coupled to a pair of inductors, each of the inductors coupled to a capacitor. In another embodiment, the passive device includes a resistor and an inductor electrically connected to each other, a bottom surface of the inductor coplanar with a bottom surface of the resistor.
摘要翻译： 本发明涉及一种具有集成无源网络的半导体结构及其制造方法。 半导体结构包括可以是插入件的衬底。 衬底可以包括多个导电通孔。 在各种实施例中，衬底包括设置在其上的电介质层，电介质层具有形成直孔的开口，允许无源网络和导电通孔之间的电连接。 无源网络包括一系列图案化的电介质层和导电层，形成无源电子元件。 在一个实施例中，无源器件包括耦合到一对电感器的公共电阻器，每个电感器耦合到电容器。 在另一个实施例中，无源器件包括电阻器和电感器，它们彼此电连接，电感器的底表面与电阻器的底表面共面。
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公开(公告)号：US08497577B2
公开(公告)日：2013-07-30
申请号：US11870306
申请日：2007-10-10
IPC分类号： H01L23/12
CPC分类号： B81B7/007 , H01L2924/16235
摘要： An apparatus includes a Micro Electrical Mechanical System (MEMS) having electrical contacts and a MEMS device in electrical communication with the electrical contacts. A lid is oriented over the MEMS device and not the electrical contacts. The lid has a base region and a top region, the base region being wider in dimension than the top region and oriented in closer proximity to the MEMS device than the top region.
摘要翻译： 一种装置包括具有电触头的微机电系统（MEMS）和与电触头电连通的MEMS装置。 盖子定位在MEMS器件上，而不是电触头。 盖子具有基部区域和顶部区域，基底区域的尺寸比顶部区域宽，并且被定向成比顶部区域更靠近MEMS装置。
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公开(公告)号：US08368173B2
公开(公告)日：2013-02-05
申请号：US12795357
申请日：2010-06-07
申请人： Chien-Hua Chen , Teck-Chong Lee
发明人： Chien-Hua Chen , Teck-Chong Lee
IPC分类号： H01L27/08
CPC分类号： H01L28/40 , H01L21/76898 , H01L23/49822 , H01L23/49827 , H01L23/50 , H01L23/642 , H01L23/645 , H01L24/48 , H01L25/16 , H01L28/10 , H01L28/60 , H01L2224/48227 , H01L2924/00014 , H01L2924/15311 , H01L2924/181 , H01L2924/19041 , H01L2924/30107 , H01L2924/00 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： The present invention relates to a semiconductor package and a method for making the same. The semiconductor package includes a base material, a first metal layer, a first dielectric layer, a first upper electrode and a first protective layer. The first metal layer is disposed on a first surface of the base material, and includes a first inductor and a first lower electrode. The first dielectric layer is disposed on the first lower electrode. The first upper electrode is disposed on the first dielectric layer, and the first upper electrode, the first dielectric layer and the first lower electrode form a first capacitor. The first protective layer encapsulates the first inductor and the first capacitor. Whereby, the first inductor and the first lower electrode of the first capacitor are disposed on the same layer, so that the thickness of the product is reduced.
摘要翻译： 半导体封装及其制造方法技术领域本发明涉及半导体封装及其制造方法。 半导体封装包括基底材料，第一金属层，第一介电层，第一上电极和第一保护层。 第一金属层设置在基材的第一表面上，并且包括第一电感器和第一下电极。 第一介电层设置在第一下电极上。 第一上电极设置在第一电介质层上，第一上电极，第一电介质层和第一下电极形成第一电容器。 第一保护层封装第一电感器和第一电容器。 由此，第一电容器的第一电感器和第一下电极设置在同一层上，从而减小了产品的厚度。
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