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公开(公告)号:US06884736B2
公开(公告)日:2005-04-26
申请号:US10265937
申请日:2002-10-07
申请人: Chii-Ming Wu , Mei-Yun Wang , Chih-Wei Chang , Chin-Hwa Hsieh , Shau-Lin Shue , Chu-Yun Fu , Ju-Wang Hsu , Ming-Huan Tsai , Yuan-Hung Chiu
发明人: Chii-Ming Wu , Mei-Yun Wang , Chih-Wei Chang , Chin-Hwa Hsieh , Shau-Lin Shue , Chu-Yun Fu , Ju-Wang Hsu , Ming-Huan Tsai , Yuan-Hung Chiu
IPC分类号: H01L21/311 , H01L21/60 , H01L21/768 , H01L21/302
CPC分类号: H01L21/76829 , H01L21/31105 , H01L21/31116 , H01L21/76802 , H01L21/76832
摘要: A method of manufacturing a semiconductor device is provided. A semiconductor element is formed on a substrate. The semiconductor element has at least one nickel silicide contact region, an etch stop layer formed over said element, and an insulating layer formed over said etch stop layer. A portion of the etch stop layer immediately over a selected contact region is removed using a process that does not substantially react with the contact region, to form a contact opening. The contact opening is then filled with a conductive material to form a contact.
摘要翻译: 提供一种制造半导体器件的方法。 半导体元件形成在基板上。 半导体元件具有至少一个硅化镍接触区,在所述元件上形成的蚀刻停止层,以及形成在所述蚀刻停止层上的绝缘层。 使用基本上不与接触区域反应的方法去除在所选择的接触区域上方的蚀刻停止层的一部分,以形成接触开口。 然后用导电材料填充接触开口以形成接触。
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公开(公告)号:US07256137B2
公开(公告)日:2007-08-14
申请号:US11052938
申请日:2005-02-07
申请人: Chii-Ming Wu , Chih-Wei Chang , Shau-Lin Shue , Ju-Wang Hsu , Ming-Huan Tsai
发明人: Chii-Ming Wu , Chih-Wei Chang , Shau-Lin Shue , Ju-Wang Hsu , Ming-Huan Tsai
IPC分类号: H01L21/302 , H01L21/461
CPC分类号: H01L21/76829 , H01L21/31105 , H01L21/31116 , H01L21/76802 , H01L21/76832
摘要: A method of manufacturing a semiconductor device is provided comprising the steps of: (a) forming a semiconductor element on a substrate, the semiconductor element having at least one nickel silicide contact region, a first etch stop layer formed over the element and an insulating layer formed over the first etch stop layer; (b) forming an opening through the insulating layer over the contact region at least to the first etch stop layer; (c) removing a portion of the first etch stop layer contacting a selected contact region using a process that does not substantially oxidize with the contact region, to form a contact opening to the contact region; and (d) filling the contact opening with conductive material to form a contact.
摘要翻译: 提供一种制造半导体器件的方法,包括以下步骤:(a)在衬底上形成半导体元件,所述半导体元件具有至少一个硅化镍接触区域,形成在元件上的第一蚀刻停止层和绝缘层 形成在第一蚀刻停止层上; (b)至少在所述第一蚀刻停止层上在所述接触区域上形成穿过所述绝缘层的开口; (c)使用不与接触区域基本上氧化的工艺去除与所选择的接触区域接触的第一蚀刻停止层的一部分,以形成到接触区域的接触开口; 和(d)用导电材料填充接触开口以形成接触。
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公开(公告)号:US20050158986A1
公开(公告)日:2005-07-21
申请号:US11052938
申请日:2005-02-07
申请人: Chii-Ming Wu , Chih-Wei Chang , Shau-Lin Shue , Ju-Wang Hsu , Ming-Huan Tsai
发明人: Chii-Ming Wu , Chih-Wei Chang , Shau-Lin Shue , Ju-Wang Hsu , Ming-Huan Tsai
IPC分类号: H01L21/311 , H01L21/60 , H01L21/768 , H01L21/20 , H01L21/4763
CPC分类号: H01L21/76829 , H01L21/31105 , H01L21/31116 , H01L21/76802 , H01L21/76832
摘要: A method of manufacturing a semiconductor device is provided comprising the steps of: (a) forming a semiconductor element on a substrate, the semiconductor element having at least one nickel silicide contact region, a first etch stop layer formed over the element and an insulating layer formed over the first etch stop layer; (b) forming an opening through the insulating layer over the contact region at least to the first etch stop layer; (c) removing a portion of the first etch stop layer contacting a selected contact region using a process that does not substantially oxidize with the contact region, to form a contact opening to the contact region; and (d) filling the contact opening with conductive material to form a contact.
摘要翻译: 提供一种制造半导体器件的方法,包括以下步骤:(a)在衬底上形成半导体元件,所述半导体元件具有至少一个硅化镍接触区域,形成在元件上的第一蚀刻停止层和绝缘层 形成在第一蚀刻停止层上; (b)至少在所述第一蚀刻停止层上在所述接触区域上形成穿过所述绝缘层的开口; (c)使用不与接触区域基本上氧化的工艺去除与所选择的接触区域接触的第一蚀刻停止层的一部分,以形成到接触区域的接触开口; 和(d)用导电材料填充接触开口以形成接触。
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公开(公告)号:US07405151B2
公开(公告)日:2008-07-29
申请号:US11420900
申请日:2006-05-30
申请人: Gin Jei Wang , Chao-Hsien Peng , Chii-Ming Wu , Chih-Wei Chang , Shau-Lin Shue
发明人: Gin Jei Wang , Chao-Hsien Peng , Chii-Ming Wu , Chih-Wei Chang , Shau-Lin Shue
IPC分类号: H01L21/4763
CPC分类号: H01L21/76843 , H01L21/02129 , H01L21/022 , H01L21/0228 , H01L21/28562 , H01L21/31625 , H01L23/482 , H01L29/78 , H01L2924/0002 , H01L2924/00
摘要: A method for forming a semiconductor device is described. An opening is formed in a first dielectric layer, exposing an active region of the transistor, and an atomic layer deposited (ALD) TaN barrier is conformably formed in the opening, at a thickness less than 20 Å. A copper layer is formed over the atomic layer deposited (ALD) TaN barrier to fill the opening.
摘要翻译: 对半导体装置的形成方法进行说明。 在第一电介质层中形成开口,暴露晶体管的有源区,并且在开口中以厚度小于等于一致地形成原子层沉积(ALD)TaN势垒。 在原子层沉积(ALD)TaN势垒上形成铜层以填充开口。
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公开(公告)号:US20080121929A1
公开(公告)日:2008-05-29
申请号:US11523683
申请日:2006-09-19
申请人: Jerry Lai , Chii-Ming Wu , Chih-Wei Chang , Shau-Lin Shue
发明人: Jerry Lai , Chii-Ming Wu , Chih-Wei Chang , Shau-Lin Shue
IPC分类号: H01L29/78
CPC分类号: H01L29/66636 , H01L21/26506 , H01L21/2652 , H01L29/165 , H01L29/665 , H01L29/6656 , H01L29/66621 , H01L29/7848 , Y10S438/933
摘要: A semiconductor structure includes a first silicon-containing layer comprising an element selected from the group consisting essentially of carbon and germanium wherein the silicon-containing layer has a first atomic percentage of the element to the element and silicon, a second silicon-containing layer comprising the element over the first silicon-containing layer, and a silicide layer on the second silicon-containing layer. The element in the second silicon-containing layer has a second atomic percentage of the element to the element and silicon, wherein the second atomic percentage is substantially lower than the first atomic percentage.
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公开(公告)号:US20070284678A1
公开(公告)日:2007-12-13
申请号:US11838376
申请日:2007-08-14
申请人: Chen-Tung Lin , Chih-Wei Chang , Chii-Ming Wu , Mei-Yun Wang , Chiang-Ming Chuang , Shau-Lin Shue
发明人: Chen-Tung Lin , Chih-Wei Chang , Chii-Ming Wu , Mei-Yun Wang , Chiang-Ming Chuang , Shau-Lin Shue
IPC分类号: H01L21/3205 , H01L29/45
CPC分类号: H01L29/66545 , H01L21/28061 , H01L21/28097 , H01L21/28525 , H01L21/76877 , H01L21/76889 , H01L23/485 , H01L2924/0002 , Y10S438/926 , H01L2924/00
摘要: A method of manufacturing a microelectronic device including forming a dielectric layer surrounding a dummy feature located over a substrate, removing the dummy feature to form an opening in the dielectric layer, and forming a metal-silicide layer conforming to the opening by a metal deposition process employing a target which includes metal and silicon. The metal-silicide layer may then be annealed.
摘要翻译: 一种制造微电子器件的方法,包括形成围绕位于衬底上的虚拟特征的介电层,去除虚拟特征以在电介质层中形成开口,以及通过金属沉积工艺形成符合开口的金属硅化物层 使用包括金属和硅的靶。 然后可以将金属硅化物层退火。
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公开(公告)号:US20100273324A1
公开(公告)日:2010-10-28
申请号:US12833595
申请日:2010-07-09
申请人: Chen-Tung Lin , Chih-Wei Chang , Chii-Ming Wu , Mei-Yun Wang , Chiang-Ming Chuang , Shau-Lin Shue
发明人: Chen-Tung Lin , Chih-Wei Chang , Chii-Ming Wu , Mei-Yun Wang , Chiang-Ming Chuang , Shau-Lin Shue
IPC分类号: H01L21/3205
CPC分类号: H01L29/66545 , H01L21/28061 , H01L21/28097 , H01L21/28525 , H01L21/76877 , H01L21/76889 , H01L23/485 , H01L2924/0002 , Y10S438/926 , H01L2924/00
摘要: A method of manufacturing a microelectronic device including forming a dielectric layer surrounding a dummy feature located over a substrate, removing the dummy feature to form an opening in the dielectric layer, and forming a metal-silicide layer conforming to the opening. The metal-silicide layer may then be annealed.
摘要翻译: 一种制造微电子器件的方法,包括形成围绕位于衬底上的虚拟特征的介电层,去除所述虚拟特征以在所述电介质层中形成开口,以及形成符合所述开口的金属硅化物层。 然后可以将金属硅化物层退火。
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公开(公告)号:US07432559B2
公开(公告)日:2008-10-07
申请号:US11523683
申请日:2006-09-19
申请人: Jerry Lai , Chii-Ming Wu , Chih-Wei Chang , Shau-Lin Shue
发明人: Jerry Lai , Chii-Ming Wu , Chih-Wei Chang , Shau-Lin Shue
IPC分类号: H01L29/40
CPC分类号: H01L29/66636 , H01L21/26506 , H01L21/2652 , H01L29/165 , H01L29/665 , H01L29/6656 , H01L29/66621 , H01L29/7848 , Y10S438/933
摘要: A semiconductor structure includes a first silicon-containing layer comprising an element selected from the group consisting essentially of carbon and germanium wherein the silicon-containing layer has a first atomic percentage of the element to the element and silicon, a second silicon-containing layer comprising the element over the first silicon-containing layer, and a silicide layer on the second silicon-containing layer. The element in the second silicon-containing layer has a second atomic percentage of the element to the element and silicon, wherein the second atomic percentage is substantially lower than the first atomic percentage.
摘要翻译: 半导体结构包括第一含硅层,其包含选自基本上由碳和锗组成的组的元素,其中所述含硅层具有元素与元素和硅的元素的第一原子百分比,第二含硅层包含 第一含硅层上的元素,以及第二含硅层上的硅化物层。 第二含硅层中的元素具有与元素和硅的元素的第二原子百分比,其中第二原子百分比基本上低于第一原子百分比。
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公开(公告)号:US20070178696A1
公开(公告)日:2007-08-02
申请号:US11343648
申请日:2006-01-30
申请人: Chii-Ming Wu , Shih-Wei Chou , Gin Wang , Cheng-Tung Lin , Chih-Wei Chang , Shau-Lin Shue
发明人: Chii-Ming Wu , Shih-Wei Chou , Gin Wang , Cheng-Tung Lin , Chih-Wei Chang , Shau-Lin Shue
IPC分类号: H01L21/44
CPC分类号: H01L21/28518
摘要: A method for forming nickel silicide includes degassing a semiconductor substrate that includes a silicon surface. After the degassing operation, the substrate is cooled prior to a metal deposition process, during a metal deposition process, or both. The cooling suppresses the temperature of the substrate to a temperature less than the temperature required for the formation of nickel silicide. Nickel diffusion is minimized during the deposition process. After deposition, an annealing process is used to urge the formation of a uniform silicide film. In various embodiments, the metal film may include a binary phase alloy containing nickel and a further element.
摘要翻译: 一种形成硅化镍的方法包括对包含硅表面的半导体衬底脱气。 在脱气操作之后,在金属沉积工艺,金属沉积工艺期间或两者之间冷却基板。 冷却将基板的温度抑制到低于形成硅化镍所需的温度的温度。 在沉积过程中镍的扩散最小化。 沉积后,使用退火工艺来促使形成均匀的硅化物膜。 在各种实施例中,金属膜可以包括含有镍和另一元素的二元相合金。
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公开(公告)号:US20060113673A1
公开(公告)日:2006-06-01
申请号:US11002331
申请日:2004-12-01
申请人: Gin Wang , Chao-Hsien Peng , Chii-Ming Wu , Chih-Wei Chang , Shau-Lin Shue
发明人: Gin Wang , Chao-Hsien Peng , Chii-Ming Wu , Chih-Wei Chang , Shau-Lin Shue
IPC分类号: H01L23/48
CPC分类号: H01L21/76843 , H01L21/02129 , H01L21/022 , H01L21/0228 , H01L21/28562 , H01L21/31625 , H01L23/482 , H01L29/78 , H01L2924/0002 , H01L2924/00
摘要: A semiconductor device and fabrication thereof. An opening is formed in a first dielectric layer, exposing an active region of the transistor, and an atomic layer deposited (ALD) TaN barrier is conformably formed in the opening, at a thickness less than 20 Å. A copper layer is formed over the atomic layer deposited (ALD) TaN barrier to fill the opening.
摘要翻译: 半导体器件及其制造。 在第一电介质层中形成开口,暴露晶体管的有源区,并且在开口中以厚度小于等于一致地形成原子层沉积(ALD)TaN势垒。 在原子层沉积(ALD)TaN势垒上形成铜层以填充开口。
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